JPS615362A - データ処理システム - Google Patents

データ処理システム

Info

Publication number
JPS615362A
JPS615362A JP59109879A JP10987984A JPS615362A JP S615362 A JPS615362 A JP S615362A JP 59109879 A JP59109879 A JP 59109879A JP 10987984 A JP10987984 A JP 10987984A JP S615362 A JPS615362 A JP S615362A
Authority
JP
Japan
Prior art keywords
bit
input
output control
command
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59109879A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0359463B2 (enExample
Inventor
Kazuo Sumiya
炭谷　和男
Fumiaki Tahira
田平　文明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59109879A priority Critical patent/JPS615362A/ja
Publication of JPS615362A publication Critical patent/JPS615362A/ja
Publication of JPH0359463B2 publication Critical patent/JPH0359463B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Debugging And Monitoring (AREA)
JP59109879A 1984-05-30 1984-05-30 データ処理システム Granted JPS615362A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59109879A JPS615362A (ja) 1984-05-30 1984-05-30 データ処理システム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59109879A JPS615362A (ja) 1984-05-30 1984-05-30 データ処理システム

Publications (2)

Publication Number Publication Date
JPS615362A true JPS615362A (ja) 1986-01-11
JPH0359463B2 JPH0359463B2 (enExample) 1991-09-10

Family

ID=14521481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59109879A Granted JPS615362A (ja) 1984-05-30 1984-05-30 データ処理システム

Country Status (1)

Country Link
JP (1) JPS615362A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0277707U (enExample) * 1988-12-02 1990-06-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0277707U (enExample) * 1988-12-02 1990-06-14

Also Published As

Publication number Publication date
JPH0359463B2 (enExample) 1991-09-10

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