JPS6152971B2 - - Google Patents
Info
- Publication number
- JPS6152971B2 JPS6152971B2 JP6256681A JP6256681A JPS6152971B2 JP S6152971 B2 JPS6152971 B2 JP S6152971B2 JP 6256681 A JP6256681 A JP 6256681A JP 6256681 A JP6256681 A JP 6256681A JP S6152971 B2 JPS6152971 B2 JP S6152971B2
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- crystal
- substrate
- semiconductor
- grown
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000013078 crystal Substances 0.000 claims description 80
- 239000004065 semiconductor Substances 0.000 claims description 42
- 239000000758 substrate Substances 0.000 claims description 41
- 238000000034 method Methods 0.000 claims description 22
- 238000004519 manufacturing process Methods 0.000 claims description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 239000010408 film Substances 0.000 description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- 239000000203 mixture Substances 0.000 description 9
- 239000007789 gas Substances 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 7
- 239000010409 thin film Substances 0.000 description 5
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 4
- 229910001882 dioxygen Inorganic materials 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000005234 chemical deposition Methods 0.000 description 2
- 238000002109 crystal growth method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000002932 luster Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
- C23C16/029—Graded interfaces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Crystallography & Structural Chemistry (AREA)
- Recrystallisation Techniques (AREA)
Description
【発明の詳細な説明】
本発明はガラス状非晶質基板上に単結晶半導体
を成長させる方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for growing single crystal semiconductors on glassy amorphous substrates.
従来、半導体発光素子又は電界効果トランジス
タ等に用いられるAlGaAs―GaAs，InGaAsP―
InP系ヘテロ接合結晶のように、基板上に該基板
と異種組成を含有する単結晶半導体を結晶欠陥が
なく（無転位）、かつ均質に成長させるために
は、該基板は、成長させるべき半導体単結晶と同
種の結晶構造（例えばダイアモンド構造等）を有
する単結晶で且つ、両者間の格子定数差がゼロか
或いは少なくとも0.5％以下に維持し、格子整合
をとるように結晶成長をしなければならなかつ
た。 Conventionally, AlGaAs―GaAs, InGaAsP― used in semiconductor light emitting devices or field effect transistors, etc.
In order to grow a single crystal semiconductor having a composition different from that of the substrate on a substrate, such as an InP-based heterojunction crystal, without crystal defects (no dislocations) and homogeneously, the substrate must be the semiconductor to be grown. The single crystal must have the same type of crystal structure as the single crystal (e.g. diamond structure, etc.), and the crystal must be grown so that the lattice constant difference between the two is maintained at zero or at least 0.5% or less, and lattice matching is achieved. It didn't happen.
一方、SOS（Silicon on Saphaia）構造結晶の
ように、サフアイア基板上に成長させたシリコン
は格子不整合により多くの結晶欠陥を含み、その
結晶性がバルクシリコン結晶と比較して劣るが、
該構造結晶成長法は絶縁性基板上に単結晶シリコ
ンが得られるということで、MOS形デバイスへ
の応用が考えられ着目された成長技術である。し
かし、該結晶成長法を実施するには少なくとも基
板が単結晶（例えば１１02）面のサフアイア単結
晶）である必要があつた。 On the other hand, silicon grown on a sapphire substrate, such as SOS (Silicon on Saphaia) structured crystal, contains many crystal defects due to lattice mismatch, and its crystallinity is inferior to that of bulk silicon crystal.
This structured crystal growth method is a growth technique that has attracted attention because it allows single crystal silicon to be obtained on an insulating substrate, and is considered to be applicable to MOS type devices. However, in order to carry out this crystal growth method, at least the substrate needs to be a single crystal (for example, a sapphire single crystal with a 1102 plane).
さらに一方、ガラス状非晶質物質を基板とし
て、その上に薄膜半導体結晶を真空蒸着、化学的
析出法（CVD法）等で成長させた場合でも、基
板温度を適当（Si：550℃以上、Ge：400℃以
上、GaAs：300℃以上）に設定すると結晶性の薄
膜が得られることが知られている。しかし、得ら
れた結晶性薄膜は微少単結晶の集合した多結晶体
であり、該微少単結晶の大きさ（グレインサイ
ズ）は〜0.1μｍ〜１μｍ程度である。従つて該
薄膜半導体結晶を電子装置に適用するには、該微
少単結晶間の境界（結晶粒界）が多数存在するた
め、該結晶粒界が再結合中心となり、電子装置に
於てはクーク電流の原因となる等の間題があつ
た。 Furthermore, even when a thin film semiconductor crystal is grown on a glass-like amorphous material as a substrate by vacuum evaporation, chemical deposition (CVD), etc., the substrate temperature must be set at an appropriate temperature (Si: 550°C or higher, It is known that a crystalline thin film can be obtained if the temperature is set to 400°C or higher (Ge: 400°C or higher, GaAs: 300°C or higher). However, the obtained crystalline thin film is a polycrystalline body made up of minute single crystals, and the size (grain size) of the minute single crystals is about 0.1 μm to 1 μm. Therefore, in order to apply the thin film semiconductor crystal to electronic devices, since there are many boundaries (crystal grain boundaries) between the micro single crystals, the grain boundaries become recombination centers, and in electronic devices, the There were problems such as it causing electric current.
また最近、ゲイス、フランダース、スミス
（M.W.Geis，D.C.Flanders，H.I.Smith）らによ
つて、石英（SiO2）基板上シリコンの単結晶を形
成するグラフオエピタキシヤル成長法なる技術が
発表された（APPlied Physics Letters 35，71
（1979））。これは、該石英基板に凹凸を設けるこ
とによつて、配向性のある単結晶を得ようとする
ものである。しかし、得られたリコン結晶は多結
晶で、グレインサイズを大きくするための後処理
としてレーザーアニールを施した結晶でも、グレ
インサイズは数10μｍの大きさの単結晶しか得ら
れていない。さらに該グラフオエピタキシヤル成
長法を実施するには基板に凹凸をつけるため、フ
オトエツチング等を用いた精密なエツチング技術
が必要であつた。 Recently, MWGeis, DCFlanders, and HISmith et al. announced a technique called grapho-epitaxial growth for forming single crystals of silicon on quartz (SiO 2 ) substrates (APPlied Physics Letters). 35 , 71
(1979)). This is an attempt to obtain an oriented single crystal by providing unevenness on the quartz substrate. However, the obtained silicon crystal is polycrystalline, and even after laser annealing as a post-treatment to increase the grain size, only a single crystal with a grain size of several tens of micrometers can be obtained. Furthermore, to carry out the graphoepitaxial growth method, a precise etching technique using photo etching or the like is required in order to create irregularities on the substrate.
以上述べたように基板上にこの基板と異種結晶
構造ないし異種組成を有する単結晶を得るには多
くの欠点があり、困難なのが現状である。 As described above, it is currently difficult to obtain a single crystal having a different crystal structure or composition on a substrate due to many drawbacks.
本発明はこのような現状に鑑みなされたもので
あり、基板と異なる結晶構造ないし組成を有する
単結晶を効率良く、かつ良好に製造する方法を提
供することを目的とする。 The present invention was made in view of the current situation, and it is an object of the present invention to provide a method for efficiently and favorably manufacturing a single crystal having a crystal structure or composition different from that of a substrate.
したがつて、本発明による単結晶の製造方法
は、ガラス状非晶質基板上に、半導体単結晶を製
造するに際し、前記基板上にこの半導体単結晶を
構成する半導体成分それぞれの酸化物を成長さ
せ、次いで徐々に前記酸化物の酸素成分を減少さ
せた酸化物を連続的に成長させ、最終的に半導体
成分のみを成長させることを特徴とするものであ
る。 Therefore, in the method for manufacturing a single crystal according to the present invention, when manufacturing a semiconductor single crystal on a glassy amorphous substrate, oxides of each of the semiconductor components constituting the semiconductor single crystal are grown on the substrate. The method is characterized in that an oxide in which the oxygen component of the oxide is gradually reduced is successively grown, and finally only the semiconductor component is grown.
かかる本発明による半導体単結晶の製造方法に
よれば、基板と異なる結晶構造ないし組成を有す
る半導体単結晶を良好かつ効率的に成長させうる
と言う利点がある。 The method for manufacturing a semiconductor single crystal according to the present invention has the advantage that a semiconductor single crystal having a crystal structure or composition different from that of a substrate can be grown satisfactorily and efficiently.
本発明を更に詳しく説明する。 The present invention will be explained in more detail.
本発明による半導体単結晶の製造方法によれ
ば、まずガラス状非晶質基板上に半導体単結晶を
構成する半導体成分の酸化物を形成させる。 According to the method for manufacturing a semiconductor single crystal according to the present invention, first, an oxide of a semiconductor component constituting a semiconductor single crystal is formed on a glassy amorphous substrate.
本発明において用いられるガラス状非晶質基板
は限定されるものではなく、基本的にいかなるも
のも用いうる。たとえばガラス板、SiO2膜、
Si3N4膜等を有効に用いることができる。 The glass-like amorphous substrate used in the present invention is not limited, and basically any substrate can be used. For example, glass plate, SiO 2 film,
A Si 3 N 4 film or the like can be effectively used.
かかる基板上に半導体単結晶の構成成分である
半導体成分の酸化物を生成させるわけであるが、
この生成方法は基本的に限定されるものではな
い。たとえば、化学的析出法（Chemical Vapor
Deposition；CVD法）あるいは有機金属を用いる
化学的析出法（Metal Organic Chemical Vapor
Deposition：MOCVD法）等を好ましい方法とし
てあげることができる。これらの方法は酸化物薄
膜形成と半導体単結晶生成が同一装置内で行ない
うるからである。 On such a substrate, an oxide of a semiconductor component, which is a component of a semiconductor single crystal, is generated.
This generation method is basically not limited. For example, Chemical Vapor
CVD method) or chemical deposition method using organic metals (Metal Organic Chemical Vapor method)
Deposition (MOCVD method) etc. can be mentioned as a preferable method. This is because these methods allow oxide thin film formation and semiconductor single crystal production to be performed in the same apparatus.
このように基板上に酸化物を形成した後、徐々
に前記酸化物の酸素分を減少させた酸化物を連続
的に成長させ、最終的に、半導体単結晶成分のみ
を成長させて、半導体単結晶を製造する。 After forming an oxide on the substrate in this way, an oxide with the oxygen content of the oxide gradually reduced is successively grown, and finally only the semiconductor single crystal component is grown to form a semiconductor single crystal. Manufacture crystals.
かかる本発明による方法で半導体単結晶を製造
した場合、良好な単結晶が得られる理由は以下の
ように考えられる。 The reason why a good single crystal can be obtained when a semiconductor single crystal is manufactured by the method according to the present invention is considered to be as follows.
即ち、本発明における半導体単結晶膜と酸化膜
間の界面は、丁度、半導体そのものを直接酸化
（例えば熱酸化、プラズマ酸化）させた、所謂母
体酸化膜と、該半導体系に於て、該母体酸化膜と
該半導体との間の界面が熱的に平衡な状態で存在
しうるが如く、安定に原子間結合が形成されてい
る状態にある。従つて、本発明による方法で得ら
れた半導体単結晶は、先に述べたように基板上に
該基板と異種結晶構造、異種結晶組成を有する単
結晶を成長させる際に遭遇する格子不整合に伴う
結晶歪がない。従つて結晶粒界、転位等の結晶欠
陥の発生がなく、良質の単結晶が得られるのであ
る。 That is, the interface between the semiconductor single crystal film and the oxide film in the present invention consists of a so-called base oxide film in which the semiconductor itself is directly oxidized (e.g., thermal oxidation, plasma oxidation), and a base oxide film in the semiconductor system. The interface between the oxide film and the semiconductor is in a state where interatomic bonds are stably formed, such that the interface between the oxide film and the semiconductor can exist in a thermally balanced state. Therefore, the semiconductor single crystal obtained by the method according to the present invention does not suffer from the lattice mismatch that is encountered when growing a single crystal having a different crystal structure and different crystal composition on a substrate as described above. There is no accompanying crystal distortion. Therefore, crystal defects such as grain boundaries and dislocations do not occur, and a high-quality single crystal can be obtained.
また本発明による方法で製造した半導体単結晶
に於ては、該半導体単結晶直下に界在させる酸化
膜界面付近の組成が、徐々に半導体結晶組成に近
づいて変化しているため、結晶成長後に熱処理を
施すことにより、該界面に存在する原子間の未結
合手（ダングリングボンド）を有効に減少させる
ことができる。即ち、前記熱処理でさらに半導体
単結晶の結晶性を向上できるのである。 Furthermore, in the semiconductor single crystal manufactured by the method according to the present invention, the composition near the interface of the oxide film located directly under the semiconductor single crystal gradually changes to approach the semiconductor crystal composition, so that after crystal growth, By performing heat treatment, dangling bonds between atoms existing at the interface can be effectively reduced. That is, the heat treatment can further improve the crystallinity of the semiconductor single crystal.
本発明により製造される半導体単結晶は基本的
にいかなるものでもよい。たとえば、Si単結晶あ
るいはGaAs単結晶、InP単結晶等の―Ｖ族半
導体単結晶であることができる。 Basically, the semiconductor single crystal produced according to the present invention may be of any kind. For example, it can be a -V group semiconductor single crystal such as a Si single crystal, a GaAs single crystal, or an InP single crystal.
次に本発明の実施例を説明する。 Next, embodiments of the present invention will be described.
実施例
第１図は本発明による半導体単結晶を製造する
ための装置の一例の模式図であり、図中、１は
SiO2基板、２は基板支持台、３はヒータ、４
１，４２，４３はガスバルブ、５１，５２，５３
はガス流量計、６は反応管、７は排気口を示す。Example FIG. 1 is a schematic diagram of an example of an apparatus for manufacturing a semiconductor single crystal according to the present invention, and in the figure, 1 is
SiO 2 substrate, 2 is a substrate support, 3 is a heater, 4
1, 42, 43 are gas valves, 51, 52, 53
indicates a gas flow meter, 6 indicates a reaction tube, and 7 indicates an exhaust port.
この第１図より明かなようにシリコン単結晶を
成長せしめるSiO2基板１は基板支持台２の上に
置かれており、さらにこの基板支持台２の内部に
基板１を加熱するためのヒータ３が備えられてい
る。さらにガスバルブ４１，４２，４３を開け、
ガス流量計５１，５２，５３を調節することによ
つて、所定の組成を有するガスを反応管６に供給
できるようになつており、排ガスは排気口７より
排出される。 As is clear from FIG. 1, a SiO 2 substrate 1 on which a silicon single crystal is grown is placed on a substrate support 2, and a heater 3 for heating the substrate 1 is placed inside the substrate support 2. is provided. Furthermore, open the gas valves 41, 42, 43,
By adjusting the gas flow meters 51, 52, and 53, a gas having a predetermined composition can be supplied to the reaction tube 6, and the exhaust gas is discharged from the exhaust port 7.
はじめにSiO2基板１上にSiO2を形成させるた
めに、バルブ４１，４２，４３を開放し、４％窒
素稀釈のシランガス、窒素ガス、酸素ガスを流量
計５１，５２，５３により、各々毎分250c.c.、
5000c.c.、250c.c.硫した。基板温度は400〜500℃
で、SiO2膜の成長速度は1000Å／minであつた。
SiO2膜を約5000Å成長させた後、バルブ４３を
漸次閉め、酸素ガスを20c.c.／minの割合で減少さ
せた。この間も酸化膜は形成され酸素ガスの供給
が終結した時点で酸化膜厚は全体で約１μｍであ
つた。酸素ガスの供給が止つた後、基板温度は
950℃に上げられた。これはシリコン結晶の結晶
性を向上させるためである。シリコン結晶膜の成
長速度は約3000Å／minで、約１μｍ成長させ
た。 First, in order to form SiO 2 on the SiO 2 substrate 1, valves 41, 42, and 43 are opened, and silane gas diluted with 4% nitrogen, nitrogen gas, and oxygen gas are supplied every minute using flowmeters 51, 52, and 53, respectively. 250c.c.,
5000c.c., 250c.c. sulfurized. Substrate temperature is 400~500℃
The growth rate of the SiO 2 film was 1000 Å/min.
After growing the SiO 2 film to a thickness of about 5000 Å, the valve 43 was gradually closed to reduce the oxygen gas at a rate of 20 c.c./min. During this time, an oxide film was formed, and the total thickness of the oxide film was about 1 μm when the supply of oxygen gas ended. After the oxygen gas supply is stopped, the substrate temperature will be
The temperature was raised to 950℃. This is to improve the crystallinity of silicon crystal. The growth rate of the silicon crystal film was about 3000 Å/min, and it was grown to about 1 μm.
得られたシリコン結晶膜の表面は金属光沢を有
し、又顕微鏡観察によると結晶粒界は全く見られ
ず均一であつた。さらに該シリコン結晶膜の電子
線回折パタンより単結晶シリコン膜が形成されて
いることが判明した。また該結晶の電気的特性を
測定したところ、キヤリア濃度1.0×1016cm-5、電
子移動度約1000cm2／Ｖ・Ｓを示した。 The surface of the obtained silicon crystal film had a metallic luster, and microscopic observation revealed that it was uniform with no grain boundaries observed at all. Furthermore, it was found from the electron beam diffraction pattern of the silicon crystal film that a single crystal silicon film was formed. Further, when the electrical characteristics of the crystal were measured, it was found that the carrier concentration was 1.0×10 16 cm −5 and the electron mobility was about 1000 cm 2 /V·S.
さらに該結晶を1200℃30分間、H2中でアニー
ルすると電気的特性は大きく改善されキヤリア濃
度約5.0×1015cm-3電子移動度約1300cm2／Ｖ・Ｓを
示した。 Further, when the crystal was annealed in H 2 at 1200° C. for 30 minutes, the electrical properties were greatly improved and a carrier concentration of about 5.0×10 15 cm −3 and an electron mobility of about 1300 cm 2 /V·S were exhibited.
以上はシリコン単結晶成長の場合について述べ
たが、同様の原理でGaAs単結晶を、石英基板上
にMOCVD法を用いて成長させた。 The above description was about silicon single crystal growth, but based on the same principle, GaAs single crystal was grown on a quartz substrate using the MOCVD method.
得られた結晶は、前記実施例のシリコン単結晶
の場合と同様に単結晶性を示した。また結晶の電
気特性も引上法等で作成される単結晶と比べて遜
色のないことが判明した。 The obtained crystal exhibited single crystallinity as in the case of the silicon single crystal in the above example. It was also found that the electrical properties of the crystal were comparable to those of single crystals produced by the pulling method.
以上説明したように、ガラス状非晶質基板上に
半導体結晶を成長させる直前に該半導体組成で構
成される酸化物を始めに成長させ、しかる後酸素
成分を徐々に減じた酸化膜を連続的に界在させる
ことによつて、ガラス状非晶質基板上に於ても良
好な単結晶半導体を成長せしめることが可能とな
つた。従つて、本発明によれば、ガラス状非晶質
物質上の任意の場所に発光素子、電子装置を形成
できる。即ち、LSI、IC等のパツシペーシヨン膜
上での発光素子は光スイツチ等に応用でき、また
FETトランジスタ等の機能素子を前記バツシベ
ーシヨン膜上に３次元的に形成することが可能で
ある。さらに絶縁性ガラス状非晶質基板上に単結
晶を形成すれば、浮遊容量の少ない、また絶縁分
離の不要の集積回路の構成が可能である。ガラス
状基板を用いることが出来るため大面積、低価格
の発光素子、電子装置が実現できる。 As explained above, immediately before growing a semiconductor crystal on a glassy amorphous substrate, an oxide composed of the semiconductor composition is first grown, and then an oxide film with gradually reduced oxygen content is continuously grown. It has become possible to grow a good single-crystal semiconductor even on a glassy amorphous substrate. Therefore, according to the present invention, a light emitting element and an electronic device can be formed anywhere on a glassy amorphous material. In other words, light emitting elements on the passivation film of LSI, IC, etc. can be applied to optical switches, etc.
Functional elements such as FET transistors can be formed three-dimensionally on the buffer film. Furthermore, by forming a single crystal on an insulating glass-like amorphous substrate, it is possible to construct an integrated circuit with less stray capacitance and without the need for insulation separation. Since a glass-like substrate can be used, large-area, low-cost light-emitting elements and electronic devices can be realized.
第１図は本発明による方法を実施するための装
置の一例の模式図である。
１…基板、２…基板支持台、３…ヒータ、４
１，４２，４３…バルブ、５１，５２，５３…ガ
ス流量計、６…反応管。
FIG. 1 is a schematic diagram of an example of a device for carrying out the method according to the invention. 1... Substrate, 2... Substrate support stand, 3... Heater, 4
1, 42, 43... Valve, 51, 52, 53... Gas flow meter, 6... Reaction tube.
Claims (1)
するに際し、前記基板上にこの半導体単結晶を構
成する半導体成分それぞれの酸化物を成長させ、
次いで徐々に前記酸化物の酸素成分を減少させた
酸化物を連続的に成長させ、最終的に半導体成分
のみを成長させることを特徴とする半導体単結晶
の製造方法。1. When manufacturing a semiconductor single crystal on a glassy amorphous substrate, growing oxides of each of the semiconductor components constituting the semiconductor single crystal on the substrate,
A method for manufacturing a semiconductor single crystal, characterized in that an oxide in which the oxygen component of the oxide is gradually reduced is then continuously grown, and finally only the semiconductor component is grown.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6256681A JPS57178317A (en) | 1981-04-27 | 1981-04-27 | Manufacture of semiconductor single crystal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6256681A JPS57178317A (en) | 1981-04-27 | 1981-04-27 | Manufacture of semiconductor single crystal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57178317A JPS57178317A (en) | 1982-11-02 |
| JPS6152971B2 true JPS6152971B2 (en) | 1986-11-15 |
Family
ID=13203961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6256681A Granted JPS57178317A (en) | 1981-04-27 | 1981-04-27 | Manufacture of semiconductor single crystal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57178317A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59104119A (en) * | 1982-12-07 | 1984-06-15 | Fujitsu Ltd | Manufacture of semiconductor device |
| JP2695778B2 (en) * | 1987-03-18 | 1998-01-14 | 株式会社東芝 | Thin film formation method |
-
1981
- 1981-04-27 JP JP6256681A patent/JPS57178317A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57178317A (en) | 1982-11-02 |
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