JPS6150348A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent any erroneous operation due to alpha ray irradiation from happening by a method wherein, after bonding a alpha ray shielding sheet such as silicon and quartz etc. on the surface of active region of semiconductor element, separated individual chips are bonded on a substrate while electrodes are connected to corresponding external conductive means before they are sealed by an insulating cap. CONSTITUTION:A semiconductor chip 14 is bonded on the surface of a ceramics- made insulating base 10 through the intermediary of an adhesive layer 13 and then multiple electrodes are electrically connected to corresponding leads 12 by bonding wires. A alpha ray shielding sheet 17 made of high purity (preferably exceeding 5-9) silicon several 100mum thick including the thickness of another adhesive layer 16 is bonded on the surface of active region of semiconductor chip 14 before or after wire bonding process while a ceramics-made insulating cap 18 is bonded on the base 10 through the intermediary of a low melting point glass layer 19.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which a semiconductor element such as a dynamic memory is sealed.

In general, semiconductor elements are usually sealed with a sealing body made of ceramic, resin, glass, plastic, resin, or the like. Among these sealed bodies (hereinafter referred to as packages), the ceramic materials of ceramic packages in particular contain several ppm of uranium (U) and thorium (Th).
) etc. are included. These impurities are, for example, 16
th proc-ecdings of relief
IIIity Physics (1978).

As stated on page 88 K, it is known that alpha rays are emitted and memory devices malfunction due to these alpha rays. For this reason, the reliability of the semiconductor device may be significantly reduced.

The energy distribution of spontaneous decay of U and Th is 4 to 9 MeV
However, until the alpha rays generated in the package material reach the surface of the material (((because they lose energy due to collisions with molecules, the energy distribution of the alpha rays emitted from the package is O ~
It becomes 9MeV.

When this alpha ray enters the Si vent, it excites electrons,
It runs while losing energy little by little. Therefore, the range of alpha rays in a material is inversely proportional to the density of the material and proportional to its initial energy. In Si, when electrons are excited at 3.5 eV and 5 Me V, the range is about 25 μm. Also, when electrons are excited in Si, holes are also generated,
Electron-hole bears are generated along the locus of α rays. If the number of excited electrons is 1 and the a-ray energy is 5 M e V, then Ne: 5 MeV/8 .6eV = 1-4 X I
There are O' pieces. This amounts to an amount of electricity of 0.22 pgrons.

Thereafter, the charge disappears due to diffusion and recombination due to the concentration gradient, but when this charge is captured by the bias and has a value that cannot be ignored compared to the amount of charge under a certain boundary condition of the pellet,
It will malfunction. This malfunction occurs without damaging the physical properties of the device, so it is a soft error (5of
Error).

It has already been proposed to apply a resin coating. However, in this case, it is difficult to uniformly apply a resin coating to the desired thickness of 70 μm or more, and applying a resin coating to the semiconductor chip after wire bonding reduces assembly yield and reliability. It has drawbacks such as being easy to use.

A method for manufacturing a semiconductor device that protects against alpha rays by directly coating the surface of a semiconductor chip, including the active region, with a high-purity material is described in Japanese Patent Laid-Open No. 55-088356.

An object of the present invention is to provide a method for manufacturing a semiconductor device that prevents malfunctions due to alpha ray irradiation in the active region without having such drawbacks.

The method for manufacturing a semiconductor device according to the present invention involves attaching an α-ray shielding plate made of a high-purity material such as silicon or quartz to the surface of the active region of a semiconductor element, cutting it into individual chips, and fixing the chips to a substrate. It is characterized by connecting and sealing the electrodes on the chip and the corresponding conduction means with the outside.Hereinafter, the embodiments shown in the accompanying drawings will be described in detail.

FIG. 1 shows a semiconductor device according to an embodiment of the present invention, in which an adhesive layer 13't made of an Au foil or an Au metallized layer is provided on the bottom surface of a recess at the center of the upper surface of an insulating base 10 made of ceramics. - A semiconductor chip 14 is fixed thereto. The semiconductor chip 14 is made of, for example, silicon, and typically has 4 to 5 active regions on its surface that are prone to malfunction due to alpha ray irradiation, including memory cells, etc., which will be described later.
It is formed over a depth of μm. A large number of electrodes on the semiconductor chip 14 are electrically connected to corresponding leads 12 by a large number of bonding wires.

The active region surface of the semiconductor chip 14 is coated with a high purity (preferably five-fiber) adhesive layer 16 of several hundred μm thick, such as 911 burr/silicate glass or lead glass, before or after wire bonding. 9 or more) An α-ray shielding plate 17 made of silicon is attached.

FIG. 2 shows the semiconductor chip 14 after the shielding plate 17 has been attached.
14a is a board/board pad (electrode). It is preferable that the α-ray shielding plate 17 made of NRICON is subjected to surface oxidation treatment in advance to impart insulation properties.

In addition, the α-ray shielding plate 17 may be made of an aluminum plate with an oxidized surface, a quartz plate, a fluororesin such as Teflo/(trade name), or a polyimide such as polyimide-indo-quinazolindioy (referred to as PI polymer). A plate material made of resin can be used. Here, the Teflon plate is preferably attached with glass or PI polymer applied by the Novi/On method. 1. If an adhesive that requires drying is used as the adhesive layer 16, the VC will be the α-ray shielding plate 17.
A large number of small holes may be provided in advance and a mesh-like isopressure process is performed.This has the effect of facilitating drying.

On the other hand, the ceramic insulating cap 18 has a recess 18a in the center of one main surface, and is placed over the base 10 with the recess 18a facing the semiconductor chip 14. A low melting point glass layer 19 is previously attached to the joint surface of the cap 18 facing the base 10, and after the cap 18 is superimposed on the base 10, it is heated to the melting point of the sealing glass layer 19 and then cooled. The base 10 and the cap 18 are bonded together.

In the above configuration, α rays are transmitted to the base 10 and the carrier l.
y 7.18°-4g 5 i, ,2. □
Ka9-X! Of these, the alpha rays emitted from the base IO cause malfunctions before reaching the active region on the chip surface because the semiconductor chip 14 has a thickness of 150 to 500 μIn. Since it has been weakened to the point where it cannot be caused, it is hardly a problem. Therefore, the problem is the α rays from the cap 18 and the sealing glass layers 11 and 19, but the α rays from the cap 18 are sufficiently contained by the shielding plate 17, and the sealing glass/fall, 17 The shielding plate 17 can sufficiently block alpha rays from the active region of the chip surface that have a relatively large angle of incidence with respect to the active region. Of the α rays emitted from the sealing glass layer 11.19, the α rays enter the active region trap from the side of the chip 14 without passing through the shielding plate 17, because the angle of incidence is shallow. Since the acting force is originally not very strong, it is often not a problem.

Therefore, according to the method of manufacturing a semiconductor device of the present invention described above, malfunctions in the active region due to α rays can be effectively prevented. Furthermore, since the shielding plate 17 is pre-formed, there is an advantage that variations in thickness are much smaller than in the conventional case of mere resin coating. Moreover, the shielding plate 17
Since it also functions to protect the chip surface, for example, when handling the semiconductor chip 14, the shielding plate 17 can be directly adsorbed with a vacuum chuck or the like, which has the advantage of making the chip 14 easier to handle. Note that the shielding plate 17 can be attached to the chip 14 even in a wafer state where the chip 14 forms one area of the wafer, and the shielding plate 17 can be attached only to the chip area determined to be good in the wafer inspection. The wafer may be selectively pasted and then the wafer may be divided to obtain individual chips. In this case also, the shielding plate 17 chemically or physically protects the chip area or chips from the outside world. It is something that can be done.

As described above, the semiconductor device to which the present invention is applied includes a semiconductor chip in which an active region is formed that may malfunction due to alpha ray irradiation. Let me explain a few things.

FIG. 3 shows the memory cell structure of an MO8O8 type diami RAM (random access memory), and its equivalent circuit is shown in FIG.

20 is a P-type silicon substrate, on the surface of which a thick unyield SiO□ film 21 is formed, and within the opening of this 5in2 film 21 a thin Sin film 21A is formed. 22 is an N+ type diffusion region, 23 is a first low-resistance poly 7 silicon layer, 24 is a glabellar insulating film made of licade glass, 25 is a second low-resistance poly 7 silicon layer, and 26 is a pan 7 made of phosphorus silicate glass. Pation membrane. A part of the second polyrecon layer 25 disposed on the 5102 film 21A acts as a gate of an MO8 type transistor Q whose source region is the N+ type diffusion region 22, and the N+ type north region 22 is connected to the digit line DG. On the other hand, the second polyline/layer 25 is connected to the word line W. The substrate surface portion 20A corresponding to the drain region of the transistor Q forms an information storage capacitor C together with a portion of the first polyrecon layer 23 located thereon via the Sin film 21A. Connected to source ■. The writing of information charges into the capacitor C and the reading of information charges from the capacitor C are controlled by the switching action of the transistor Q.

A large number of memory cells having the above configuration are formed in the semiconductor chip described above to constitute a RAM.
As the storage capacity of A ki increases, the integration density increases,
Cell size becomes smaller. For this reason, in MO8O8 type diami RAM with a storage capacity of 16 bits or more,
The capacitor C has a very small capacitance/tance, and the generation of electron-hole pairs when α rays enter the substrate surface area 20A easily causes stored information to be reversed, resulting in a so-called soft error. be.

Therefore, the 1
If applied to the MO8 type dynamic RAM, such soft errors can be prevented.

FIG. 5 shows an equivalent circuit diagram of a memory cell structure of a BCL (emitter power, pulled logic) type bipolar dynamic RAM to which the present invention is applied. The illustrated memory cell includes multi-emitter transistors Q1. Q2 and resistors R, , R, constitute a flip-flop, where oo is a potential source, AD is an address line, and D and D are data lines, respectively. Even in a bipolar RAM having such a memory cell structure,
Particularly in large-capacity, highly integrated devices, electron-hole pairs generated by α-ray irradiation easily reverse the flip-flop state, causing soft errors.

Such soft errors can also be effectively prevented by applying the present invention, as in the case of the MO8 type RAM described above.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a top view of a single conductor chip to which an α-ray shielding plate is fixed, and FIG. 3 is a cross-sectional view showing a semiconductor device to which the present invention is applied. FIG. 4 is a cross-sectional view of a substrate showing the memory cell structure of a certain MO8 type RAM, and FIG. 4 is an equivalent circuit diagram of the memory cell of FIG. 3. FIG. 5 is an equivalent circuit diagram showing a memory cell structure of a bipolar RAM to which the present invention is applied. 10... Insulating base, 11.19... Sealing glass layer, 14... Semiconductor chip, 16... α-ray shielding plate, 1
8...Insulating cap. Figure 1 Figure 2

Claims (1)

[Claims] 1. (a) A step of preparing a semiconductor wafer, (b) A step of forming a plurality of elements including an active region and an electrode on the surface of the semiconductor wafer, and (c) At least an activation of the semiconductor wafer. (d) Obtaining individual semiconductor chips from the semiconductor wafer on which the insulating α-ray shielding plate is attached at least on its surface; (e) a step of electrically connecting the electrodes of the semiconductor chip and the corresponding external conduction means using a bonding wire; and (f) the semiconductor chip, the external conduction means, and the bonding. 1. A method for manufacturing a semiconductor device, comprising the step of sealing at least a portion of a wire with a sealing body. 2. The sealing body is composed of a ceramic insulating cap and a ceramic insulating base, and the means for communicating with the outside is a connection between the ceramic insulating cap and the ceramic insulating base. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the leads are bonded with a sealing glass layer interposed therebetween. 3. Claim 1, characterized in that at least the surface thereof is made of a polyimide resin having an insulating property.
A method for manufacturing a semiconductor device according to section 1.