JPS6145857B2 - - Google Patents
Info
- Publication number
- JPS6145857B2 JPS6145857B2 JP52119191A JP11919177A JPS6145857B2 JP S6145857 B2 JPS6145857 B2 JP S6145857B2 JP 52119191 A JP52119191 A JP 52119191A JP 11919177 A JP11919177 A JP 11919177A JP S6145857 B2 JPS6145857 B2 JP S6145857B2
- Authority
- JP
- Japan
- Prior art keywords
- external connection
- thin metal
- semiconductor element
- connection
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 25
- 239000002184 metal Substances 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85191—Translational movements connecting first both on and outside the semiconductor or solid-state body, i.e. regular and reverse stitches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の製造方法に関し、特に組
立における金属細線の接続方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for connecting thin metal wires during assembly.
従来、半導体装置の組立において、半導体素子
と外部接線リードとの電気的接続を金属細線によ
つて行なう場合、その接続方法は常に半導体素子
より外部接続リードに行なわれていた。まれには
逆に外部接続リードから半導体素子へ行なう場合
もあつたが、いずれにしても接続する向きが一定
であつた。この方法では、接続にかかる時間とと
もに次の接続を行なう為の復帰時間が必要となり
設備能力の向上を妨げていた。 Conventionally, when assembling a semiconductor device, when electrical connection is made between a semiconductor element and an external tangential lead using a thin metal wire, the connection is always made to the external connection lead rather than the semiconductor element. In rare cases, the connection was made from the external connection lead to the semiconductor element, but in any case, the connection direction remained constant. This method requires time for connection as well as return time for the next connection, which hinders improvement in equipment capacity.
第1図は従来の半導体素子と外部接続リードと
を金属細線で接続する方法を説明する平面図であ
る。 FIG. 1 is a plan view illustrating a conventional method of connecting a semiconductor element and external connection leads using thin metal wires.
半導体素子塔載部11に塔載された半導体素子
12の電極部13,14と外部接続リード15,
16は金線17でNTC接続法で接続される。こ
のときの接続方向はすべて半鎮導体素子電極から
外部接続リードへと行なわれる。金線を供給しか
つ熱圧着させるための治具(以下ツールと称す)
は半導体素子電極13から外部接続リード15へ
と金線17の接続を行ない、次の接続のため18
の経路で半導体素子電極14の位置に戻る。この
18の動きが設備能力向上を妨げる要因の一つと
なつていた。 The electrode parts 13 and 14 of the semiconductor element 12 mounted on the semiconductor element mounting part 11 and the external connection leads 15,
16 is connected with a gold wire 17 using the NTC connection method. At this time, all connections are made from the half-conductor element electrode to the external connection lead. A jig for supplying gold wire and thermocompression bonding (hereinafter referred to as a tool)
Connects the gold wire 17 from the semiconductor element electrode 13 to the external connection lead 15, and connects the gold wire 18 to the external connection lead 15 for the next connection.
It returns to the position of the semiconductor element electrode 14 along the route . These 18 movements were one of the factors hindering the improvement of equipment capacity.
本発明は上記欠点を除き、半導体装置製造時の
金属細線接続において、接続後の復帰時間を短か
くし、生産能率を向上させる半導体装置の製造方
法を提供するものである。 The present invention eliminates the above-mentioned drawbacks and provides a method for manufacturing a semiconductor device, which shortens the recovery time after connection and improves production efficiency in metal wire connection during semiconductor device manufacturing.
本発明は、半導体装置の半導体素子と外部接続
リードとの間を金属細線で接続する工程におい
て、少くとも接続の一部で接続方向を接続のたび
に逆方向にとることを特徴とする。 The present invention is characterized in that, in the step of connecting a semiconductor element of a semiconductor device and an external connection lead with a thin metal wire, the connection direction is reversed every time at least a part of the connection is made.
本発明を実施例により説明する。 The present invention will be explained by examples.
第2図は本発明の半導体素子と外部接続リード
とを金属細線で接続する方法の1実施例を説明す
る平面図である。 FIG. 2 is a plan view illustrating an embodiment of the method of connecting a semiconductor element and external connection leads with thin metal wires according to the present invention.
金属細線の接続は、半導体素子電極13から外
部接続リード15へ行なわれ、次の接続は前とは
逆に外部接続リード16から半導体素子電極14
へ行なわれる。このため、最初の接続と2回目の
接続の間のツールの動きは21の如くなり、第1
図で示した従来方法でのツールの動き18より少
ない動きで次の接続を可能ならしめる。 The connection of the thin metal wire is made from the semiconductor element electrode 13 to the external connection lead 15, and the next connection is from the external connection lead 16 to the semiconductor element electrode 14 in the opposite direction.
to be carried out. Therefore, the movement of the tool between the first connection and the second connection is as shown in 21, and the first
The next connection can be made with less tool movement 18 than in the conventional method shown in the figure.
以下この様に前回とは逆の接続方向をくりかえ
すことに依り一つの半導体装置の結線に要する時
間が短縮出来、設備能力が向上し、製品のコスト
ダウンに大きく寄与することが出来る。 Thereafter, by repeating the connection direction in the opposite direction to the previous one, the time required to connect one semiconductor device can be shortened, the equipment capacity can be improved, and this can greatly contribute to reducing the cost of the product.
第1図は従来の半導体素子と外部接続リードと
を金属細線で接続する方法を説明する平面図、第
2図は本発明の半導体素子と外部接続リードとを
金属細線で接続する方法の1実施例を説明する平
面図である。
11……半導体素子塔載部、12……半導体素
子、13,14……半導体素子電極、15,16
……外部接続リード、17……金線、18,21
……ツールの動き。
FIG. 1 is a plan view illustrating a conventional method of connecting a semiconductor element and an external connection lead with a thin metal wire, and FIG. 2 is an implementation of the method of connecting a semiconductor element and an external connection lead with a thin metal wire according to the present invention. It is a top view explaining an example. 11... Semiconductor element mounting part, 12... Semiconductor element, 13, 14... Semiconductor element electrode, 15, 16
...External connection lead, 17...Gold wire, 18,21
...The movement of the tool.
Claims (1)
外部接続リードとをそれぞれ1本の金属細線で接
続する工程において、1対の電極および外部接続
リード間を金属細線で接続を完了した電極もしく
は外部接続リードの個所において金属細線はその
溶着部から切断されこれにより金属細線を引き出
さない状態でボンデイング治具を、前記完了した
個所が電極の場合は隣りの電極上へ前記完了した
個所が外部接続リードの場合は隣りの外部接続リ
ード上へ移動させ、しかる後に隣りの電極および
外部接続リード間の金属細線による接続を行い、
これにより、1対の電極および外部接続リード間
を接続するボンデイング治具の動きとその隣りに
位置する1対の電極および外部接続リード間を接
続するボンデイング治具の動きとはたがいに逆方
向となつていることを特徴とする半導体装置の製
造方法。1. In the process of connecting a plurality of electrodes provided on a semiconductor element and a plurality of external connection leads each with a single thin metal wire, the electrode or external At the location of the connection lead, the thin metal wire is cut from its welded part, so that the bonding jig is moved without pulling out the thin metal wire, and if the completed location is an electrode, the bonding jig is placed on the adjacent electrode so that the completed location is connected to the external connection lead. In this case, move it onto the adjacent external connection lead, then connect the adjacent electrode and external connection lead with a thin metal wire,
As a result, the movement of the bonding jig that connects a pair of electrodes and external connection leads is opposite to the movement of the bonding jig that connects a pair of electrodes and external connection leads located next to it. 1. A method for manufacturing a semiconductor device, characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11919177A JPS5452466A (en) | 1977-10-03 | 1977-10-03 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11919177A JPS5452466A (en) | 1977-10-03 | 1977-10-03 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5452466A JPS5452466A (en) | 1979-04-25 |
JPS6145857B2 true JPS6145857B2 (en) | 1986-10-09 |
Family
ID=14755161
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11919177A Granted JPS5452466A (en) | 1977-10-03 | 1977-10-03 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5452466A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59195856A (en) * | 1983-04-20 | 1984-11-07 | Fujitsu Ltd | Semiconductor device and manufacture thereof |
-
1977
- 1977-10-03 JP JP11919177A patent/JPS5452466A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5452466A (en) | 1979-04-25 |
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