JPS59125646A - Manufacture of semiconductor single phase full-wave rectifier element - Google Patents

Manufacture of semiconductor single phase full-wave rectifier element

Info

Publication number
JPS59125646A
JPS59125646A JP80883A JP80883A JPS59125646A JP S59125646 A JPS59125646 A JP S59125646A JP 80883 A JP80883 A JP 80883A JP 80883 A JP80883 A JP 80883A JP S59125646 A JPS59125646 A JP S59125646A
Authority
JP
Japan
Prior art keywords
frame
phase full
substrate
strips
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP80883A
Other languages
Japanese (ja)
Inventor
Atsushi Maruyama
篤 丸山
Shigeyuki Ishii
石井 重幸
Yukio Murakami
村上 幸男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP80883A priority Critical patent/JPS59125646A/en
Publication of JPS59125646A publication Critical patent/JPS59125646A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

PURPOSE:To simplify the steps of manufacturing a semiconductor single phase full-wave rectifier and to reduce the cost by punching a metal plate to integrally form a plurality of strips formed of a substrate supported to a frame and terminals and positively utilizing the frame as a waste in the steps. CONSTITUTION:Two strips 7 which are formed of a substrate 5 of substrantially square shape and terminals 6 by a method such as punching a metal plate, and two strips 9 which are formed of an L-shaped substrate 8 and terminals 6 are formed integrally with a frame 10, and semiconductor elements 11 are carried on both ends of the substrate 8. The elements on the adjacent different substrates via L-shaped conducting means 12 are connected so as to become the same voltage as the substrate 5 disposed between the elements. The terminals 6 side are bent substantially perpendicularly together with the frame 10 along a boundary A-A', cut to remove the frame 10 of unnecessary part, and a single phase full-wave unit rectifier is formed.

Description

【発明の詳細な説明】 本発明は製作簡単な半導体単相全波整流素子の製造方法
に関する0 この種の半導体装置として従来は、第1図の上面図a及
び側面図すに示すように、素子固定用基板1と半導体素
子2および内部接続リード線3を、それぞれ1個1個半
田付或は溶接にて固定して内部エレメントを形成した後
、内部エレメントにおける内部接続リード線3をフォー
ミング加工したものを4個、外部導出端子4にそれぞれ
接続して第2図のように配線し、これを樹脂封止して半
導体単相全波整流単位素子を構成していた。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor single-phase full-wave rectifying device that is easy to manufacture. Conventionally, this type of semiconductor device has a structure as shown in a top view a and a side view of FIG. After forming an internal element by fixing the element fixing substrate 1, semiconductor element 2, and internal connection lead wire 3 one by one by soldering or welding, the internal connection lead wire 3 in the internal element is formed. Four of them were connected to the external lead-out terminals 4, wired as shown in FIG. 2, and sealed with resin to form a semiconductor single-phase full-wave rectifier unit element.

しかしながら、これでは製作が面倒であるばかりかコス
トが高くなってしまうため、最近のように低床な素子が
要求される現状においては到底要求に応えることができ
ない。
However, this method is not only cumbersome to manufacture but also increases cost, so it cannot meet the current demand for low-profile devices.

本発明は上記に鑑みなされたもので、一枚の金属板を打
ち抜き等の方法により、略正方形状の基板を有する2つ
の皮帯と、L状の基板を有する2つの皮帯とを同一形状
の基板が交互にかつ対向してなるように枠体と一体的に
形成し、このL状基板の両端に半導体素子を搭載して一
対のL形導電手段番こより所定の接続を行なった後、隣
接する皮帯の基板と端子との一連の境目に沿って端子側
を基板から枠体とともに略直角に折り曲げ、次いで不必
要部である枠体を切除して単相全波整流単位素子を構成
するこきにより、製作容易で安価な半導体単相全波整流
素子を提供することを目的とする。
The present invention has been made in view of the above, and uses a method such as punching out a single metal plate to form two leather bands having substantially square substrates and two leather bands having L-shaped substrates into the same shape. After forming the L-shaped substrates integrally with the frame so that they are arranged alternately and facing each other, mounting semiconductor elements on both ends of the L-shaped substrates, and making a predetermined connection using a pair of L-shaped conductive means, Fold the terminal side of the adjacent skin strip along a series of boundaries between the board and the terminal at approximately right angles from the board to the frame, and then remove the unnecessary part of the frame to form a single-phase full-wave rectifier unit element. The object of the present invention is to provide a semiconductor single-phase full-wave rectifier that is easy to manufacture and inexpensive.

以下に本発明を実施例により図面とともに説明する。The present invention will be explained below using examples and drawings.

第3図a乃至dは、第2図で示した単相全波整流回路を
構成するための本発明の一実施例を説明する組立図であ
る。まず同図aに示すようζこ一枚の金属板を打ち抜き
等の方法により、略正方形状の基板5とそれに連なる端
子6からなる2つの皮帯7と、L状の基板8とそれlこ
連なる端子6からなる2つの皮帯9とを、同一形状の基
板が交互にかつ対向してなるように枠体10とともに一
体的に形成し、L状基板8の両端には、半導体素子11
を搭載する。この場合単相全波整流回路を構成するため
、素子の極性は第4図の概略図a、bに示すように素子
の両側に位置する2つの素子の極性は異なる様ζこ、換
言すれば必ず同一極性の素子が隣りあうようにする必要
がある。次に第3図1)に示すように、一対のL形導電
手段12にて隣りあう異なる基板上の素子を相互にかつ
素子に挟まれた基板5と同電位となるよう所定の接続を
行なう。
FIGS. 3a to 3d are assembly diagrams illustrating an embodiment of the present invention for constructing the single-phase full-wave rectifier circuit shown in FIG. 2. First, as shown in FIG. Two skin strips 9 made up of continuous terminals 6 are integrally formed with the frame 10 so that substrates of the same shape alternate and face each other, and semiconductor elements 11 are provided at both ends of the L-shaped substrate 8.
Equipped with In this case, since a single-phase full-wave rectifier circuit is configured, the polarity of the element is such that the polarity of the two elements located on both sides of the element are different, as shown in the schematic diagrams a and b of Fig. 4. In other words, It is necessary to ensure that elements of the same polarity are adjacent to each other. Next, as shown in FIG. 3 (1), a pair of L-shaped conductive means 12 is used to connect the elements on different adjacent substrates in a predetermined manner so as to have the same potential with each other and with the substrate 5 sandwiched between the elements. .

このL形導電手段12は第5図の一部断面図に示すよう
に素子11と基板5との高さの違いtこ適応してあらか
じめ曲げ加工が施されている。
This L-shaped conductive means 12 is bent in advance to accommodate the difference in height between the element 11 and the substrate 5, as shown in the partial cross-sectional view of FIG.

更ζここのように構成した内部エレメントを、A−A’
部で表される隣接する皮帯7および9の基板5.8とW
jA−子6との一連の境目に沿って、同図Cに示すよう
に端子6側を基板から枠体1oとともに略直角lこ]斤
り曲げる。
Furthermore, the internal element configured as shown here is A-A'
Substrates 5.8 and W of adjacent skin bands 7 and 9 represented by
Along a series of boundaries with the jA-child 6, as shown in FIG.

この後B −B’部を切断して不必要部分である枠体1
0を取り除くことにより、同図dに示すように単相全波
整流単位素子を構成し、これを例えば表面処理した後モ
ールドケースに収容して樹脂封止するか或は射出成形法
により樹脂封止にて完成する。
After this, cut the B-B' part and remove the unnecessary part of the frame 1.
By removing 0, a single-phase full-wave rectifier unit element is constructed as shown in d of the same figure, and this is, for example, subjected to surface treatment and then housed in a molded case and sealed with resin, or resin-sealed by injection molding. Completed at the end.

このようζこ上記実施例によれば一連の製造工程にて単
相全波整流単位素子が構成されるため、単位素子当りの
半田付工程、切断工程が極めて簡略化され量産的となり
コストが低減される。更に皮帯の折り曲げ行程において
、枠体は皮帯に付属したまま一体的に折り曲げられるた
め、各皮帯をひとつひとつ折り曲げる場合に比べ各皮帯
における曲げ位置、曲げ角度の不揃いがなく、また作業
面でも極めて合理化される。これは後述する一組の支体
を連鎖状に複数形成する場合には特に効果が大きい。ま
た、枠体の折り曲げ位置にあらかじめ印を設けるように
すれば、折り曲げ時の位置決めを容易にすることができ
る。
In this way, according to the above embodiment, a single-phase full-wave rectifier unit element is constructed through a series of manufacturing processes, so the soldering process and cutting process per unit element are extremely simplified, allowing for mass production and reducing costs. be done. Furthermore, during the folding process of the leather band, the frame body is bent integrally with the leather band, so there is no irregularity in the bending position and bending angle of each leather band compared to the case where each leather band is folded one by one. But it's extremely streamlined. This is particularly effective when forming a plurality of sets of support bodies in a chain, which will be described later. Further, if a mark is provided in advance at the bending position of the frame, positioning at the time of bending can be facilitated.

第6図a乃至dは本発明の他の実施例を示すものであり
、上記実施例における半田付行程をより簡略化したもの
である。すなわち同図aに示すように上記実施例にて用
いられたL形導電手段をこの実施例によれば可撓性を有
するL形導電手段13とし、この中央部を同図すの一部
拡大断面図に示すように略正方形状の基板5にリベット
14によりかしめることにより、その両端部にて素子1
1を基板8に圧接保持することを特徴とする。これを前
記実施例同様、A−A’部を境として端子側を基板から
枠体とともに略直角に折り曲げた後、同図Cに示すよう
に溶融した半田浴15に基板部分を浸漬する半田デイツ
プ法、あるいは同図dに示すように溶融した半田浴15
の上面で基板部分を滑動させるいわゆる半田バス法によ
り、素子11、基板5,8と導電手段13との半田接続
、及びかしめ部の固着を行なう。この後、不必要部であ
る枠体10を取り除くここにより単相全波整流単位素子
を構成する。
FIGS. 6a to 6d show another embodiment of the present invention, in which the soldering process in the above embodiment is simplified. That is, as shown in Figure a, the L-shaped conductive means used in the above embodiment is replaced with a flexible L-shaped conductive means 13 according to this embodiment, and the central part is partially enlarged. As shown in the cross-sectional view, by caulking the substantially square substrate 5 with rivets 14, the element 1 is attached at both ends thereof.
1 is held in pressure contact with the substrate 8. As in the previous embodiment, after bending the terminal side from the board to the frame at a substantially right angle with the A-A' section as a boundary, the board part is immersed in a molten solder bath 15 as shown in FIG. method, or a molten solder bath 15 as shown in d of the same figure.
By the so-called solder bus method in which the substrate portion is slid on the upper surface of the substrate, the element 11, the substrates 5 and 8, and the conductive means 13 are connected by soldering and the caulked portions are fixed. Thereafter, the frame 10, which is an unnecessary part, is removed, thereby constructing a single-phase full-wave rectifying unit element.

このような」二記実施例によれば、可撓性を有する導電
手段により半導体素子を圧接保持し、半田デイツプ法ま
7こは半田バス法により内部接続が行なわれるため、半
田付は行程が極めて簡略化され組立て時間がより短縮さ
れる。
According to the second embodiment, the semiconductor element is held in pressure contact with the flexible conductive means, and internal connections are made by the solder dip method or the solder bus method, so the soldering process is short. It is extremely simplified and assembly time is further reduced.

なお、上記実施例はいずれも単位素子についての構成を
述べたが、これを実際の製品化に適応する際には、第7
図に示すように半導体単相全波整流単位素子を構成する
一組の皮帯16を金属板17に連鎖状に複数形成するこ
とにより、単位素子を複数個同時に組み立て製造コスト
をより低減することが好ましい。この場合、枠体18が
その製造過程において一貫して付属していることの効果
は大きい。
In addition, although the above embodiments have all described the configuration of the unit element, when applying this to actual production, the seventh
As shown in the figure, by forming a plurality of sets of skin bands 16 constituting a semiconductor single-phase full-wave rectifying unit element in a chain on a metal plate 17, a plurality of unit elements can be assembled at the same time to further reduce manufacturing costs. is preferred. In this case, it is highly effective that the frame 18 is included throughout the manufacturing process.

以上の説明から明らかなように本発明によれば従来のよ
うに個々の半導体素子をリード線を用いて1・個1個半
田付は或は溶接した後組み立てる必要がなく、枠体に支
持される基板と端子からなる複数の皮帯を金属板を打抜
いて一体的に形成し、また廃棄物としての枠体を製造過
程において積極的に利用するため、合理的かつ極めて簡
単な工程で低コストの半導体単相全波整流素子が構成さ
れる。
As is clear from the above description, according to the present invention, there is no need to solder or weld individual semiconductor elements one by one using lead wires and then assemble them, as is the case in the past. By punching out metal plates and integrally forming multiple skin strips consisting of circuit boards and terminals, and by actively using frames as waste material in the manufacturing process, we can achieve low cost through a rational and extremely simple process. A low-cost semiconductor single-phase full-wave rectifier is constructed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a及びbは従来構造を説明するための平面図及び
側面図、第2図は単相全波整DfE回路を示す回路図、
第3図a乃至dは本発明の一実施例を説明するための組
立図、第4図は基板上の素子の極性を示す概略図、第5
図は素子の接続状態を示す一部断面図、第6図は本発明
の他の実施例を説明するためのもので、aは平面図、b
は一部拡大断面図、C及びdは概略図、第7図は本発明
の更に他の実施例を説明する平面図である。 5・・・略正方形状の基板、6・端子、7,9 ・皮帯
、8・・L状の基板、10・・枠体、11 半導体素子
、12 ・L形導電手段。 T 1 図 久                わT 2 区 十 T3 口 久             し こ                        
〆す4 口 久 T 6 巳 久              ら C、(
1a and 1b are plan views and side views for explaining the conventional structure, FIG. 2 is a circuit diagram showing a single-phase full-wave rectifying DfE circuit,
FIGS. 3a to 3d are assembly diagrams for explaining one embodiment of the present invention, FIG. 4 is a schematic diagram showing the polarity of elements on the substrate, and FIG.
The figure is a partial sectional view showing the connection state of elements, and FIG. 6 is for explaining another embodiment of the present invention, a is a plan view, and b
7 is a partially enlarged sectional view, C and d are schematic views, and FIG. 7 is a plan view illustrating still another embodiment of the present invention. 5... Substantially square substrate, 6. Terminal, 7, 9. Leather band, 8.. L-shaped substrate, 10.. Frame, 11. Semiconductor element, 12. L-shaped conductive means. T1 Tsukuwa T2 Kuchiku T3 Kuchihisa Shiko
〆su 4 Kuchihisa T 6 Mihisa et al.C, (

Claims (1)

【特許請求の範囲】 1)一枚の金属板を打ち抜き等の方法により、略正方形
状の基板を有する2つの皮帯と、L状の基板を有する2
つの帯とを同一形状の基板が交互にかつ対向してなるよ
うに枠体と一体的に形成し、前記り状基板の両端に半導
体素子を搭載して一対のL形導電手段により所定の接続
を行なった後、隣接する皮帯の基板と端子との一連の境
目に沿って端子側を基板から枠体とともに略直角に折り
曲げ、次いで不必要部である枠体を切除して単相全波整
流単位素子を構成することを特徴とする半導体単相全波
整流素子の製造方法。 2、特許請求の範囲第1項記載の方法において、L形導
電手段は可撓性を有し、その中央部を略正方形状の基板
にかしめ等にて固定することにより、素子をL状基板に
圧接保持し、この状態で端子を枠体とともに折り曲げた
後、基板部分をはんだディップ法あるいははんだバス法
等により内部接続することを特徴とする半導体単相全波
整流素子の製造方法。 3)特許請求の範囲第1項または第2項記載の方法にお
いて半導体単相全波整流単位素子を構成する一組の皮帯
を金属板に連鎖状に複数形成することを特徴とする半導
体単相全波整流素子の製造方法。
[Scope of Claims] 1) Two leather strips having substantially square substrates and two leather strips having L-shaped substrates are formed by punching a single metal plate or the like.
Two strips are integrally formed with the frame body so that substrates of the same shape are arranged alternately and facing each other, semiconductor elements are mounted on both ends of the strip-shaped substrate, and predetermined connections are made by a pair of L-shaped conductive means. After doing this, the terminal side is bent from the board along with the frame along a series of boundaries between the board and the terminal on the adjacent skin strip, and then the unnecessary part of the frame is cut off to form a single-phase full wave. A method for manufacturing a semiconductor single-phase full-wave rectifier, characterized in that it constitutes a rectifier unit element. 2. In the method described in claim 1, the L-shaped conductive means is flexible, and the element is attached to the L-shaped substrate by fixing its central portion to the substantially square substrate by caulking or the like. A method for producing a semiconductor single-phase full-wave rectifier, which comprises holding the terminal in pressure contact with the frame, bending the terminal together with the frame in this state, and then internally connecting the substrate portion by a solder dip method, a solder bus method, or the like. 3) A semiconductor unit characterized in that a plurality of sets of skin strips constituting a semiconductor single-phase full-wave rectifying unit element are formed in a chain on a metal plate in the method according to claim 1 or 2. A method for manufacturing a phase full-wave rectifier.
JP80883A 1983-01-07 1983-01-07 Manufacture of semiconductor single phase full-wave rectifier element Pending JPS59125646A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP80883A JPS59125646A (en) 1983-01-07 1983-01-07 Manufacture of semiconductor single phase full-wave rectifier element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP80883A JPS59125646A (en) 1983-01-07 1983-01-07 Manufacture of semiconductor single phase full-wave rectifier element

Publications (1)

Publication Number Publication Date
JPS59125646A true JPS59125646A (en) 1984-07-20

Family

ID=11483976

Family Applications (1)

Application Number Title Priority Date Filing Date
JP80883A Pending JPS59125646A (en) 1983-01-07 1983-01-07 Manufacture of semiconductor single phase full-wave rectifier element

Country Status (1)

Country Link
JP (1) JPS59125646A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101937896A (en) * 2010-04-22 2011-01-05 苏州固锝电子股份有限公司 Lead frame for manufacturing rectifier
JP4834657B2 (en) * 2005-02-18 2011-12-14 日本メクトロン株式会社 Sealing structure with gasket
CN106206528A (en) * 2016-09-07 2016-12-07 四川上特科技有限公司 Rectifier bridge based on the suppression of two-way TVS high-voltage pulse and processing technology thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4834657B2 (en) * 2005-02-18 2011-12-14 日本メクトロン株式会社 Sealing structure with gasket
CN101937896A (en) * 2010-04-22 2011-01-05 苏州固锝电子股份有限公司 Lead frame for manufacturing rectifier
CN106206528A (en) * 2016-09-07 2016-12-07 四川上特科技有限公司 Rectifier bridge based on the suppression of two-way TVS high-voltage pulse and processing technology thereof

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