JPS6143465A - Semiconductor device - Google Patents

Abstract

PURPOSE:To contrive to prevent the input resistance layer of a semiconductor device from being fused-cut by heat by a method wherein the heat conducting layers are provided to the input resistance layer and the heat capacity of the input resistance layer is increased. CONSTITUTION:The areas of contact holes 15 and 16 are comparatively smaller and the electrical contact of an input resistance layer 12 with Al layers 19 and 20 is limited to parts only of the upper surface of the input resistance layer 12. Accordingly, the effect to effect the resistivity of the resistance layer 12 is small and the Al layers 19 and 20 are formed on the upper part of the resistance layer 12 with a comparatively larger spreading through insulating layers 13. Therefore, the Al layers 19 and 20, which are coupled thermally with the resistance layer 12, contribute to increasing the heat capacity of the resistance layer 12. Accordingly, the heat of the resistance layer 12, which is generated by current to flow between the contact hole 14 and the contact hole 17, is conducted to the Al layers 19 and 20 which are upper layers. As a result, the polycrystalline silicon being contained in the resistance layer 12 is prevented from being fused-cut by heat.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor device that can prevent a polysilicon input resistance layer of an input protection circuit from being thermally blown out by an instantaneous large current.

[Background Art] In order to prevent dielectric breakdown of the gate oxide film of the MO3 element constituting the internal circuit of a semiconductor device, an input protection ff1 circuit is generally used. This input protection circuit is composed of an input protection resistor, a diode, a clamp MoS transistor, etc., and various circuits have been proposed. For example, to introduce a typical circuit, as shown in Fig. 1, an input protection resistor 2 is inserted in series with the input terminal 1, and a clamp MOS transistor 4 is connected in parallel with the input terminal 3 connected to the internal circuit. It is connected. The gate and source of clamp MOS transistor 4 are both grounded. In such an input protection circuit, a high potential applied to the input pad 1 is released by surface breakdown of the input protection resistor 2 and the clamp MOS transistor 4, so that the high potential is not directly applied to the internal circuit.

By the way, the input protection resistor 2 can be formed by a pattern made of a wiring material such as polysilicon, or by a diffused resistor formed by a diffusion layer formed in a semiconductor substrate. Input protection resistors formed by diffused resistors are usually not applied in CMOS type internal circuits. This is because the diffusion layer of the input protection resistor affects latch-up of the semiconductor device. Therefore, C
Input protection resistors 2 made of polysilicon are generally used in MOS type internal circuits.

While studying an input protection circuit having this type of input protection resistor 2 made of polysilicon, the inventor found the following problems. That is, the patterned input protection resistor 2 is formed on an insulating film, such as a 5i02 oxide film, of a semiconductor substrate, and generally has an elongated shape as shown in FIG. It is a protective resistor, and one end side is connected to the pad 1 by an aluminum wiring 6 through a contactor 1-5.

The other end is connected to the clamp MOS transistor 4 and the input terminal 3 of the internal circuit by an aluminum wiring 8 through a contact 7. Input protection resistor 2 like this
It has been found that when a high voltage is applied to the input protection resistor 2, a high current instantaneously flows through the elongated input protection resistor 2, and the resulting heat causes the part of the input protection resistor 2 to melt down. In the case of the input protection resistor 2 made of a diffused resistor, heat escapes directly to the substrate, but in the case of the input protection resistor 2 made of a polysilicon pattern surrounded by an insulating film, there is no contact other than contacts 5 and 7. This is because there is no place for the heat to escape.

[Object of the Invention] An object of the present invention is to provide a semiconductor device that can prevent thermal melting of the input resistance layer by increasing the heat capacity of the input resistance layer due to the pattern of the input protection circuit.

The above and other objects and novel features of the present invention are as follows:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the Invention A brief outline of typical inventions disclosed in this application is as follows.

That is, by providing a plurality of thermally conductive layers that are thermally coupled to the input resistance layer based on the pattern of the input protection circuit inserted between the input pad and the internal circuit, the overall input resistance layer can be improved. Since the heat capacity can be increased, a semiconductor device can be achieved that can prevent thermal meltdown occurring in the middle of the input resistance layer. Here, the thermally coupled heat conductive layer refers to a layer that increases the heat capacity of the input resistive layer without lowering the electrical resistance of the input resistive layer itself, as will be explained later.

[Example] An example of the semiconductor device of the present invention will be described below with reference to FIGS. 3 and 4.
This will be explained in detail with reference to the drawings.

FIG. 3 is a plan view showing the relationship between the input resistance layer and the thermally conductive layer, and FIG. 4 is a diagram showing the cross-sectional Jnη structure of the semiconductor device of the present invention embodied on a semiconductor substrate.

In FIG. 4, reference numeral 10 denotes a semiconductor substrate, such as a P-type silicon semiconductor substrate. An input protection circuit and an internal circuit are formed on this substrate 10, and FIG. 4 shows the structure around the input resistance layer of the input protection resistor that is part of the input protection circuit.

The surface of the semiconductor substrate 10 is covered with a relatively thick 5t02 oxide film 11 (first insulating layer) formed by thermally oxidizing the substrate 10.

On this SiO□ oxide film 11, an input resistance layer 12 of an input protection circuit is formed by etching polysilicon deposited by the CVD method into a desired shape.

The input resistance layer 12 has an elongated rectangular shape as shown in FIG. 2, and is designed to provide a desired resistance value.

A second insulating layer 13 made of, for example, phosphosilicate glass (PSG) is formed on the input resistance layer 12.
Contact holes 14, 15, 16 are formed in this second insulating layer 13.
, 17 are formed. Moreover, on the second insulating layer 13 after the contact hole is formed, aluminum layers 1.8, 19,
20.21- is formed through necessary vapor deposition and patterning steps. A passivation film 22 such as a PSG film is formed on the top layer.

In FIGS. 3 and 4, contact hole 14.17
The aluminum layers 18 and 21 are the same as before. That is, the aluminum layer 18 connects one end of the input resistance layer 12 to the input pad, and the aluminum layer 21 connects the other end of the input resistance layer 12 to the clamp MO3 element and the input terminal of the internal circuit. by the way.

In the illustrated embodiment, contact holes 15°16 and aluminum JIJ19.20 (fi conductive WJ) are used.
is provided between contact 1 and hole 14.17 of input resistor WJ12.

The contact holes 15.16 are for connecting the upper surface of the human resistor W112 and each aluminum layer 19.20 (thermal conductive layer), but the area of the contact holes 15.16 is relatively small, and Electrical contact between input resistive layer 12 and aluminum layer 19.20 is limited to the top surface only. Therefore.

The influence on the resistance value of the input resistance layer 12 is small6.
The aluminum layer 19,20 is formed with a relatively large extent (rectangular in the example) on top of the input resistance layer 12 through the second insulating layer 13. Therefore, the aluminum f thermally coupled to the input resistance layer 12
f119.20 contributes to increasing the heat capacity of the input resistance layer 12. Therefore, the heat in the input resistance layer 12 generated by the current flowing between the contact hole 14 and the contact hole 17 is transferred to the upper aluminum layer 19, 20, thereby preventing the polysilicon of the input resistance layer 12 from being thermally fused. It is working.

In the above embodiment, two heat conductive layers, that is, aluminum layers 19 and 20 are provided in the input resistance layer 12, but the invention is not limited to this.
Input resistance layer 12 at the contact hole formed on the upper surface of
and the second insulating layer 13 between the aluminum layers.
There is no limit to the number of aluminum layers to be formed as long as the allowance for dimensional margins due to patterning for electrical insulation is taken into account. Similarly, the shape of the aluminum layer (thermal conductive layer) is also limited to the rectangle shown in the example. It is possible to take various shapes.

In addition, although the input resistance layer 12 and the thermally conductive layers 19 and 20 are not limited to polysilicon and aluminum, respectively, it is preferable to select a material for the thermally conductive layer that has higher thermal conductivity than the material for the manual resistance layer. good.

[Effects] As explained above, by providing a new heat conductive layer for the input resistance layer, the heat capacity of the input resistance layer increases, which prevents thermal melting of the input resistance layer and improves the electrostatic breakdown voltage. The effect of doing so can be obtained.

Although the invention made by the present inventor has been specifically described above based on examples, it goes without saying that the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. Nor.

[Field of Application] The present invention can be applied to prevent thermal blowout of an input protection resistor of an input protection circuit, and can be applied to a wide range of CMO5 integrated circuits.

Furthermore, this technique can be used to increase the heat capacity of an element surrounded by an insulating layer or the like having at least a small heat capacity.

[Brief explanation of drawings]

Fig. 1 is a diagram showing a typical circuit of an input protection circuit and its input protection resistor; Fig. 2 is a plan view showing the shape and connection relationship of a conventional input resistance layer inserted between an input pad and an internal circuit; FIG. 3 shows an embodiment of the present invention. FIG. 4, which is a diagram showing the relationship between the shape of the input resistance layer and the heat conductive layer, is a diagram showing a specific cross-sectional structure on the semiconductor substrate of the embodiment shown in FIG. 3. 1... Input pad, 2... Input protection resistor (input resistance N), 3... Internal circuit input terminal, 4... Clamp M
QS transistor, 5, 7... contact, 6.8...
...Aluminum wiring, lO...semiconductor substrate. 11...5i02 oxide film (first B layer), 12...
- Input resistance layer, 13...PSG film (second insulating layer),
14, 15, 16.17... contact hole, 18.2
1... Aluminum layer, 19.20... Aluminum layer (thermal conductive layer), 22... Passivation film. Figure 1 Figure 2t2I Figure 3

Claims (1)

[Claims] 1. On a semiconductor substrate, an input resistance layer with a pattern of an input protection circuit formed on a first insulating layer, and a second insulating layer formed on this input resistance layer; a plurality of heat conductive layers formed on the second insulating layer, each of the heat conductive layers passing through a corresponding contact hole formed in the second insulating layer to the input resistance layer. A semiconductor device characterized by being connected to. 2. The semiconductor device according to claim 1, wherein the thermally conductive layer is formed of a material having higher thermal conductivity than the material constituting the input resistance layer. 3. The semiconductor device according to claim 1 or 2, wherein the thermally conductive layer is made of aluminum, and the input resistance layer is made of polysilicon.