JPS6142862B2 - - Google Patents

Info

Publication number
JPS6142862B2
JPS6142862B2 JP54066409A JP6640979A JPS6142862B2 JP S6142862 B2 JPS6142862 B2 JP S6142862B2 JP 54066409 A JP54066409 A JP 54066409A JP 6640979 A JP6640979 A JP 6640979A JP S6142862 B2 JPS6142862 B2 JP S6142862B2
Authority
JP
Japan
Prior art keywords
vibration
semiconductors
ultrasonic
lead frame
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54066409A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55158651A (en
Inventor
Isao Maeda
Keiji Hazama
Mitsuyoshi Nakatsuka
Shinichi Oota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP6640979A priority Critical patent/JPS55158651A/ja
Publication of JPS55158651A publication Critical patent/JPS55158651A/ja
Publication of JPS6142862B2 publication Critical patent/JPS6142862B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lining Or Joining Of Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP6640979A 1979-05-28 1979-05-28 Molding method for package of semiconductor Granted JPS55158651A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6640979A JPS55158651A (en) 1979-05-28 1979-05-28 Molding method for package of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6640979A JPS55158651A (en) 1979-05-28 1979-05-28 Molding method for package of semiconductor

Publications (2)

Publication Number Publication Date
JPS55158651A JPS55158651A (en) 1980-12-10
JPS6142862B2 true JPS6142862B2 (enExample) 1986-09-24

Family

ID=13314961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6640979A Granted JPS55158651A (en) 1979-05-28 1979-05-28 Molding method for package of semiconductor

Country Status (1)

Country Link
JP (1) JPS55158651A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6263449A (ja) * 1986-08-01 1987-03-20 Hitachi Ltd 半導体装置の製造法

Also Published As

Publication number Publication date
JPS55158651A (en) 1980-12-10

Similar Documents

Publication Publication Date Title
US4701999A (en) Method of making sealed housings containing delicate structures
KR100324652B1 (ko) 초음파 진동 접합 방법
JPS6256111A (ja) 樹脂封止金型
US4305897A (en) Packaging process for semiconductors
JP2007305799A (ja) 半導体装置の製造方法
KR100414464B1 (ko) 압전 장치 및 그 제조 방법
JPS6142862B2 (enExample)
US3585711A (en) Gold-silicon bonding process
JPH11354587A (ja) 発振器のフリップチップ実装方法
JPS59129445A (ja) 半導体装置の製造方法
JP4234889B2 (ja) 電子部品
JPS5910229A (ja) 半導体装置およびその製造方法
JPS58185B2 (ja) 半導体類のパッケ−ジ成形方法
JPH04107955A (ja) 電子回路素子の封止方法
JPS6140135B2 (enExample)
JPS5851423B2 (ja) 半導体類のパッケ−ジ成形方法
JP5025616B2 (ja) 電子部品
JP3813680B2 (ja) 半導体装置の製造方法
JPH03108361A (ja) 半導体集積回路装置
JPH01198052A (ja) 半導体装置およびその製造方法
JPS6012784B2 (ja) 半導体類のパツケ−ジ成形方法
KR0136161Y1 (ko) 마운트 헤드
JPH05114662A (ja) 電子部品用気密封止容器およびその封止方法
JPS6350049A (ja) 樹脂封止型半導体装置
JPH0462948A (ja) 半導体装置