JPS6142191A - Method of producing circuit board - Google Patents

Method of producing circuit board

Info

Publication number
JPS6142191A
JPS6142191A JP16253384A JP16253384A JPS6142191A JP S6142191 A JPS6142191 A JP S6142191A JP 16253384 A JP16253384 A JP 16253384A JP 16253384 A JP16253384 A JP 16253384A JP S6142191 A JPS6142191 A JP S6142191A
Authority
JP
Japan
Prior art keywords
printed wiring
circuit board
copper foil
board
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16253384A
Other languages
Japanese (ja)
Inventor
横田 光雄
吉宏 中村
実 森田
毅 川合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP16253384A priority Critical patent/JPS6142191A/en
Publication of JPS6142191A publication Critical patent/JPS6142191A/en
Pending legal-status Critical Current

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  • Laser Beam Processing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、銅箔張り積層板を銅箔をエッチングして回路
加工を行ない部品を搭載する回路板の製造法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for manufacturing a circuit board in which circuit processing is performed on a copper foil-clad laminate by etching the copper foil to mount components.

(従来の技術) 最近の民生用電子機器等の発展は目ざましく、印刷配線
板製造工程の自動化、部品の自動挿入およびチップ部品
を用いた高密度配線化が実施されるようになっ℃きた。
(Prior Art) Recent developments in consumer electronic devices and the like have been remarkable, and automation of printed wiring board manufacturing processes, automatic insertion of components, and high-density wiring using chip components have come to be implemented.

そこで使用される印刷配線板には、そり、ねじれの少な
く、寸法精度の良いものが要求されるようになった。又
印刷配線板の生産効率の追求がなされ、1枚の鋼箔張り
積層板の中に多数組の製品サイズの印刷配線板の回路を
組み込んだいわゆる集合印刷配線板方式が実施されるよ
うになった。
Printed wiring boards used for this purpose are now required to have less warpage, less twisting, and better dimensional accuracy. In addition, the pursuit of production efficiency for printed wiring boards has led to the implementation of the so-called collective printed wiring board method, which incorporates circuits of multiple product-sized printed wiring boards into a single sheet of steel foil-clad laminate. Ta.

この要求に対して、材料面ではそり、ねじれ、寸法安定
性の良好な材料の選択がなされている。
In order to meet this demand, materials with good warp, twist, and dimensional stability have been selected.

又印刷配線板の生産効率向上策としては、一枚の基板に
多数組の回路を作成した後第1図に示すように打抜加工
時に部品挿入穴をあけると同時に分割可能な穴、ミゾ穴
を加工するいわゆるミシン目2加工がなされたり、ある
いは第2図に示すように部品挿入穴、外形の打抜加工後
、分割する部分にVカットの溝3を加工するいわゆるV
カット加工が実施さ几ている。しかしこれらの方法では
その後の部品挿入、はんだ付け工程で基板われ、あるい
は分割加工による応力解放等によるそり、ねじれ発生が
あり、十分な成果が得られない。
In addition, as a measure to improve the production efficiency of printed wiring boards, after creating multiple sets of circuits on one board, as shown in Figure 1, holes or slots that can be divided at the same time as parts insertion holes are punched during the punching process. A so-called perforation 2 machining is performed, or a so-called V cut groove 3 is machined in the part to be divided after punching the parts insertion hole and outer shape as shown in Figure 2.
The cutting process has been carried out. However, with these methods, satisfactory results cannot be obtained because the board may be warped or twisted during the subsequent component insertion and soldering process, or due to stress release during division processing.

(発明の目的) 本発明の目的は、基板われ、そり、ねじれ等が防止され
、高密度な回路板を精度良く製造する方法を提供するも
のである。
(Object of the Invention) An object of the present invention is to provide a method for accurately manufacturing a high-density circuit board in which board warping, warping, twisting, etc. are prevented.

(発明の構成) 本発明は1枚の鋼箔張り積層板に多数組の製品サイズの
印刷配線板の回路を銅箔を銅箔をエッチングすることに
より形成し、穴明け、外形加工、各種部品搭載、はんだ
付け等の工程終了後、NC制御可能なレーザー切断機で
各種製品サイズに分割することを特徴とする印刷配線板
の製造法である。
(Structure of the Invention) The present invention involves forming multiple sets of product-sized printed wiring board circuits on a single steel foil-clad laminate by etching copper foil, drilling holes, processing the external shape, and forming various parts. This method of manufacturing printed wiring boards is characterized by dividing the printed wiring boards into various product sizes using an NC-controlled laser cutting machine after completing processes such as mounting and soldering.

すなわち本発明は1枚の銅箔張り積層板に多数組の製品
サイズの印刷配線板を印刷加工し、部品搭載、はんだ付
け後分割する方法において、従来のミシン目加工法、■
カット加工法と異なり、部品搭載、はんだ付け後まで一
枚の基板で、最終工程終了後、NC制御可能なレーザー
切断機で分割する電子回路部品の製造法である。
That is, the present invention is a method for printing multiple sets of product-sized printed wiring boards on one copper foil-clad laminate, mounting parts, soldering, and then dividing the board, which eliminates the conventional perforation method.
Unlike the cutting method, this is a method of manufacturing electronic circuit components in which a single board is used until components are mounted and soldered, and after the final process is completed, it is divided using an NC-controlled laser cutting machine.

(発明の効果) 本発明によれば、従来問題となっていた部品搭載、はん
だ付け工程での基鈑われ、そり、ねじれが防止すること
が可能であり、高密度電子回路部品を精度よく生産でき
る。また方式ではレーザー光線の出力等の条件を選択す
れば、従来ミシン目加工、■カット加工ができず集合基
板化が困難であったガラス基材エポキシ銅張積層板ガラ
ス基材ボイ ド銅張積層板他の多(の銅張り積teaに
適用可能である。
(Effects of the Invention) According to the present invention, it is possible to prevent the board from chipping, warping, and twisting during the component mounting and soldering processes, which have been problems in the past, and it is possible to accurately produce high-density electronic circuit components. can. In addition, by selecting conditions such as laser beam output, the method can produce glass-based epoxy copper-clad laminates, glass-based void copper-clad laminates, etc., which were difficult to create assemblies because conventional perforations and cutting processes were not possible. Applicable to many (copper clad tea).

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来の回路板の製造法を示す平面図で
ある。 符号の説明 1、 印刷配線板 2、 みじん目 五 ■溝
FIGS. 1 and 2 are plan views showing a conventional circuit board manufacturing method. Explanation of symbols 1, Printed wiring board 2, Mint 5 ■Groove

Claims (1)

【特許請求の範囲】[Claims] 1、1枚の銅箔張り積層板に多数組の製品サイズの印刷
配線板の回路を銅箔をエッチングすることにより形成し
、穴明け外形加工、各種部品搭載、はんだ付け等の工程
終了後、数値制御可能なレーザー切断機で、各製品サイ
ズに分割することを特徴とする回路板の製造法。
1. On a single copper foil-clad laminate, multiple sets of product-sized printed wiring board circuits are formed by etching the copper foil, and after completing processes such as drilling, shaping, mounting various parts, and soldering, A manufacturing method for circuit boards characterized by dividing them into product sizes using a numerically controllable laser cutting machine.
JP16253384A 1984-08-01 1984-08-01 Method of producing circuit board Pending JPS6142191A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16253384A JPS6142191A (en) 1984-08-01 1984-08-01 Method of producing circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16253384A JPS6142191A (en) 1984-08-01 1984-08-01 Method of producing circuit board

Publications (1)

Publication Number Publication Date
JPS6142191A true JPS6142191A (en) 1986-02-28

Family

ID=15756420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16253384A Pending JPS6142191A (en) 1984-08-01 1984-08-01 Method of producing circuit board

Country Status (1)

Country Link
JP (1) JPS6142191A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006061625A (en) * 2004-08-30 2006-03-09 Olympus Corp Production method of instrument introduced into subject

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006061625A (en) * 2004-08-30 2006-03-09 Olympus Corp Production method of instrument introduced into subject
JP4578899B2 (en) * 2004-08-30 2010-11-10 オリンパス株式会社 Method for manufacturing in-subject introduction device

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