JPS5810889A - Method of dividing board into multiple boards - Google Patents

Method of dividing board into multiple boards

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Publication number
JPS5810889A
JPS5810889A JP10822881A JP10822881A JPS5810889A JP S5810889 A JPS5810889 A JP S5810889A JP 10822881 A JP10822881 A JP 10822881A JP 10822881 A JP10822881 A JP 10822881A JP S5810889 A JPS5810889 A JP S5810889A
Authority
JP
Japan
Prior art keywords
printed circuit
board
punch
dividing
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10822881A
Other languages
Japanese (ja)
Inventor
仁 長谷川
文夫 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10822881A priority Critical patent/JPS5810889A/en
Publication of JPS5810889A publication Critical patent/JPS5810889A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は多数個取り基板の分割方法に係り、ことに量産
性に優れた分割方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for dividing a multi-chip substrate, and more particularly to a method for dividing a multi-chip substrate.

第1図ないし第4図は従来の多数個取り基板の分割方法
の一例を示す説明図で、第1図は回路部品を搭載したミ
シン目穴を有する従来の多数個取り基板を示す正面°図
、第2図は第1図の側面図、第6図は分割によって形成
した印刷回路基板を示す正面図、第4図は第6図の側面
図である。第1図に示す多数個取り基板1は、ミシン目
穴2によって形成されるつなぎ部6を介してそれぞれ回
路部品4を有する8個の印刷回路基板5を連設して成る
ものである。このような基板1は、所定の基板材料にミ
シン目穴2を穿設し、回路部品4を搭載し、はんだ付け
することによって得られる。そして従来にあっては、こ
のような多数個取り基板1を第2図の矢印6に示すよう
に作業者の手により、あるいは治具等によりミシン巨大
2部分、すなわちつなぎ部6において折曲げ、第6.4
図に示すような別体の印刷回路基板5に分割する方法が
行なわれている。
Figures 1 to 4 are explanatory diagrams showing an example of a method for dividing a conventional multi-chip board, and Fig. 1 is a front view showing a conventional multi-chip board having perforations on which circuit components are mounted. , FIG. 2 is a side view of FIG. 1, FIG. 6 is a front view showing a printed circuit board formed by division, and FIG. 4 is a side view of FIG. 6. The multi-chip board 1 shown in FIG. 1 is made up of eight printed circuit boards 5, each having a circuit component 4, arranged in series through connecting portions 6 formed by perforations 2. Such a board 1 is obtained by making perforations 2 in a predetermined board material, mounting circuit components 4 thereon, and soldering them. Conventionally, such a multi-piece board 1 is bent at two large parts of the sewing machine, that is, the joint part 6, by an operator's hand or with a jig or the like, as shown by the arrow 6 in FIG. Section 6.4
A method of dividing the circuit board into separate printed circuit boards 5 as shown in the figure has been used.

しかしこのようにして分割する従来の分割方法にあって
は次に述べる不具合がある。
However, the conventional dividing method of dividing in this way has the following disadvantages.

■ 分割によって形成した印刷回路基板5の端面に第6
図に示すように鋸歯状の基板残部7が発生し、そのだめ
に外形寸法が不整いとなる。
■ A sixth layer is formed on the end surface of the printed circuit board 5 formed by dividing.
As shown in the figure, a sawtooth-like remaining portion 7 of the substrate is generated, and as a result, the external dimensions become irregular.

■ このようにして形成した印刷回路基板5を第5図に
示すように所定のシャーシ8に組込む場合印刷回路基板
5のパターン9の端部とシャーシ8の隙間aが大きくな
りやすく、はんだ付けが困難となりやすい。なお第5図
において10は回路部品のリード足、11ははんだであ
る。また上記の隙間aは一般に1mm前後もあることが
本発明者らによって確認されている。
■ When the printed circuit board 5 formed in this way is assembled into a predetermined chassis 8 as shown in FIG. It can be difficult. In FIG. 5, 10 is a lead leg of a circuit component, and 11 is a solder. Furthermore, the inventors have confirmed that the above-mentioned gap a is generally around 1 mm.

■ 第2図の矢印6方向に折曲げて分割する際の衝撃が
回路部品4およびパターン9に伝わるために、これらの
回路部品4等にクラックが発生しやすい。
(2) Since the impact generated when the circuit parts 4 and the pattern 9 are bent and divided in the direction of the arrow 6 in FIG. 2 is transmitted to the circuit parts 4 and the pattern 9, cracks are likely to occur in these circuit parts 4 and the like.

第6図ないし第10図は従来の多数個取り基板の分割方
法の別の例を示す説明図で、第6図は回路部品を搭載し
たV溝を有する従来の多数個取り基板を示す正面図、第
7図は第6図の下部側面図、第8図は第6図の右側面図
、第9図は分割によって形成した印刷回路基板を示す正
面図、第10図は第9図の側面図である。第6図に示す
多数個取9基板12はV溝16を介してそれぞれ回路部
品14を有する8個の印刷回路基板15を連設して成る
ものである。このような基板12は前述の基板1と同じ
ように、所定の基板材料に■溝加工が施されてV溝16
が形成され、次いで回路部品14が搭載され、はんだ付
けすることによって得られる。そして従来にあっては、
このような多数個取シ基板12を第7図の矢印16に示
すように作業者の手により、あるいは治具等によりV溝
16部分において折曲げ、第9.10図に示すような別
体の印刷回路基板15に分割する方法が行なわれている
6 to 10 are explanatory diagrams showing another example of a method for dividing a conventional multi-chip board, and FIG. 6 is a front view showing a conventional multi-chip board having a V-groove on which circuit components are mounted. , FIG. 7 is a lower side view of FIG. 6, FIG. 8 is a right side view of FIG. 6, FIG. 9 is a front view showing the printed circuit board formed by division, and FIG. 10 is a side view of FIG. 9. It is a diagram. The multi-piece nine board 12 shown in FIG. 6 is made up of eight printed circuit boards 15, each having a circuit component 14, arranged in series via a V-groove 16. Similar to the above-mentioned substrate 1, such a substrate 12 is made of a predetermined substrate material with a groove processed to form a V-groove 16.
is formed, and then the circuit component 14 is mounted and obtained by soldering. And traditionally,
This multi-piece board 12 is bent at the V-groove 16 by hand or with a jig or the like by an operator as shown by the arrow 16 in FIG. 7 to form a separate body as shown in FIG. 9.10. A method of dividing the printed circuit board 15 into several printed circuit boards 15 has been used.

しかしこのようにして分割する従来の分割方法にあって
も次に列挙する不具合がある。
However, even with the conventional dividing method of dividing in this way, there are problems listed below.

■ 分割によって形成した印刷回路基板15の雉面に第
11図に示すようにテーノζ状かつ鋸歯状の基板残部1
7が発生し、そのため外形寸法が不整いとなる。
■ As shown in FIG. 11, the remaining portion 1 of the printed circuit board 15 is shaped like Teenoζ and sawtooth on the pheasant side of the printed circuit board 15 formed by the division.
7 occurs, resulting in irregular external dimensions.

■ このようにして形成した印刷回路基板15を第11
図に示すように所定のシャーシ18に組込む場合、印刷
回路基板15のノくターン19の端部とシャーシ18と
の隙間すが大きくなシやすく、はんだ付けが困難となシ
やすい。なお第11図において、20は回路部品のリー
ド足、21ははんだである。また上記の隙間すは一般に
Q、5mm程度であることが本発明者らによって確認さ
れている。
■ The printed circuit board 15 formed in this way is
When assembled into a predetermined chassis 18 as shown in the figure, the gap between the end of the notch 19 of the printed circuit board 15 and the chassis 18 tends to be large, making soldering difficult. In FIG. 11, 20 is a lead leg of a circuit component, and 21 is a solder. Furthermore, the inventors have confirmed that the above-mentioned gap is generally Q, about 5 mm.

■ 第7図の矢印16方向に折曲げて分割する際の衝撃
が回路部品14、ノ(ターン19に伝わるために、これ
らの回路部品14等にクラックが発生しやすい。
(2) Since the impact when dividing by bending in the direction of arrow 16 in FIG. 7 is transmitted to the circuit components 14 and 19, cracks are likely to occur in these circuit components 14 and the like.

■ V溝加工が必要となるだめ製造原価が高くなる。■ Manufacturing cost increases as V-groove processing is required.

■ ■溝加工の際に生ずる■溝13の深さのばらつきに
よる基板の反りのためにチップ面付部品の搭載は不可能
である。
■ ■ It is impossible to mount components with chip surfaces due to warping of the board due to variations in the depth of the grooves 13 that occur during groove machining.

■ 多数個取り基板12の材質がガラスエポキシ系であ
る場合には、■溝加工に際して刃の摩耗が著しく、この
ため製造原価が高くなる。さらにこの場合には刃の取換
作業力どのために量産性に乏しい不具合もある。
(2) When the material of the multi-cavity substrate 12 is glass epoxy, (2) the blade is significantly worn during groove machining, which increases the manufacturing cost. Furthermore, in this case, there is a problem that mass production is poor due to the labor required to replace the blade.

■ V溝加工は一般に直線方向にしか施すことができな
いので複雑な形状の印刷回路基板の多数個取りには適用
し難い。
(2) Since V-groove processing can generally only be performed in a straight line direction, it is difficult to apply it to manufacturing a large number of printed circuit boards with complicated shapes.

本発明はこのような従来技術における実情に鑑みてなさ
れたもので、その目的は、多数個取り基板から端正な端
面を有する複数の印刷回路基板に分割することができ、
かつ分割時における回路部品等に与える衝撃を最小に抑
制することのできる多数個取り基板の分割方法を提供す
ることにある。
The present invention has been made in view of the actual situation in the prior art, and its purpose is to be able to divide a multi-chip board into a plurality of printed circuit boards having neat end surfaces;
Another object of the present invention is to provide a method for dividing a multi-chip board, which can minimize impact on circuit components and the like during division.

この目的を達成するために本発明は、特定の割り型を用
いて多数個取り基板から複数の単体の印刷回路基板に分
割するようにしてあり、その割り型は、多数個取り基板
に形成され個々の印刷回路基板の境界を形成するつなぎ
部と対向する位置に配置され、かつ該つなぎ部の形状寸
法と同等あるいは少し大きい形状寸法を有する複数のポ
ンチとこれらのポンチが上下動可能に収容される穴およ
び該ポンチの外周を取囲むように配置される基板押え部
および回路部品の取付けられていない部分に配置される
基板押え部および回路部品を収納可能な空洞を有するポ
ンチプレートと、上記ポンチと対向する位置に該ポンチ
が挿入可能な抜き穴を有するダイプレートとから成るよ
うにしである。
To achieve this objective, the present invention uses a specific mold to divide a multi-chip board into a plurality of single printed circuit boards, the mold being formed on the multi-chip board. A plurality of punches are disposed at positions facing the joints forming the boundaries of the individual printed circuit boards, and have shapes and dimensions that are equal to or slightly larger than the joints, and these punches are housed so as to be movable up and down. a punch plate having a hole capable of housing a circuit component; and a die plate having a hole at an opposing position into which the punch can be inserted.

以下、本発明の多数個取り基板の分割方法を図に基づい
て説明する。第12図ないし第16図は本発明の一実施
例を示す説明図で、第12図は回路部品を搭載した多数
個取り基板を示す正面図、第13図は第12図に示す多
数個取り基板の分割時の状態を示す側面図、第14図は
分割によって形成した印刷回路基板を示す正面図、第1
5図は第14図の側面図、第16図は第15図の部分拡
大図である。この第12図に示す多数個取り基板22は
、矩形状の貫通穴23によって形成されるつなぎ部24
を介してそれぞれ面付回路部品25を有する8個の印刷
回路基板26を連設して成るものである。このような基
板22は、所定の基板材料に貫通穴25を穿設し、接着
剤27を介して面付回路部品25を当該基板に固着する
ことによって得られる。なお上記したつなぎ部24は例
えば幅1mm、長さ3mmの矩形形状とすることができ
る。
Hereinafter, a method for dividing a multi-piece substrate according to the present invention will be explained based on the drawings. 12 to 16 are explanatory diagrams showing one embodiment of the present invention, FIG. 12 is a front view showing a multi-chip board on which circuit components are mounted, and FIG. 13 is a multi-chip board shown in FIG. 12. FIG. 14 is a side view showing the state when the board is divided; FIG. 14 is a front view showing the printed circuit board formed by dividing;
5 is a side view of FIG. 14, and FIG. 16 is a partially enlarged view of FIG. 15. The multi-piece substrate 22 shown in FIG.
It is made up of eight printed circuit boards 26 each having a surface-mounted circuit component 25 connected thereto. Such a board 22 is obtained by drilling a through hole 25 in a predetermined board material and fixing the surface-mounted circuit component 25 to the board via an adhesive 27. Note that the above-mentioned connecting portion 24 can have a rectangular shape with a width of 1 mm and a length of 3 mm, for example.

本願にあってはこのような多数個取シ基板22を特定の
割り型を用いて分割するが、その割り型は例えば第13
図に示すような態様になっているすなわち、この割り型
は、ポンチ28とポンチプレート29とダイプレート3
0とからなっているポンチ28は多数個取り基板22の
つなぎ部24と対向する位置に配置され、かつこのつな
ぎ部24の形状寸法と同等あるいは少し大きい形状寸法
、例えば幅1.5 mm、長さ4mmの寸法からなる矩
形形状の断面を持ち、つなぎ部24の数に相応して26
本設けである。またポンチプレート29は、ポンチ28
が上下動可能に収容される穴31と、ポンチ28の外周
を取囲むように配置され、例えば厚さが2mmの基板押
え部62と、回路部品25が増付けられていない部分に
配置され、例えば直径が5mmの基板押え部33と、回
路部品25を収納可能な例えば高さが3mmからなる空
洞34とを具有している。さらにダイプレート30はポ
ンチ28と対向する位置に、このポンチ28が挿入可能
な26個の抜き穴35を具備している。
In the present application, such a multi-cavity board 22 is divided using a specific splitting die, and the splitting die is, for example, the 13th splitting die.
In other words, this split mold has the configuration as shown in the figure, consisting of a punch 28, a punch plate 29, and a die plate 3.
The punch 28 consisting of 0 is disposed at a position facing the connecting portion 24 of the multi-cavity substrate 22, and has a shape and size that is equal to or slightly larger than the connecting portion 24, for example, 1.5 mm in width and 1.5 mm in length. It has a rectangular cross section with a diameter of 4 mm, and has a cross section of 26 mm, corresponding to the number of connecting parts 24.
This is the actual setting. Also, the punch plate 29 is connected to the punch 28
is arranged so as to surround the hole 31 in which is accommodated in a vertically movable manner, the outer periphery of the punch 28, and the substrate holding part 62 having a thickness of, for example, 2 mm, and the part where the circuit component 25 is not added, It has a substrate holding part 33 with a diameter of, for example, 5 mm, and a cavity 34 with a height of, for example, 3 mm, in which the circuit component 25 can be accommodated. Further, the die plate 30 is provided with 26 punch holes 35 at positions facing the punches 28 into which the punches 28 can be inserted.

そして本拠明にあっては上記した割り型を用いすなわち
第13図に示すようにダイプレート30の上に第12図
に示す多数個取り基板22を乗せこの基板22をポンチ
プレート29で押え、ポンチ28を矢印36方向に下降
させることによってつなぎ部24のそれぞれを打抜いて
、8個ノ印刷回路基板26に分割することができる。こ
のようにして形成される印刷回路基板26は、ポンチ2
8による機械的な分割であることから、第1415.1
6図に示すように端面が鋸歯あるいはテーパ状になるこ
とがなく、きわめて端正であり、かつ当該端面がつなぎ
部24の端面より外部に突出することがなく、またポン
チプレート29には基板押え部32.33、および空洞
64を設けであることからポンチ28の下降時における
衝撃の回路部品25に対する影響を最小に抑えることが
できる。このようにして得た印刷回路基板26は第17
図に示すように所定のシャーシ37に組込む場合、印刷
回路基板26のパタニン38の端部とシャーシ37との
隙間Cを小さくでき、例えばQ、2mmにすることがで
きる。従ってシャーシ37とパターン38とのはんだ付
は作業が容易となる。なお同第17図において39はは
んだである。
Then, at our company, we use the above-mentioned split mold, that is, as shown in FIG. 13, we place the multi-cavity substrate 22 shown in FIG. By lowering 28 in the direction of arrow 36, each of the connecting portions 24 can be punched out and divided into eight printed circuit boards 26. The printed circuit board 26 formed in this way is
1415.1 because it is a mechanical division according to 8.
As shown in FIG. 6, the end surface is extremely neat without becoming sawtooth or tapered, and the end surface does not protrude outside from the end surface of the connecting portion 24. Also, the punch plate 29 has a substrate holding portion. 32, 33 and the cavity 64, the influence of impact on the circuit components 25 when the punch 28 is lowered can be minimized. The printed circuit board 26 thus obtained is the 17th printed circuit board 26.
When assembled into a predetermined chassis 37 as shown in the figure, the gap C between the end of the pattern 38 of the printed circuit board 26 and the chassis 37 can be made small, for example Q, 2 mm. Therefore, soldering between the chassis 37 and the pattern 38 becomes easier. In addition, in FIG. 17, 39 is solder.

なお上記説明にあっては、多数個取り基板22上に8個
の印刷回路基板26を連設しであるが、この印刷回路基
板の数は8個に限定されないことはもちろんである。ま
たつなぎ部24の数および一形状寸法、ならびにポンチ
28の数および形状寸法、抜き穴35の数、基板押え部
32.33の厚さ、空洞54の高さも上述したものに限
定されないことはもちろんである。さらに本発明の分割
方法は、第1図に示すようにミシン目穴を有する多数個
取り基板にも適用することができる。
In the above description, eight printed circuit boards 26 are arranged in series on the multi-chip board 22, but it goes without saying that the number of printed circuit boards is not limited to eight. Furthermore, it goes without saying that the number and shape of the connecting portions 24, the number and shape of the punches 28, the number of punch holes 35, the thickness of the substrate holding portions 32 and 33, and the height of the cavity 54 are not limited to those described above. It is. Further, the dividing method of the present invention can be applied to a multi-piece substrate having perforations as shown in FIG.

本願の多数個取り基板の分割方法は以上のように構成し
であることから、端正な端面を有する印刷回路基板を簡
単に得ることができ、かつ分割時におけろ回路部品等に
与える衝撃を最小に抑制することができ、これによって
分割した印刷回路基板の形状寸法が安定し、かつはんだ
付は作業が容易に可能となり、従来に比べて分割作業の
能率が向上するとともに量産性が向上し、原価低減を実
現させることのできろ効果がある。
Since the multi-chip board dividing method of the present application is configured as described above, it is possible to easily obtain printed circuit boards with neat end faces, and to minimize the impact on circuit components etc. during division. As a result, the shape and dimensions of the divided printed circuit boards are stabilized, and the soldering work becomes easier, which improves the efficiency of dividing work and mass productivity compared to the past. This has the effect of reducing costs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図ないし第4図は従来の多数個取り基板の分割方法
の一例を示す説明図で、第1図は回路部品を搭載したミ
ンン目、穴を有する従来の多数個取り基板を示す正面図
、第2図は第1図の側面図、第6図は分割によって形成
した印刷回路基板を示す正面図、第4図は第6図の側面
図、第5図は第3図に示す印刷回路基板をシャーシに組
込む状態を示す部分断面図、第6図乞いし第10図は従
来の多数個取り基板の分割方法の別の例を示す説明図で
、第6図は回路部品を搭載したV溝を有する従来の多数
個取り基板を示す正面図、第7図は第6図の下部側面図
、第8図は第6図の右側面図、第9図は分割によって形
成した印刷回路基板を示す正面図、第10図は第9図の
側面図、第11図は第9図に示す印刷回路基板をシャー
シに組込む状態を示す部分側面図、第12図ないし第1
6図は本発明の一実施例を示す説明図で、第12図は回
路部品を搭載した多数個取り基板を示す正面図第13図
は第12図に示す多数個取シ基板の分割時の状態を示す
側面図、第14図は分割によって形成した印刷回路基板
を示す正面図、第15図は第14図の側面図、第16図
は第15図の部分拡大図、第17図は第14図に示す印
刷回路基板をシャーシに組込む状態を示す部分側面図で
ある。 1.22・・・多数個取り基板 2・・・ミシン目穴   26・・・貫通穴24・・・
つなぎ部    25・・・面付回路部品26・・・印
刷回路基板  27・・・接着剤28 ポンチ    
 29・・・ポンチプレート30・・・ダイグレート 
 61・・・穴32−133・・・基板押え部 ろ4・・空洞      35・・・抜き穴ろ8・・・
パターン 代理人弁理士 中村純之助 才 1 図
Figures 1 to 4 are explanatory diagrams showing an example of a method of dividing a conventional multi-chip board, and Fig. 1 is a front view showing a conventional multi-chip board with holes and holes on which circuit components are mounted. , FIG. 2 is a side view of FIG. 1, FIG. 6 is a front view showing the printed circuit board formed by division, FIG. 4 is a side view of FIG. 6, and FIG. 5 is the printed circuit shown in FIG. 3. Figure 6 is a partial cross-sectional view showing how the board is assembled into the chassis, and Figure 10 is an explanatory diagram showing another example of the conventional method of dividing a multi-chip board. FIG. 7 is a front view showing a conventional multi-chip board with grooves, FIG. 7 is a lower side view of FIG. 6, FIG. 8 is a right side view of FIG. 6, and FIG. 9 is a printed circuit board formed by dividing. 10 is a side view of FIG. 9, FIG. 11 is a partial side view showing a state in which the printed circuit board shown in FIG. 9 is assembled into the chassis, and FIGS.
FIG. 6 is an explanatory diagram showing one embodiment of the present invention, and FIG. 12 is a front view showing a multi-chip board on which circuit components are mounted. FIG. 13 is a diagram showing the multi-chip board shown in FIG. 14 is a front view showing the printed circuit board formed by division, FIG. 15 is a side view of FIG. 14, FIG. 16 is a partially enlarged view of FIG. 15, and FIG. 17 is a front view showing the printed circuit board formed by division. 15 is a partial side view showing a state in which the printed circuit board shown in FIG. 14 is assembled into a chassis. FIG. 1.22...Multi-piece board 2...Perforation hole 26...Through hole 24...
Connecting portion 25... Surface mounted circuit component 26... Printed circuit board 27... Adhesive 28 Punch
29... Punch plate 30... Die rate
61... Hole 32-133... Board holding part slot 4... Cavity 35... Punch hole slot 8...
Pattern agent patent attorney Junnosuke Nakamura 1 Figure

Claims (1)

【特許請求の範囲】[Claims] (1)つなぎ部を介して複数の印刷回路基板を連設して
なる1つの多数個取り基板を、複数の別体の印刷回路基
板に分割する多数個取り基板の分割方法において、上記
つなぎ部と対向する位置に配置され、かつ該つなぎ部の
形状寸法と同等あるいは少し大きい形状寸法を有する複
数のポンチと、これらのポンチが上下動可能に収容され
る穴および該ポンチの外周を取囲むように配置される基
板押え部および回路部品の取付けられていない部分に配
置される基板押え部および回路部品を収納可能な空洞を
有するポンチプレートと、上記ポンチと対向する位置に
該ポンチが挿入可能な抜き穴を有するダイプレートとか
ら成る割り型を用い、上記多数個取9基板を上記ダイグ
レートと上り己ポンチプレートとの間に配置させ、上記
ポンチで上記つなぎ部を打抜くことにより、複数の別体
の印刷回路基板に分割することを特徴とする多数個取り
基板の分割方法。
(1) In a method for dividing a multi-chip board, in which a multi-chip board formed by connecting a plurality of printed circuit boards in series via a joint part is divided into a plurality of separate printed circuit boards, the joint part A plurality of punches are disposed in a position facing the connecting portion and have a shape and size that is equal to or slightly larger than the shape and size of the connecting portion, and a hole in which these punches are accommodated so as to be movable up and down, and a hole that surrounds the outer periphery of the punches. a punch plate having a cavity capable of accommodating a board holding part disposed in the area where the circuit part is not attached, a board holding part placed in the part where the circuit component is not attached, and a punch plate into which the punch can be inserted into a position facing the punch; Using a split mold consisting of a die plate having punch holes, the nine multi-piece substrates are placed between the die plate and the upstream punch plate, and the connecting portions are punched out with the punch. A method for dividing a multi-chip board, characterized by dividing it into separate printed circuit boards.
JP10822881A 1981-07-13 1981-07-13 Method of dividing board into multiple boards Pending JPS5810889A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10822881A JPS5810889A (en) 1981-07-13 1981-07-13 Method of dividing board into multiple boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10822881A JPS5810889A (en) 1981-07-13 1981-07-13 Method of dividing board into multiple boards

Publications (1)

Publication Number Publication Date
JPS5810889A true JPS5810889A (en) 1983-01-21

Family

ID=14479293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10822881A Pending JPS5810889A (en) 1981-07-13 1981-07-13 Method of dividing board into multiple boards

Country Status (1)

Country Link
JP (1) JPS5810889A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01501354A (en) * 1986-06-03 1989-05-11 インフォメーション・リソーセス・インコーポレーテッド Fast tuning control for television systems
JPH0461190A (en) * 1990-06-22 1992-02-27 Cmk Corp Manufacture of printed wiring board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS502289A (en) * 1973-05-14 1975-01-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS502289A (en) * 1973-05-14 1975-01-10

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01501354A (en) * 1986-06-03 1989-05-11 インフォメーション・リソーセス・インコーポレーテッド Fast tuning control for television systems
JPH0461190A (en) * 1990-06-22 1992-02-27 Cmk Corp Manufacture of printed wiring board

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