JPS6140650A - マイクロコンピユ−タ - Google Patents

マイクロコンピユ−タ

Info

Publication number
JPS6140650A
JPS6140650A JP16306184A JP16306184A JPS6140650A JP S6140650 A JPS6140650 A JP S6140650A JP 16306184 A JP16306184 A JP 16306184A JP 16306184 A JP16306184 A JP 16306184A JP S6140650 A JPS6140650 A JP S6140650A
Authority
JP
Japan
Prior art keywords
register
bank
signal
instruction
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16306184A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0248931B2 (en, 2012
Inventor
Yoshitaka Kitada
北田　義孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16306184A priority Critical patent/JPS6140650A/ja
Priority to DE8585109697T priority patent/DE3583080D1/de
Priority to US06/761,892 priority patent/US5093783A/en
Priority to EP85109697A priority patent/EP0170284B1/en
Publication of JPS6140650A publication Critical patent/JPS6140650A/ja
Publication of JPH0248931B2 publication Critical patent/JPH0248931B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30138—Extension of register space, e.g. register cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
JP16306184A 1984-08-02 1984-08-02 マイクロコンピユ−タ Granted JPS6140650A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP16306184A JPS6140650A (ja) 1984-08-02 1984-08-02 マイクロコンピユ−タ
DE8585109697T DE3583080D1 (de) 1984-08-02 1985-08-02 Mikrorechner.
US06/761,892 US5093783A (en) 1984-08-02 1985-08-02 Microcomputer register bank accessing
EP85109697A EP0170284B1 (en) 1984-08-02 1985-08-02 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16306184A JPS6140650A (ja) 1984-08-02 1984-08-02 マイクロコンピユ−タ

Publications (2)

Publication Number Publication Date
JPS6140650A true JPS6140650A (ja) 1986-02-26
JPH0248931B2 JPH0248931B2 (en, 2012) 1990-10-26

Family

ID=15766431

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16306184A Granted JPS6140650A (ja) 1984-08-02 1984-08-02 マイクロコンピユ−タ

Country Status (4)

Country Link
US (1) US5093783A (en, 2012)
EP (1) EP0170284B1 (en, 2012)
JP (1) JPS6140650A (en, 2012)
DE (1) DE3583080D1 (en, 2012)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1011352A (ja) * 1996-06-19 1998-01-16 Hitachi Ltd データ処理装置およびそのレジスタアドレス変換方法
US7555631B2 (en) 1991-07-08 2009-06-30 Sanjiv Garg RISC microprocessor architecture implementing multiple typed register sets

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4777588A (en) * 1985-08-30 1988-10-11 Advanced Micro Devices, Inc. General-purpose register file optimized for intraprocedural register allocation, procedure calls, and multitasking performance
JPS6298434A (ja) * 1985-10-25 1987-05-07 Hitachi Ltd デ−タ処理システム
JPS63156236A (ja) * 1986-12-19 1988-06-29 Toshiba Corp レジスタ装置
ATE75863T1 (de) * 1987-10-27 1992-05-15 Siemens Nixdorf Inf Syst Schaltungsanordnung fuer verarbeitungseinheiten einer zentraleinheit mit einer reihe von mehrzweckregistern.
JPH0454652A (ja) * 1990-06-25 1992-02-21 Nec Corp マイクロコンピュータ
US5539911A (en) * 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
JP2970821B2 (ja) * 1991-08-21 1999-11-02 松下電器産業株式会社 データ処理装置
EP0538817B1 (en) * 1991-10-21 2001-07-25 Kabushiki Kaisha Toshiba High-speed processor capable of handling multiple interrupts
JPH05113929A (ja) * 1991-10-22 1993-05-07 Mitsubishi Electric Corp マイクロコンピユータ
US5386523A (en) * 1992-01-10 1995-01-31 Digital Equipment Corporation Addressing scheme for accessing a portion of a large memory space
US5404474A (en) * 1992-01-10 1995-04-04 Digital Equipment Corporation Apparatus and method for addressing a variable sized block of memory
DE69311330T2 (de) * 1992-03-31 1997-09-25 Seiko Epson Corp., Tokio/Tokyo Befehlsablauffolgeplanung von einem risc-superskalarprozessor
WO1993022722A1 (en) 1992-05-01 1993-11-11 Seiko Epson Corporation A system and method for retiring instructions in a superscalar microprocessor
US5640582A (en) * 1992-05-21 1997-06-17 Intel Corporation Register stacking in a computer system
US5628021A (en) 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
JP3531166B2 (ja) * 1992-12-31 2004-05-24 セイコーエプソン株式会社 レジスタ・リネーミングのシステム及び方法
DE69434967T2 (de) 1993-05-27 2008-01-17 Matsushita Electric Industrial Co., Ltd., Kadoma Programmumsetzungseinheit und verbesserter Prozessor für Adressierung
GB2286265B (en) * 1994-01-26 1998-02-18 Advanced Risc Mach Ltd selectable processing registers
US5903919A (en) * 1997-10-07 1999-05-11 Motorola, Inc. Method and apparatus for selecting a register bank
TWI301270B (en) * 2006-06-30 2008-09-21 Winbond Electronics Corp Semiconductor memory and circuit and method of decoding address for the same
JP5711889B2 (ja) * 2010-01-27 2015-05-07 スパンション エルエルシー リコンフィギュラブル回路および半導体集積回路

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3380034A (en) * 1963-07-17 1968-04-23 Vyzk Ustav Matemat Stroju Addressing system for computer memories
US3395392A (en) * 1965-10-22 1968-07-30 Ibm Expanded memory system
US3866182A (en) * 1968-10-17 1975-02-11 Fujitsu Ltd System for transferring information between memory banks
US3737860A (en) * 1972-04-13 1973-06-05 Honeywell Inf Systems Memory bank addressing
US3946366A (en) * 1973-01-26 1976-03-23 Sanders Associates, Inc. Addressing technique employing both direct and indirect register addressing
US4124891A (en) * 1976-11-18 1978-11-07 Honeywell Information Systems Inc. Memory access system
US4223381A (en) * 1978-06-30 1980-09-16 Harris Corporation Lookahead memory address control system
JPS5619150A (en) * 1979-07-25 1981-02-23 Fujitsu Ltd Microprogram control system
US4383296A (en) * 1980-05-16 1983-05-10 Apple Computer, Inc. Computer with a memory system for remapping a memory having two memory output buses for high resolution display with scrolling of the displayed characters
EP0072373B1 (en) * 1981-08-19 1986-03-19 International Business Machines Corporation Improved microprocessor
US4615018A (en) * 1983-03-24 1986-09-30 Ricoh Company, Ltd. Method for writing data into a memory
US4573116A (en) * 1983-12-20 1986-02-25 Honeywell Information Systems Inc. Multiword data register array having simultaneous read-write capability
JPS60136870A (ja) * 1983-12-26 1985-07-20 Hitachi Ltd ベクトル処理装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7555631B2 (en) 1991-07-08 2009-06-30 Sanjiv Garg RISC microprocessor architecture implementing multiple typed register sets
JPH1011352A (ja) * 1996-06-19 1998-01-16 Hitachi Ltd データ処理装置およびそのレジスタアドレス変換方法

Also Published As

Publication number Publication date
DE3583080D1 (de) 1991-07-11
EP0170284B1 (en) 1991-06-05
US5093783A (en) 1992-03-03
EP0170284A2 (en) 1986-02-05
EP0170284A3 (en) 1988-04-20
JPH0248931B2 (en, 2012) 1990-10-26

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term