JPS6138570U - Analog voltage measuring device - Google Patents

Analog voltage measuring device

Info

Publication number
JPS6138570U
JPS6138570U JP12311284U JP12311284U JPS6138570U JP S6138570 U JPS6138570 U JP S6138570U JP 12311284 U JP12311284 U JP 12311284U JP 12311284 U JP12311284 U JP 12311284U JP S6138570 U JPS6138570 U JP S6138570U
Authority
JP
Japan
Prior art keywords
generation circuit
output
circuit
gate pulse
sawtooth wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12311284U
Other languages
Japanese (ja)
Inventor
秀雄 水野
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP12311284U priority Critical patent/JPS6138570U/en
Publication of JPS6138570U publication Critical patent/JPS6138570U/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のアナログ信号の電圧値の測定装置を示す
図、第2図はこの考案の実施例を示すアナログ信号の電
圧値の最大値の測定装置を示す図、第3図はこの考案の
実施例を示すタイムチャートである。 図において1は電子回路、2はオシロスコープ、3は鋸
歯状波発生回路、4は位置電圧発生回路、5は比較器、
6はパルス幅制御回路、7はゲートパルス発生回路、8
は最大電圧保持回路、9はA/D変換器、10は表示器
である。 なお、図中同一符号は同一あるいは相当部分を示す。
Fig. 1 is a diagram showing a conventional device for measuring the voltage value of an analog signal, Fig. 2 is a diagram showing a device for measuring the maximum value of the voltage value of an analog signal showing an embodiment of this invention, and Fig. 3 is a diagram showing a device for measuring the maximum value of the voltage value of an analog signal according to an embodiment of this invention. 2 is a time chart showing an embodiment of the present invention. In the figure, 1 is an electronic circuit, 2 is an oscilloscope, 3 is a sawtooth wave generation circuit, 4 is a position voltage generation circuit, 5 is a comparator,
6 is a pulse width control circuit, 7 is a gate pulse generation circuit, 8
9 is a maximum voltage holding circuit, 9 is an A/D converter, and 10 is a display. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電子回路から発生−するアナログ信号の電圧値を測定す
る装置において、電子回路に同期した鋸歯状波を発生す
る鋸歯状波発生回路と、同期信号の周期の中の任意の位
置を選択するための位置電圧発生回路と、前記鋸歯状波
発生回路の出力と位置電圧発生回路の出力とを比較し比
較結果により信号を出力する比較器と、比較器の出力に
よりゲートパルスを発生するゲートパルス発生回路と、
前記ゲートパルス発生回路のゲート幅を制御するパルス
副制御回路と、入力アナログ信号を前記ゲートパルス発
生回路出力のゲiトパルス幅の中の最大値を保持する最
大電圧保持回路と、最大電圧保持回路の出力をA/D変
換するA/D変換器と、A/D変換器の出力をデイジタ
ル表示する表示器とで構成したことを特徴とするアナロ
グ電圧の測定装置。
A device for measuring the voltage value of an analog signal generated from an electronic circuit includes a sawtooth wave generation circuit that generates a sawtooth wave synchronized with the electronic circuit, and a sawtooth wave generation circuit for selecting an arbitrary position in the period of the synchronization signal. a position voltage generation circuit; a comparator that compares the output of the sawtooth wave generation circuit with the output of the position voltage generation circuit and outputs a signal based on the comparison result; and a gate pulse generation circuit that generates a gate pulse based on the output of the comparator. and,
a pulse sub-control circuit that controls the gate width of the gate pulse generation circuit; a maximum voltage holding circuit that holds the input analog signal at a maximum value among the gate pulse widths output from the gate pulse generation circuit; and a maximum voltage holding circuit. 1. An analog voltage measuring device comprising: an A/D converter that A/D converts the output of the A/D converter; and a display device that digitally displays the output of the A/D converter.
JP12311284U 1984-08-10 1984-08-10 Analog voltage measuring device Pending JPS6138570U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12311284U JPS6138570U (en) 1984-08-10 1984-08-10 Analog voltage measuring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12311284U JPS6138570U (en) 1984-08-10 1984-08-10 Analog voltage measuring device

Publications (1)

Publication Number Publication Date
JPS6138570U true JPS6138570U (en) 1986-03-11

Family

ID=30681863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12311284U Pending JPS6138570U (en) 1984-08-10 1984-08-10 Analog voltage measuring device

Country Status (1)

Country Link
JP (1) JPS6138570U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0445691Y2 (en) * 1987-05-12 1992-10-27

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0445691Y2 (en) * 1987-05-12 1992-10-27

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