JPS6134303B2 - - Google Patents

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Publication number
JPS6134303B2
JPS6134303B2 JP52158899A JP15889977A JPS6134303B2 JP S6134303 B2 JPS6134303 B2 JP S6134303B2 JP 52158899 A JP52158899 A JP 52158899A JP 15889977 A JP15889977 A JP 15889977A JP S6134303 B2 JPS6134303 B2 JP S6134303B2
Authority
JP
Japan
Prior art keywords
signal
output
amplitude
sign
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52158899A
Other languages
Japanese (ja)
Other versions
JPS5492004A (en
Inventor
Norio Komyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP15889977A priority Critical patent/JPS5492004A/en
Publication of JPS5492004A publication Critical patent/JPS5492004A/en
Publication of JPS6134303B2 publication Critical patent/JPS6134303B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38Demodulator circuits; Receiver circuits
    • H04L27/3809Amplitude regulation arrangements

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Description

【発明の詳細な説明】 この発明はデジタル多相多値搬送波伝送方式の
受信復調装置において信号振幅を安定化するため
に用いる振幅変動を検出する振幅変動検出器に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplitude fluctuation detector for detecting amplitude fluctuations used for stabilizing signal amplitude in a receiving and demodulating device of a digital multiphase multilevel carrier wave transmission system.

デジタル信号を搬送波帯により伝送する方式の
中で第1図に示すように16値の信号を信号空間上
に格子状に配列した多相多値変調方式は伝送効率
が高いこと及びハード構成の点から有利な方式で
ある。この方式の復調装置は同期検波を行うため
の搬送波再生回路、多値信号から2値4系列の信
号を再生する信号再生回路、クロツク同期回路等
によつて構成される。
Among the methods for transmitting digital signals using a carrier band, the multi-phase multi-level modulation method, in which 16-value signals are arranged in a grid pattern on the signal space as shown in Figure 1, has high transmission efficiency and has the advantages of a hardware configuration. This is an advantageous method. This type of demodulator is composed of a carrier wave regeneration circuit for performing synchronous detection, a signal regeneration circuit for regenerating a binary four-series signal from a multilevel signal, a clock synchronization circuit, and the like.

この復調装置では一般的に識別しきい値を最適
値に保つ上で復調装置の入力信号振幅が一定であ
る必要がある。もし、この振幅を一定にすること
が不完全であると等価的に識別しきい値が変動し
たことになり、ひいては符号誤り率の劣化を惹起
す。従来は復調装置の入力信号を検波して信号振
幅を検出し、これを制御信号として復調装置の入
力側に接続されている増幅器の出力振幅を一定に
する手段がとられていた。しかし、この受信変調
信号が振幅、位相平面上でとり得る16通りの状態
を遷移すると、信号振幅の変動を伴なうために信
号波の状態が振幅、位相平面上で一様に分布して
いない場合には先に述べた従来の手段によつて信
号振幅を検出すると送出されたパルスパタンに対
応して振幅の検出レベルに変動が生じることにな
る。
In this demodulator, it is generally necessary that the amplitude of the input signal to the demodulator be constant in order to maintain the discrimination threshold at an optimum value. If it is incomplete to keep this amplitude constant, this will equivalently result in a fluctuation of the identification threshold, which will eventually cause a deterioration of the bit error rate. Conventionally, the input signal of the demodulator is detected to detect the signal amplitude, and this is used as a control signal to keep the output amplitude of an amplifier connected to the input side of the demodulator constant. However, when this received modulated signal transitions through the 16 possible states on the amplitude and phase planes, the signal wave states are not uniformly distributed on the amplitude and phase planes due to fluctuations in the signal amplitude. If there is no such signal, if the signal amplitude is detected by the conventional means described above, the detection level of the amplitude will fluctuate in response to the transmitted pulse pattern.

この発明の目的はこのような欠点を除去するも
のでデジタル多相多値搬送波伝送方式における復
調装置の入力振幅の変動を検出する振幅変動検出
器を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an amplitude fluctuation detector for detecting fluctuations in the input amplitude of a demodulator in a digital multiphase multilevel carrier wave transmission system, which eliminates such drawbacks.

デジタル多相多値搬送波伝送方式の復調装置に
おける信号再生方式としては主に搬送波帯で処理
する方式と、ベースバンド信号処理方式とがある
が、こゝでは後者の方式についてこの発明を適用
する場合について説明する。
Signal regeneration methods in demodulators for digital multi-phase multi-level carrier wave transmission systems mainly include a carrier band processing method and a baseband signal processing method. Here, we will discuss the case where the present invention is applied to the latter method. I will explain about it.

この後者の再生方式の概要を説明すると、第1
図に示した信号を互に直交する2つの再生搬送波
で検波して得られる検波信号は第2図Aに示すよ
うにそれぞれ−L2,−L1,L1,L2の4値となる。
この4値の信号の正負極性を第1、第2の符号判
別器で判別し、第2図Bに示すような2系列の第
1パス信号を再生する。次にこの再生出力信号を
前述の検波信号より減算することによに第2図C
に示すような差信号を得、この差信号の正負極性
を第3、第4の符号判別器で判別し、更に2系列
の第2パス信号を再生する。
To give an overview of this latter playback method, the first
The detected signal obtained by detecting the signal shown in the figure with two mutually orthogonal regenerated carrier waves has four values -L 2 , -L 1 , L 1 , and L 2, respectively, as shown in Figure 2A. .
The positive and negative polarities of this four-level signal are determined by first and second code discriminators, and two series of first pass signals as shown in FIG. 2B are reproduced. Next, by subtracting this reproduced output signal from the above-mentioned detected signal,
A difference signal as shown in is obtained, the positive and negative polarities of this difference signal are determined by third and fourth code discriminators, and two series of second pass signals are further reproduced.

第3図にベースバンド信号処理型の受信復調装
置の一例を示す。搬送周波数ωcの多相多値変調
入力信号51は二分岐された検波器2,3に加え
られる。一方電圧制御発振器17の信号出力54
と、これをπ/2移相器4を通過した信号53と
が検波器2,3にそれぞれ加えられ、4値の検波
出力信号55,56が得られる。符号判別器5,
6はこの検波出力信号55,56をそれぞれ入力
して入力信号の正負を判別して、正であれば正極
性の一定電圧、負であれば負極性の一定電圧、例
えば+1Vまたは−1Vを出力する。この出力信号
が第1の復調データ信号列である。検波器2,3
の4値の出力信号55,56と符号判別器5,6
の2値の出力信号57,58はそれぞれ減算器
7,8に加えられ、信号55,56から信号5
7,58を減算した信号59,60を得る。
FIG. 3 shows an example of a baseband signal processing type receiving demodulator. A multi-phase multi-level modulated input signal 51 having a carrier frequency ω c is applied to two branched detectors 2 and 3. On the other hand, the signal output 54 of the voltage controlled oscillator 17
and a signal 53 which has passed through the π/2 phase shifter 4 are applied to the detectors 2 and 3, respectively, to obtain four-level detection output signals 55 and 56. code discriminator 5,
6 inputs these detection output signals 55 and 56 respectively, determines whether the input signal is positive or negative, and outputs a constant voltage of positive polarity if positive, and a constant voltage of negative polarity if negative, for example +1V or -1V. do. This output signal is the first demodulated data signal sequence. Detector 2, 3
4-value output signals 55, 56 and code discriminators 5, 6
The binary output signals 57 and 58 are added to subtracters 7 and 8, respectively, and the signals 55 and 56 are
Signals 59 and 60 are obtained by subtracting 7 and 58.

この信号59,60は第2図Cに示したように
2値であり符別判別器9,10に入力されて正負
極性が判別され、その出力信号61,62は第2
の復調データ信号となる。こゝで符号判別器の動
作及び出力信号の形態は先に述べた符号判別器
5,6の場合と同様である。減算器11,12に
は減算器7,8の出力信号59,60と符号判別
器9,10の出力信号61,62とが加えられ、
前者から後者を減算した信号63,64が得られ
る。掛算器13,14には符号判別器6,5の出
力信号58,57と、減算器11,12の出力信
号63,64とが加えられ、両者の積に比例した
出力信号65,66を得る。差回路15には掛算
器13,14の出力信号65,66が入力され、
前者から後者を減算した出力信号67を得る。差
回路15の出力信号67はループフイルタ16を
通過して電圧制御発振器17に制御信号として加
えられる。
These signals 59 and 60 are binary as shown in FIG.
becomes the demodulated data signal. The operation of the code discriminator and the form of the output signal are the same as those of the code discriminators 5 and 6 described above. The output signals 59, 60 of the subtracters 7, 8 and the output signals 61, 62 of the sign discriminators 9, 10 are applied to the subtracters 11, 12,
Signals 63 and 64 are obtained by subtracting the latter from the former. The output signals 58, 57 of the sign discriminators 6, 5 and the output signals 63, 64 of the subtracters 11, 12 are added to the multipliers 13, 14, and output signals 65, 66 proportional to the product of both are obtained. . The output signals 65 and 66 of the multipliers 13 and 14 are input to the difference circuit 15,
An output signal 67 is obtained by subtracting the latter from the former. The output signal 67 of the difference circuit 15 passes through the loop filter 16 and is applied to the voltage controlled oscillator 17 as a control signal.

今、送信多相多値変調信号S(t)はその搬送
波角周波数をωcとして次のように表わせる。
Now, the transmitted multiphase multilevel modulation signal S(t) can be expressed as follows, with its carrier wave angular frequency being ω c .

S(t)=√2{g11(t)cosωct +g12(t)sinωct+1/2g21(t)cosωct +1/2g22(t)sinωct} (1) こゝでgij(t)は信号パルス列を表わす。i,
jはそれぞれ1又は2である。
S(t)=√2{g 11 (t) cosω c t +g 12 (t) sinω c t+1/2g 21 (t) cosω c t +1/2g 22 (t) sinω c t} (1) Here gij(t) represents a signal pulse train. i,
j is 1 or 2, respectively.

gij(t)=+1又は−1 (2) 今、簡単のためこの信号が伝送線路で何等の歪
を受けることなく、受信装置に入力されたとす
る。電圧制御発振器17の出力信号54をsinωc
t+eとすると検波器2の出力信号55は S55=k{g11(t)+1/2g21(t)}cose−k {g12(t)+1/2g22(t)}×sine (3) こゝでkは振幅比例定数である。
gij(t)=+1 or -1 (2) For simplicity, assume that this signal is input to the receiving device without being subjected to any distortion on the transmission line. The output signal 54 of the voltage controlled oscillator 17 is sinω c
If t+e, the output signal 55 of the detector 2 is S 55 =k{g 11 (t)+1/2g 21 (t)}cose−k {g 12 (t)+1/2g 22 (t)}×sine (3 ) Here, k is the amplitude proportionality constant.

e〓0とすればS55=k{g11(t)+1/2g21 (t)であるから符号判別器5の出力信号57は
g21の符号の極性によらずS57=g11(t)となる。
符号判別器6の出力信号58についても同様にし
てS58=g12(t)となる。減算器7では信号S55
から信号S57を減算する。この結果減算器の出力
信号は次式となる。
If e=0, then S 55 =k{g 11 (t) + 1/2g 21 (t), so the output signal 57 of the sign discriminator 5 is
S 57 =g 11 (t) regardless of the polarity of the sign of g 21 .
Similarly, for the output signal 58 of the sign discriminator 6, S 58 =g 12 (t). In subtractor 7 the signal S 55
Subtract the signal S 57 from. As a result, the output signal of the subtracter is as follows.

S59=g11(t)(kcose−1)+1/2k ・g21(t)cose−k{g12(t) +1/2g22(t)}sine (4) こゝでk=1、e〓0の場合にはS59=1/2g21 (t)となり、この信号の極性を符号判別器9で
判別すると送出された信号列を復調することがで
きる。即ち、符号判別器9の出力信号61はS61
=g21(t)となる。このことは符号判別器10
についても同様であり、その出力信号はS62=g22
(t)となる。
S 59 = g 11 (t) (kcose-1) + 1/2k ・g 21 (t) cose-k{g 12 (t) + 1/2g 22 (t)}sine (4) Here, k = 1, In the case of e=0, S 59 =1/2g 21 (t), and when the sign discriminator 9 discriminates the polarity of this signal, the transmitted signal train can be demodulated. That is, the output signal 61 of the sign discriminator 9 is S 61
=g 21 (t). This means that the sign discriminator 10
The same is true for S 62 = g 22 and its output signal is S 62 = g 22
(t).

こゝで前述の各部の動作にもとずいて減算器1
5の出力67を計算すると S67=ε(t)=−k{g 11(t) +g 12(t)+1/2g12(t)・ g22(t)+1/2g11(t)×g21(t)} sine+1/2{g12(t) g21(t)−g11(t)g22(t)} ×(kcose−1) (5) こゝで(5)式は位相比較電圧特性を示しており、
第2項は変調波の変調パターンに関係する雑音と
考えられる。出力信号67の電圧ε(t)は電圧
制御発振器17の制御電圧であるので、この電圧
間に生じている雑音は再生搬送波のジツタ(以後
パタンジツタと言う)になり、再生信号に雑音を
生じさせて、ひいては符号誤り率を劣化させてし
まう。また(5)式の第2項はeが小さい場合に、
かつ定数kが1に十分近い値である場合に、この
項は消滅し、雑音を発生しない。定数kに注目す
ると(4)式、(5)式ともk=1として説明を続けた
が、こゝでkが1から離れた場合を考えると信号
S59には雑音成分が増加し、信号の再生に重大な
悪影響を及ぼすことやS67=ε(t)に雑音が生
じ、パターンジツタが増大してしまうことは明ら
かであり、kを1に保つことが第1図に示した復
調装置では重要なことである。kを1に保つこと
を具体的に云うと、検波器2,3の出力信号5
5,56の振幅と符号判別器5,6,9,10の
出力信号57,58,61,62の振幅との比率
すなわち第2図Aに示した検波信号の振幅V1
第2図Bに示した符号判別器出力振幅V2との比
率を一定に保つことである。この比率が適当でな
く、すなわち振幅変動がある場合には差信号の波
形を第2図Dに示すように第2図Cに示す正常な
場合の波形に比べ波形が乱れてしまう。
Now, based on the operation of each part mentioned above, subtracter 1
Calculating the output 67 of 5, we get S 67 =ε(t)=−k{g 2 11 (t) +g 2 12 (t)+1/2g 12 (t)・g 22 (t)+1/2g 11 (t) ×g 21 (t)} sine+1/2{g 12 (t) g 21 (t)−g 11 (t) g 22 (t)} ×(kcose−1) (5) Here, equation (5) is It shows the phase comparison voltage characteristics,
The second term is considered to be noise related to the modulation pattern of the modulated wave. Since the voltage ε(t) of the output signal 67 is the control voltage of the voltage controlled oscillator 17, noise occurring between these voltages becomes jitter (hereinafter referred to as pattern jitter) in the reproduced carrier wave, causing noise in the reproduced signal. As a result, the bit error rate deteriorates. Also, the second term of equation (5) is, when e is small,
When the constant k is sufficiently close to 1, this term disappears and does not generate noise. Focusing on the constant k, we continued the explanation assuming k = 1 in both equations (4) and (5), but if we consider the case where k is far from 1, the signal
It is clear that the noise component increases in S 59 , which has a serious negative effect on signal reproduction, and that noise occurs in S 67 = ε(t), increasing pattern jitter. It is important in the demodulator shown in FIG. Specifically speaking, keeping k at 1 means that the output signals 5 of the detectors 2 and 3
5, 56 and the amplitude of the output signals 57, 58, 61, 62 of the sign discriminators 5, 6, 9, 10, that is, the amplitude V 1 of the detected signal shown in FIG. 2A and FIG. 2B The purpose is to maintain a constant ratio with the sign discriminator output amplitude V 2 shown in . If this ratio is not appropriate, that is, if there is amplitude fluctuation, the waveform of the difference signal will be distorted, as shown in FIG. 2D, compared to the normal waveform shown in FIG. 2C.

しかるに従来の復調装置では信号振幅の制御は
主に入力信号増幅器1として自動振幅制御付のも
のを用いることにより、入力信号の振幅を制御し
ていた。これだけではパルスパターンによる変動
分や精密な制御ができないことや、後続の回路で
生じる振幅上の変動分を吸収することは不可能で
あつた。
However, in conventional demodulators, the amplitude of the input signal is controlled mainly by using an input signal amplifier 1 with automatic amplitude control. With this alone, it is impossible to perform accurate control of fluctuations caused by pulse patterns, and it is impossible to absorb fluctuations in amplitude that occur in subsequent circuits.

この発明は従来の復調装置における上述した欠
点を除くために入力振幅の変動や符号判別器等の
出力振幅の変動を検出する振幅変動検出器を提供
する。
The present invention provides an amplitude fluctuation detector that detects fluctuations in input amplitude and fluctuations in output amplitude of a sign discriminator, etc., in order to eliminate the above-mentioned drawbacks of conventional demodulators.

第4図はこの発明による振幅変動検出器の一実
施例であつて、第3図の各部から信号を取出して
接続する。第3図の符号判別器5,6の出力信号
57,58と、符号判別器9,10の出力信号6
1,62とは加算器18,19にそれぞれ加えら
れ、加算器18,19の出力信号69,70は両
者の信号の和に比例した信号となる。
FIG. 4 shows an embodiment of the amplitude fluctuation detector according to the present invention, in which signals are taken out from each part of FIG. 3 and connected. Output signals 57, 58 of code discriminators 5, 6 and output signals 6 of code discriminators 9, 10 in FIG.
1 and 62 are added to adders 18 and 19, respectively, and output signals 69 and 70 of adders 18 and 19 are signals proportional to the sum of both signals.

S69=g11(t)+1/2g21(t)、 S70=g12(t)+1/2g22(t) これ等信号69,70と減算器11,12の出
力信号63,64とは掛算器20,21に加えら
れ、 S63={g11(t)+1/2g21(t)} ×(kcose−1)−k {g12(t)+1/2g22(t)}sine S64={g12(t)+1/2g22(t)} ×(kcose−1)+k {g11(t)+1/2g21(t)}sine(6) 両者の信号の積に比例した出力信号71,72を
得る。この出力信号71,72は、 S71=S69×S63 ={g 11(t)+g11(t)・g21(t) +1/4g 21(t)}(kcose−1) −k{g12(t)・g11(t)+1/2g11(t)・ g22(t)+1/2g21(t)・g12(t) +1/4g21(t)・g22(t)}sine S72=S70×S64 ={g 12(t)+g21(t)・g22(t) +1/4g 22(t)}(kcose−1) +k{g12(t)・g11(t)+1/2g11(t)・ g22(t)+1/2g21(t)・g12(t) +1/4g21(t)・g22(t)}sine (7) 和回路22に加えられ、両者の和に比例した出力
信号73を得る。
S 69 = g 11 (t) + 1/2g 21 (t), S 70 = g 12 (t) + 1/2g 22 (t) These signals 69 and 70 and the output signals 63 and 64 of the subtractors 11 and 12 is added to the multipliers 20 and 21, and S 63 = {g 11 (t) + 1/2g 21 (t)} × (kcose-1) - k {g 12 (t) + 1/2g 22 (t)}sine S 64 = {g 12 (t) + 1/2g 22 (t)} × (kcose-1) + k {g 11 (t) + 1/2g 21 (t)} sine(6) Proportional to the product of both signals Output signals 71 and 72 are obtained. The output signals 71 and 72 are as follows: S 71 = S 69 ×S 63 = {g 2 11 (t) + g 11 (t)・g 21 (t) + 1/4g 2 21 (t)} (kcose−1) − k _ _ _ _ _ _ _ t)}sine S 72 = S 70 ×S 64 = {g 2 12 (t) + g 21 (t)・g 22 (t) + 1/4g 2 22 (t)} (kcose−1) +k{g 12 ( t)・g 11 (t)+1/2g 11 (t)・g 22 (t)+1/2g 21 (t)・g 12 (t) +1/4g 21 (t)・g 22 (t)}sine ( 7) Added to the sum circuit 22 to obtain an output signal 73 proportional to the sum of both.

S73=S71+S72 ={g 11(t)+g 12(t)+1/4g
(t) +1/4g 22(t)}(kcose−1) +{g11(t)・g21(t)+g12(t)・ g22(t)}(kcose−1) (7) ここで信号g11(t),g21(t),g12(t)及び
g22(t)は+1及び−1の値をもち、それぞれ
の信号及び信号間の相関はない。このことによつ
て(7)式の第2項の{g11(t)・g21(t)+g12
(t)・g22(t)}は時間的に平均すれば零にな
る。すなわち低域波器によてこの第2項の成分
は除去され、出力信号74は(8)式のようになる。
S 73 = S 71 + S 72 = {g 2 11 (t) + g 2 12 (t) + 1/4g 2 2
1
(t) +1/4g 2 22 (t)} (kcose-1) +{g 11 (t)・g 21 (t)+g 12 (t)・g 22 (t)} (kcose-1) (7 ) where the signals g 11 (t), g 21 (t), g 12 (t) and
g 22 (t) has values of +1 and -1, and there is no correlation between the respective signals and the signals. By this, the second term of equation (7) {g 11 (t)・g 21 (t) + g 12
(t)·g 22 (t)} becomes zero when averaged over time. That is, the second term component is removed by the low frequency filter, and the output signal 74 becomes as shown in equation (8).

S74=〔g 11(t)+1/4g 21(t)+g
12
(t) +1/4g 22(t)〕×(kcose−1) (8) (8)式の〔 〕内は一定値であるので、e〓0
とすれば信号S74は(k−1)に比例した値とな
り、入力信号の振幅が変動するか或いは符号判別
器9,10の出力振幅が変動すると、その変動分
に比例した出力信号が得られることが分る。この
ようにして得られた出力信号、即ち振幅誤差信号
を制御信号として負帰還ループを形成し、信号
S74を零に制御することにより第3図の復調装置
を最良の状態に制御することが可能となる。
S 74 = [g 2 11 (t) + 1/4g 2 21 (t) + g 2
12
(t) +1/4g 2 22 (t)〕×(kcose−1) (8) Since the value in brackets [ ] in equation (8) is a constant value, e〓0
Then, the signal S 74 will have a value proportional to (k-1), and if the amplitude of the input signal fluctuates or the output amplitude of the sign discriminators 9 and 10 fluctuates, an output signal proportional to the fluctuation will be obtained. I know that it will happen. A negative feedback loop is formed using the output signal obtained in this way, that is, the amplitude error signal as a control signal, and the signal
By controlling S74 to zero, it becomes possible to control the demodulator shown in FIG. 3 in the best condition.

第5図はこの発明の第2の実施例であつて、第
4図を簡略化した場合である。第4図の掛算器2
0または21の信号出力71または72を低域
波器24で高周波成分を除去することにより出力
信号75を得る。
FIG. 5 shows a second embodiment of the invention, which is a simplified version of FIG. Multiplier 2 in Figure 4
An output signal 75 is obtained by removing high frequency components from the signal output 71 or 72 of 0 or 21 using the low frequency filter 24.

S75=〔g 11(t)+1/4g 21(t)〕 ×(kcose−1) または S75=〔g 12(t)+1/4g 22(t)〕 (kcose−1) (9) (9)式の〔 〕内は一定値であるので、e〓0
であるとき、S75は(k−1)に比例した値とな
り、第4図の場合の応用例と同様に振幅誤差に比
例した電圧を検出したことになる。
S 75 = [g 2 11 (t) + 1/4g 2 21 (t)] × (kcose-1) or S 75 = [g 2 12 (t) + 1/4g 2 22 (t)] (kcose-1) (9) Since the value in brackets [ ] in equation (9) is a constant value, e〓0
When , S 75 becomes a value proportional to (k-1), and a voltage proportional to the amplitude error is detected as in the application example in FIG. 4.

第6図はこの発明の第3の実施例であり、第3
図の符号判別器5,6の出力信号57,58と減
算器11,12の出力信号63,64とは掛算器
25,26にそれぞれ加えられ、両者の積に比例
した出力信号76,77を得る。信号76,77
は加算器27に加えられ、両者の和に比例した出
力信号78を得る。信号78を低域波器28に
導くとその出力信号79は次のようになる。
FIG. 6 shows a third embodiment of the present invention.
The output signals 57, 58 of the sign discriminators 5, 6 and the output signals 63, 64 of the subtracters 11, 12 in the figure are added to multipliers 25, 26, respectively, and output signals 76, 77 proportional to the product of both are added. obtain. Signals 76, 77
is added to adder 27 to obtain an output signal 78 proportional to the sum of both. When the signal 78 is guided to the low frequency filter 28, the output signal 79 is as follows.

S79=〔g 11(t)+g 12(t)〕(kcose
−1)(10) こゝでe〓0の場合に、S79は(k−1)に比
例するので第4図の場合と同様の効果が得られ
る。
S 79 = [g 2 11 (t) + g 2 12 (t)] (kcose
-1) (10) Here, in the case of e=0, since S79 is proportional to (k-1), the same effect as in the case of FIG. 4 can be obtained.

第7図はこの発明の第4の実施例であり、これ
は第6図の場合を簡略化したものである。第6図
の出力信号76または77を低域波器28に入
力し、高周波成分を除去することにより出力80
を得る。
FIG. 7 shows a fourth embodiment of the invention, which is a simplified version of the case shown in FIG. The output signal 76 or 77 shown in FIG.
get.

S80=g 11(t)(kcose−1) または S80=g 12(t)(kcose−1) (11) g 11(t)、g 12(t)は一定値であり、
e〓
0の場合にはS80は(k−1)に比例するので第
4図の場合と同様の効果が得られる。
S 80 = g 2 11 (t) (kcose-1) or S 80 = g 2 12 (t) (kcose-1) (11) g 2 11 (t) and g 2 12 (t) are constant values. ,
e〓
In the case of 0, since S 80 is proportional to (k-1), the same effect as in the case of FIG. 4 can be obtained.

第8図はこの発明の第5の実施例を示し、第3
図の符号判別器5,6の出力信号57,58と減
算器7,8の出力信号59,60とは掛算器2
5,26に加えられ、両者の積に比例した出力信
号81,82を得る。信号81,82は加算器2
7に加えられ、両者の和に比例した出力信号83
を得、低域波器28で高周波成分を除去して出
力信号84を得る。
FIG. 8 shows a fifth embodiment of the present invention;
The output signals 57, 58 of the sign discriminators 5, 6 and the output signals 59, 60 of the subtracters 7, 8 in the figure are the same as those of the multiplier 2.
5 and 26 to obtain output signals 81 and 82 which are proportional to the product of both. Signals 81 and 82 are added to adder 2
7 and is proportional to the sum of both.
The output signal 84 is obtained by removing high frequency components by the low frequency filter 28.

S84=〔g 11(t)+g 12(t)〕(kcose
−1)(12) こゝで(12)式の〔 〕内には一定値であるので、
e〓0の場合上S8 4は(k−1)に比例した値と
なり、第4図の場合と同様の効果が得られる。
S 84 = [g 2 11 (t) + g 2 12 (t)] (kcose
−1)(12) Here, since the value in brackets [ ] in equation (12) is a constant value,
In the case of e=0, the upper S 8 4 becomes a value proportional to (k-1), and the same effect as in the case of FIG. 4 can be obtained.

第9図は第8図の例を簡略化した場合であり、
第8図の出力信号81または82を低域波器2
8に入力し、高周波成分を除去することにより出
力85を得る。
Figure 9 is a simplified version of the example in Figure 8,
The output signal 81 or 82 in FIG.
8 and removes high frequency components to obtain an output 85.

S85=g 11(t)(kcose−1)または S85=g 12(t)(kcose−1) (13) こゝでg 11(t)、g 12(t)は一定の値で

り、e〓0の場合にS85は(k−1)に比例
し、第4図の場合と同様の効果が得られる。
S 85 = g 2 11 (t) (kcose-1) or S 85 = g 2 12 (t) (kcose-1) (13) where g 2 11 (t) and g 2 12 (t) are constant When e=0, S 85 is proportional to (k-1), and the same effect as in the case of FIG. 4 can be obtained.

以上の振幅変動検出器は例えだ第10図に示す
ように使用される。入力端子100からのデジタ
ル多相多値搬送波信号は、出力振幅制御用端子付
信号増幅器101にて増幅され、その増幅出力は
第1図に示した従来と同様の復調装置102で復
調されて出力端子103へ供給されると共に復調
装置102の一部から取出された信号により先に
述べた第4図乃至第9図の何れかの振幅変動検出
器104にて振幅変動が検出され、その出力は増
幅器101の前記制御端子へ与えられる。
The above amplitude fluctuation detector is used as shown in FIG. 10, for example. A digital multiphase multilevel carrier signal from an input terminal 100 is amplified by a signal amplifier 101 with an output amplitude control terminal, and the amplified output is demodulated by a conventional demodulator 102 shown in FIG. 1 and output. An amplitude fluctuation is detected by the signal supplied to the terminal 103 and taken out from a part of the demodulator 102 by the amplitude fluctuation detector 104 shown in any one of FIGS. 4 to 9 described above, and its output is as follows. The signal is applied to the control terminal of amplifier 101.

以上述べたように、この発明の振幅変動検出器
によれば従来の多相多値搬送波伝送方式受信用復
調装置の入力信号の振幅変動や符号判別器の出力
振幅の変動を入力信号の変調パターンに影響され
ることなく検出することができる。したがつてこ
れをレベル安定化のための制御信号として用いる
ことにより復調装置の特性を著しく改善すること
が可能である。
As described above, according to the amplitude fluctuation detector of the present invention, the amplitude fluctuation of the input signal of the conventional multi-phase multi-level carrier transmission type receiving demodulator and the fluctuation of the output amplitude of the code discriminator can be detected by the modulation pattern of the input signal. can be detected without being affected by Therefore, by using this as a control signal for level stabilization, it is possible to significantly improve the characteristics of the demodulator.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は多相多値の信号空間配置を示す図、第
2図は復調装置における各部の信号波形を示す
図、第3図は従来のベースバンド処理型復調装置
を示すブロツク図、第4図乃至第9図はそれぞれ
この発明による振幅変動検出器の実施例を示すブ
ロツク図、第10図はこの発明の振幅変動検出器
を使用した多相多値搬送波復調装置の一例を示す
ブロツク図である。 1:増幅器、2,3:検波器、4:π/2移相
器、5,6:符号判別器、7,8:減算器、9,
10:符号判別器、11,12:減算器、13,
14:掛算器、15:減算器、16:ルーブフイ
ルタ、17:電圧制御発振器、18,19:加算
器、20,21:掛算器、22:加算器、23,
24:低域波器、25,26:掛算器、27:
加算器、28:低域波器。
Fig. 1 is a diagram showing a multi-phase multi-value signal space arrangement, Fig. 2 is a diagram showing signal waveforms of each part in a demodulator, Fig. 3 is a block diagram showing a conventional baseband processing type demodulator, and Fig. 4 is a diagram showing a conventional baseband processing type demodulator. 9 to 9 are block diagrams showing embodiments of the amplitude fluctuation detector according to the present invention, and FIG. 10 is a block diagram showing an example of a multiphase multilevel carrier demodulation device using the amplitude fluctuation detector according to the present invention. be. 1: Amplifier, 2, 3: Detector, 4: π/2 phase shifter, 5, 6: Sign discriminator, 7, 8: Subtractor, 9,
10: sign discriminator, 11, 12: subtractor, 13,
14: Multiplier, 15: Subtractor, 16: Loube filter, 17: Voltage controlled oscillator, 18, 19: Adder, 20, 21: Multiplier, 22: Adder, 23,
24: Low frequency filter, 25, 26: Multiplier, 27:
Adder, 28: Low frequency unit.

Claims (1)

【特許請求の範囲】 1 入力デジタル多相多値搬送波信号を互に直交
した2つの局部発振信号により第1、第2検波器
でそれぞれ検波し、これら第1、第2検波器の各
出力をそれぞれ第1、第2符号判別器で正負を判
定し、これら第1、第2符号判別器の各判定出力
と、上記第1、第2検波器の各出力とをそれぞれ
第1、第2減算器で減算し、これら第1、第2減
算器の各出力をそれぞれ第3、第4符号判別器で
正負を判定して上記第1、第2、第3、第4符号
判別器より復調出力を得るデジタル多相多値搬送
波復調装置において、 上記第1符号判別器出力信号と、 上記第1減算器の出力信号又はこの出力信号と
上記第3符号判別器の出力信号との差の信号とを
掛算器にて掛算し、 その掛算出力から入力信号振幅の変動或いは符
号判別器出力信号の振幅変動を検出することを特
徴とする振幅変動検出器。
[Claims] 1. An input digital multi-phase multi-level carrier signal is detected by first and second detectors using two mutually orthogonal local oscillation signals, and each output of the first and second detectors is Each of the first and second sign discriminators determines whether it is positive or negative, and the determination outputs of the first and second sign discriminators and the outputs of the first and second detectors are subjected to first and second subtraction, respectively. The outputs of the first and second subtracters are determined to be positive or negative by the third and fourth sign discriminators, respectively, and the demodulated output is output from the first, second, third, and fourth sign discriminators. In a digital multiphase multilevel carrier demodulation device for obtaining the first code discriminator output signal, and the output signal of the first subtractor or the difference signal between this output signal and the output signal of the third code discriminator, What is claimed is: 1. An amplitude fluctuation detector, comprising: multiplying by a multiplier, and detecting fluctuations in input signal amplitude or amplitude fluctuations in a sign discriminator output signal from the multiplication output.
JP15889977A 1977-12-29 1977-12-29 Amplitude fluctuation detector of digital polyphase multilevel carrier wave signals Granted JPS5492004A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15889977A JPS5492004A (en) 1977-12-29 1977-12-29 Amplitude fluctuation detector of digital polyphase multilevel carrier wave signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15889977A JPS5492004A (en) 1977-12-29 1977-12-29 Amplitude fluctuation detector of digital polyphase multilevel carrier wave signals

Publications (2)

Publication Number Publication Date
JPS5492004A JPS5492004A (en) 1979-07-20
JPS6134303B2 true JPS6134303B2 (en) 1986-08-07

Family

ID=15681791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15889977A Granted JPS5492004A (en) 1977-12-29 1977-12-29 Amplitude fluctuation detector of digital polyphase multilevel carrier wave signals

Country Status (1)

Country Link
JP (1) JPS5492004A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6671336B1 (en) * 2000-05-16 2003-12-30 Motorola, Inc. Gain controller for circuit having in-phase and quadrature channels, and method

Also Published As

Publication number Publication date
JPS5492004A (en) 1979-07-20

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