JPS61294933A - 半導体装置およびデ−タ伝送路 - Google Patents

半導体装置およびデ−タ伝送路

Info

Publication number
JPS61294933A
JPS61294933A JP13660585A JP13660585A JPS61294933A JP S61294933 A JPS61294933 A JP S61294933A JP 13660585 A JP13660585 A JP 13660585A JP 13660585 A JP13660585 A JP 13660585A JP S61294933 A JPS61294933 A JP S61294933A
Authority
JP
Japan
Prior art keywords
output
cmos inverter
inputs
input
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13660585A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0441850B2 (enrdf_load_html_response
Inventor
Hironori Terada
浩詔 寺田
Katsuhiko Asada
勝彦 浅田
Hiroaki Nishikawa
博昭 西川
Nobufumi Komori
伸史 小守
Kenji Shima
憲司 嶋
Soichi Miyata
宗一 宮田
Satoshi Matsumoto
敏 松本
Hajime Asano
浅野　一
Masahisa Shimizu
清水　雅久
Hiroki Miura
三浦　宏喜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Sharp Corp
Sanyo Electric Co Ltd
Panasonic Holdings Corp
Original Assignee
Mitsubishi Electric Corp
Sharp Corp
Sanyo Electric Co Ltd
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, Sharp Corp, Sanyo Electric Co Ltd, Matsushita Electric Industrial Co Ltd filed Critical Mitsubishi Electric Corp
Priority to JP13660585A priority Critical patent/JPS61294933A/ja
Priority to US06/875,551 priority patent/US4785204A/en
Publication of JPS61294933A publication Critical patent/JPS61294933A/ja
Publication of JPH0441850B2 publication Critical patent/JPH0441850B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Information Transfer Systems (AREA)
  • Logic Circuits (AREA)
JP13660585A 1985-06-21 1985-06-21 半導体装置およびデ−タ伝送路 Granted JPS61294933A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP13660585A JPS61294933A (ja) 1985-06-21 1985-06-21 半導体装置およびデ−タ伝送路
US06/875,551 US4785204A (en) 1985-06-21 1986-06-18 Coincidence element and a data transmission path

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13660585A JPS61294933A (ja) 1985-06-21 1985-06-21 半導体装置およびデ−タ伝送路

Publications (2)

Publication Number Publication Date
JPS61294933A true JPS61294933A (ja) 1986-12-25
JPH0441850B2 JPH0441850B2 (enrdf_load_html_response) 1992-07-09

Family

ID=15179203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13660585A Granted JPS61294933A (ja) 1985-06-21 1985-06-21 半導体装置およびデ−タ伝送路

Country Status (1)

Country Link
JP (1) JPS61294933A (enrdf_load_html_response)

Also Published As

Publication number Publication date
JPH0441850B2 (enrdf_load_html_response) 1992-07-09

Similar Documents

Publication Publication Date Title
US7193437B2 (en) Architecture for a connection block in reconfigurable gate arrays
US20010050583A1 (en) High speed latch and flip-flop
US5926050A (en) Separate set/reset paths for time critical signals
WO2001009900A2 (en) High speed latch and flip-flop
US8345490B2 (en) Split voltage level restore and evaluate clock signals for memory address decoding
JPH0473808B2 (enrdf_load_html_response)
US9276580B2 (en) Time division multiplexed limited switch dynamic logic
US5636161A (en) Eprom bit-line interface for implementing programming, verification and testing
US6078196A (en) Data enabled logic circuits
JP2003046376A (ja) フリップフロップ回路
US6307400B1 (en) Data register circuit in memory device
JPS61294933A (ja) 半導体装置およびデ−タ伝送路
JP3178383B2 (ja) 同期型半導体論理回路
JPS61294931A (ja) 半導体装置およびデ−タ伝送路
JPS61294932A (ja) 半導体装置およびデ−タ伝送路
KR100507866B1 (ko) 디디알 에스디램의 파이프래치 출력단 프리차지 구조
JPS61294934A (ja) 半導体装置およびデ−タ伝送路
KR0172428B1 (ko) 3볼트 및 5볼트 겸용 딜레이셀
JPH0275219A (ja) ラッチ回路
KR920007262B1 (ko) 지연 플립플롭
JPS61294935A (ja) 半導体装置およびデ−タ伝送路
JP2000295081A (ja) レジスタ回路及びラッチ回路
US6377096B1 (en) Static to dynamic logic interface circuit
JPH0765577A (ja) 半導体記憶装置の出力回路
JPH02280411A (ja) Ｄフリップフロップ回路

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term