JPS61287138A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS61287138A JPS61287138A JP60128729A JP12872985A JPS61287138A JP S61287138 A JPS61287138 A JP S61287138A JP 60128729 A JP60128729 A JP 60128729A JP 12872985 A JP12872985 A JP 12872985A JP S61287138 A JPS61287138 A JP S61287138A
- Authority
- JP
- Japan
- Prior art keywords
- bump
- electrode
- inner lead
- bonding
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60128729A JPS61287138A (ja) | 1985-06-13 | 1985-06-13 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60128729A JPS61287138A (ja) | 1985-06-13 | 1985-06-13 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61287138A true JPS61287138A (ja) | 1986-12-17 |
| JPH0426546B2 JPH0426546B2 (enrdf_load_stackoverflow) | 1992-05-07 |
Family
ID=14992003
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60128729A Granted JPS61287138A (ja) | 1985-06-13 | 1985-06-13 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61287138A (enrdf_load_stackoverflow) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5027995A (en) * | 1988-08-31 | 1991-07-02 | Siemens Aktiengesellschaft | Process for bonding semiconductor chips to substrates |
| US5504375A (en) * | 1992-03-02 | 1996-04-02 | International Business Machines Corporation | Asymmetric studs and connecting lines to minimize stress |
-
1985
- 1985-06-13 JP JP60128729A patent/JPS61287138A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5027995A (en) * | 1988-08-31 | 1991-07-02 | Siemens Aktiengesellschaft | Process for bonding semiconductor chips to substrates |
| US5504375A (en) * | 1992-03-02 | 1996-04-02 | International Business Machines Corporation | Asymmetric studs and connecting lines to minimize stress |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0426546B2 (enrdf_load_stackoverflow) | 1992-05-07 |
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