JPS61285747A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve characteristics, by forming the channel region of a junction type field effect transistor by selective epitaxial growing. CONSTITUTION:On a P-type semiconductor substrate 11, an N-type epitaxial layer 12 is formed. A P-type isolating region 13 is formed. Then on the isolated N-type epitaxial layer 12, patterning for forming a selective P-type epitaxial layer is performed. A selective P-type epitaxial layer 15 is formed in the N-type epitaxial layer 12. Patterning for forming source and drain regions of a J-FET is performed on the P-type epitaxial layer 15. A source region 16 and a drain region 17 are formed by diffusion. Thus crystal defects are made small, and the dispersion in characteristics such as a current-voltage characteristic, low noise property and withstanding voltage can be made small.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a method for manufacturing a semiconductor device in which a bipolar transistor and a junction field effect transistor are mixed, and in particular, a method for manufacturing a semiconductor device in which a bipolar transistor and a junction field effect transistor are mixed. The present invention relates to a method for forming a channel region.

<Summary of the Invention> The present invention provides a method for manufacturing a semiconductor device in which a bipolar transistor and a junction field effect transistor are mixed, in which a channel region of the junction field effect transistor is formed by selective epitaxial growth. As a result, the characteristics of the semiconductor device having the above structure have been improved.

<Conventional technology> Conventionally, junction field effect transistors (hereinafter referred to as "J-FE"
The channel region (referred to as "T") was formed by ion implantation or the like.

FIG. 2 shows an example of a conventional manufacturing method.

(1) P-type semiconductor substrate! An N-type epitaxial layer 2 is formed thereon, and a P-type isolation region 3 is formed by further performing P-type isolation diffusion.
After forming the −J −FET source.

Patterning is performed to form a drain region. That is, 5i02 formed on the N-type epitaxial layer 2
The source and drain portions of the film 4 are removed. At this time, at the same time, a bipolar transistor (hereinafter 'r Bi-TJ
Patterning is also performed to form the base region.

(2) Form the source region 5 and drain region 6 of the υJ-FET by diffusion. At this time, a Bi-T pace region is also formed at the same time. Thereafter, patterning and diffusion are performed to form a Bi-T emitter region, and Bi-T is formed.

(3) Perform patterning to form a channel region of the J-FET.

(4) Perform a thin pre-oxidation on the channel portion of the J-FET.

(5) Thin oxide film (Si0
2) Ion implantation is performed through the film 7 to form the P-type channel region 8 of the J-FET.

<Problems to be Solved by the Invention> However, the conventional manufacturing method described above has a problem in that satisfactory characteristics such as current-voltage characteristics, low noise, and withstand voltage cannot be obtained.

The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide a manufacturing method capable of obtaining a semiconductor device with good characteristics.

<Means for solving the problem> A channel region of a junction field effect transistor is formed by selective epitaxial growth.

Effect> By forming by selective epitaxial growth, there are fewer crystal defects and better crystallinity compared to conventional methods such as ion implantation and diffusion, resulting in improved characteristics such as current-voltage characteristics, low noise, and breakdown voltage. It is possible to obtain a semiconductor device with small variations in characteristics and satisfactory characteristics.

<Example> Hereinafter, the present invention will be described in detail based on examples. FIG. 1 is a process diagram of an embodiment of the present invention.

(1) P-type semiconductor substrate 1! N-type epitaxial layer 1 on top
2 is formed, and P-type isolation diffusion is performed to form a P-type isolation region 13. 14 is a 5i02 film which is a mask for diffusion.

(2) Patterning for forming a selective P-type epitaxial layer is performed on the separated N-type epitaxial layer 12.

(3) A selective P-type epitaxial layer 15 is formed within the N-type epitaxial layer 12. That is, the Si02 film 14
Silicon etching is performed using the mask as a mask to remove a portion of the N-type epitaxial layer 12.

Next, a selective P-type epitaxial layer 15 is grown on the removed portion. This P type epitaxial layer 15 is J, -F
This becomes the P-type channel region of ET.

(4) Patterning is performed on the P-type epitaxial layer 15 to form the source and drain regions of the J-FET. (5) J-FET is formed in the P-type epitaxial layer 15 by diffusion.
A source region +6 and a drain region 17 of the FET are formed.

<Effects of the Invention> As explained in detail above, according to the method of manufacturing a semiconductor device of the present invention, in the method of manufacturing a semiconductor device in which bipolar transistors and junction field effect transistors are mixed, the junction type Since the channel region of the field effect transistor is formed by selective epitaxial growth, there are few crystal defects and good crystallinity, resulting in satisfactory characteristics with small variations in characteristics such as current-voltage characteristics, low noise, and withstand voltage. A semiconductor device can be obtained.

[Brief explanation of drawings]

FIG. 1 is a process diagram of an embodiment of the present invention, and FIG. 2 is a process diagram of a conventional manufacturing method. The explanation of the symbols is as follows: P-type semiconductor substrate, 2: N-type epitaxial layer, 3: P
Type separation region, 4: 5i02 film, 5: Source region, 6
: Drain region, 7: Thin oxide film, 8: P-type channel region, 1: P-type semiconductor substrate, 12: N-type epitaxial layer, 13: P-type isolation region, 14: 5i02 film, 15:
Selected P-type epitaxial layer (channel region), 16:
Source region, 17: Drain region. Agent Patent attorney Aihiko Fuku (and 2 others) 211Ra
-Ship R4θ engineering sm 1II (4n ■ 10 Mehiki Nanahiro 41πChang Fig. 2

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device in which a bipolar transistor and a junction field effect transistor are mixed, characterized in that the channel region of the junction field effect transistor is formed by selective epitaxial growth.