JPS61279175A - Driving method for charge transfer device - Google Patents

Driving method for charge transfer device

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Publication number
JPS61279175A
JPS61279175A JP12174985A JP12174985A JPS61279175A JP S61279175 A JPS61279175 A JP S61279175A JP 12174985 A JP12174985 A JP 12174985A JP 12174985 A JP12174985 A JP 12174985A JP S61279175 A JPS61279175 A JP S61279175A
Authority
JP
Japan
Prior art keywords
electrode
charge
transfer
pulse
beneath
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12174985A
Other languages
Japanese (ja)
Inventor
Junichi Orihara
折原 旬一
Masanori Koshobu
小勝負 雅典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP12174985A priority Critical patent/JPS61279175A/en
Publication of JPS61279175A publication Critical patent/JPS61279175A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To make it possible to transfer electric charge perfectly at an input part and to improve distortion characteristics, by differentiating the times when the instantaneous levels of two pulses, whose phases are different by about 180 degrees to each other and which are applied to the first and second transfer electrodes, start changing. CONSTITUTION:A pulse phis is applied to a sampling electrode 5. A pulse phi1 is applied to a first transfer electrode 7 and third transfer electrodes 10 and 11. A pulse phi2 is applied to second transfer electrodes 8 and 9. The pulses phi1 and phi2 have the phase difference by about 180 degrees. The relation of potentials at intersections is expressed by V1<V2. When the charge is moved from the part beneath a constant voltage electrode 6 to the part 1 beneath the potential, phi2 is applied to the electrode 8. Therefore, the potential beneath the electrode 8 becomes high so that the charge, which is transferred to the part beneath the electrode 7, is not exceeded. When the charge is transferred to the part beneath the electrode 9 from the part beneath the electrode 7, the potentials beneath the electrodes 7 and 8 become low so that the charge does not flow back to the part beneath the electrode 6. Therefore, the perfect charge transfer can be performed.

Description

【発明の詳細な説明】 技術分野 本発明は、電荷転送装置の駆動方法に関し、特にMO8
型構造のいわゆるCCU(チャージ・カップルド・デバ
イス)と称される電荷転送装置の駆動方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for driving a charge transfer device, and in particular to a method for driving a charge transfer device.
The present invention relates to a method of driving a charge transfer device called a so-called CCU (charge coupled device) having a type structure.

背景技術 CCDはMO8構造における酸化膜下のシリコン表面に
非安定状態で存在する電荷の有無を情報とし、アレイ状
に配設したゲート電極に適当な制御電圧を印加して電荷
をゲート電極下のシリコン表面に沿い転送するものであ
シ、シフトレジスタ、遅延回路、演算回路更には撮像デ
バイス等に用いられている。
BACKGROUND TECHNOLOGY CCD uses information on the presence or absence of charges that exist in an unstable state on the silicon surface under the oxide film in the MO8 structure, and applies an appropriate control voltage to the gate electrodes arranged in an array to transfer the charges to the bottom of the gate electrodes. Transfer is performed along the silicon surface, and it is used in shift registers, delay circuits, arithmetic circuits, and even imaging devices.

かかるCODの一例としてN形の埋込チャンネルを用い
た2相駆動のCCUを第1図に示す。第1図において、
P型半導体基板1上にn、−埋込層2が形成されている
。このn−埋込層2に隣接するようにル+拡散による電
荷注入部3が設けられている。半導体基板1のn−埋込
層2等が設けられている主面上には酸化膜4が形成され
ている。
As an example of such a COD, a two-phase drive CCU using an N-type buried channel is shown in FIG. In Figure 1,
An n,-buried layer 2 is formed on a P-type semiconductor substrate 1 . A charge injection part 3 by Lu+ diffusion is provided adjacent to this n- buried layer 2. An oxide film 4 is formed on the main surface of the semiconductor substrate 1 on which the n-buried layer 2 and the like are provided.

酸化膜4は所定間隔おきに厚さが犬となっており、この
厚さが犬になった部分の内部にはポリシリコン又は金属
からなる1層目の電極5,7,9.11が埋設されてい
る。まだ、酸化膜4の厚さが小となった部分の面上には
1層目の電極と同様にポリシリコン又は金属からなる2
層目の電極6,8,30゜12が形成されている。電極
5は、電荷を注入するタイミングを決定するだめのサン
プリング電極となっている。電極6は、注入された電荷
を蓄えるだめの定電圧電極となっている。電極7は、第
1転送電極となっている。また、電極8及び9によって
第2転送電極が形成され、電極】0及び11によって第
3転送電極が形成されている。
The oxide film 4 has doglegs in thickness at predetermined intervals, and first layer electrodes 5, 7, 9, and 11 made of polysilicon or metal are buried inside the dogged areas. has been done. Still on the surface of the part where the thickness of the oxide film 4 has become small, there is a second layer made of polysilicon or metal similar to the first layer electrode.
Layered electrodes 6, 8, and 30° 12 are formed. The electrode 5 serves as a sampling electrode for determining the timing of charge injection. The electrode 6 is a constant voltage electrode that stores the injected charges. Electrode 7 serves as a first transfer electrode. Further, electrodes 8 and 9 form a second transfer electrode, and electrodes 0 and 11 form a third transfer electrode.

2層目の電極6 、8 、 ]、 0 、12の下方に
は1層目の電極5,7,9.11をマスクとしたセルフ
ァラインによりP形不純物を導入して形成されたバリヤ
部13,14,15.16が設けられている。そして、
1層目の電極5,7,9.11の下方に電荷が蓄積され
、2層目の電極6,8,10.12の下方においてはバ
リヤ部13,14.15.16によって1層目の電極下
よりも電子に対するポテンシャルを上げることにより電
荷の逆流が防止される。
Below the second layer electrodes 6 , 8 , ], 0 , 12 is a barrier section 13 formed by introducing P-type impurities using a self-alignment line using the first layer electrodes 5 , 7 , 9 , 11 as a mask. , 14, 15, and 16 are provided. and,
Electric charges are accumulated under the first layer electrodes 5, 7, 9.11, and under the second layer electrodes 6, 8, 10.12, the barrier portions 13, 14, 15, 16 By raising the potential for electrons below the electrode, backflow of charges is prevented.

以上の如きCCDの従来の駆動方法によれば、第5図(
A)に示す如きパルスφ8がサンプリング電極としての
1層目の電極5に印加されかつ同図(13)に示す如く
互いに逆相のパルスφ1及びφ2が電極7゜10.11
及び電極8.9.12にそれぞれ印加される。パルスφ
1.φ2は、波形が相等しくかつ位相が互いに172周
期だけ相違している。そして、パルスφ1の立上り時と
パルスφ、の立下り時の交点の電位■1す力わちパルス
φ1の立−トり時とパルスφ、の立下り時において瞬時
レベルが相等しくなったときの電位と、パルスφ、の立
下り時とパルスφ2の立」二り時の交点の電位■、すな
わちパルスφ1の立下り時とパルスφ2の立上り時にお
いて瞬時レベルが相等しくなったときの電位は相等しい
According to the conventional driving method of CCD as described above, as shown in FIG.
A pulse φ8 as shown in A) is applied to the first layer electrode 5 as a sampling electrode, and pulses φ1 and φ2 of mutually opposite phases are applied to the electrode 7°10.11 as shown in FIG.
and electrodes 8.9.12, respectively. Pulse φ
1. The waveforms of φ2 are equal and the phases are different from each other by 172 cycles. Then, the potential at the intersection of the rising edge of pulse φ1 and the falling edge of pulse φ1 is equal to the instantaneous level at the rising edge of pulse φ1 and the falling edge of pulse φ. The potential at the intersection of the potential at the falling edge of the pulse φ and the rising edge of the pulse φ2, that is, the potential when the instantaneous levels are equal at the falling edge of the pulse φ1 and the rising edge of the pulse φ2. are equal.

このとき、時刻1.−16におけるCCT)内部の電子
に対するポテンシャルと電荷(電子)の動きは第6図(
A)乃至同図(Piに示す如くなる。すなわち、時刻t
0においてパルスφ8が高レベルとなり第6図(A)に
示す如くサンプリング電極としての電極5下(同図81
間)のポテンシャルが低く(電子に対してンなる。そう
すると、入力■1Nの電位vJNと定電圧電極としての
電極6下(同図TU間)の電位Foとの差に対応する電
荷が電極6下に流入する。
At this time, time 1. -16 CCT) The potential for electrons and the movement of charges (electrons) are shown in Figure 6 (
A) to the same figure (as shown in Pi. That is, time t
At 0, the pulse φ8 becomes high level, and as shown in FIG.
The potential of Flows downward.

次いで、時刻t、においてパルスφ8が低レベルになる
と、第6図(lに示す如く電極5下(同図81間)のポ
テンシャルが上昇し、入力電位に対応した電荷が分離さ
れて電極6下(同図TU間)に蓄積される。次いで、パ
ルスφ、の瞬時レベルが」二昇し始めかつパルスφ2の
瞬時レベルが下降し始めると(時刻t8)、第6図(C
)に示す如く第1転送電極としての電極7下(同図UV
間)のポテンシャルが下降し始めかつ第2転送電極とじ
での電極8及び9下(同図vX間)のポテンシャルが上
昇し始める。
Next, when the pulse φ8 becomes low level at time t, the potential under the electrode 5 (between 81 in the same figure) increases as shown in FIG. Then, when the instantaneous level of pulse φ begins to rise by 2 and the instantaneous level of pulse φ2 begins to decrease (time t8),
) as shown below the electrode 7 as the first transfer electrode (UV
The potential below the electrodes 8 and 9 at the end of the second transfer electrode (between vX in the figure) begins to rise.

そして、電極7下のポテンシャルがVroに近づくと電
極6下の電荷は電極7下に移動し始める。このとき電荷
が電極8下(同図VW間)を越えて電極9下(同図WX
間)に達しないようにするためには時刻t8において電
極8下のポテンシャルが電極7下(同図UV間)のポテ
ンシャルよりも少くとも電極7下への電荷の流入分によ
る電極7下のポテンシャルの上昇分以上高い必要がある
Then, when the potential under the electrode 7 approaches Vro, the charge under the electrode 6 begins to move under the electrode 7. At this time, the charge exceeds the area below electrode 8 (between VW in the same figure) and the area below electrode 9 (between WX in the same figure).
In order to prevent the potential under the electrode 8 from reaching the voltage (between UV and UV) at time t8, the potential under the electrode 7 is at least lower than the potential under the electrode 7 (between UV in the figure) due to the inflow of charge under the electrode 7. need to be higher than the increase in

時刻t、においては転送が完了し、第6図の)に示す如
く電荷は電極7下(同図UV間)に蓄積されている。次
いで、パルスφ、の瞬時レベルが下降シ始めかつパルス
φ、の瞬時レベルが上昇し始めると、電極7下のポテン
シャルが上昇し始め、電極8及び9下のポテンシャルが
下降し始める。時刻t5において第6図の)に示す如く
電極7下の電荷は電極8及び9下に移動し始めるが、こ
のときポテンシャル関係は時刻t8における場合と等l
〜くなって電極7下の電位はToより高くなるので電極
7下の電荷は時刻t6において第6図[F]に示す如く
電極6下と電極9下に分割される。このため、電荷の一
部が逆流して失なわれ、CCD出力に歪が生じることに
なる。
At time t, the transfer is completed, and the charge is accumulated under the electrode 7 (between UV and UV in the figure) as shown in Figure 6). Then, as the instantaneous level of pulse φ begins to fall and the instantaneous level of pulse φ begins to rise, the potential under electrode 7 begins to rise and the potential under electrodes 8 and 9 begins to fall. At time t5, the charge under electrode 7 begins to move under electrodes 8 and 9, as shown in ) in FIG. 6, but at this time, the potential relationship is equal to that at time t8.
Since the potential under the electrode 7 becomes higher than To at time t6, the electric charge under the electrode 7 is divided into the lower part of the electrode 6 and the lower part of the electrode 9 as shown in FIG. 6 [F] at time t6. As a result, part of the charge flows backward and is lost, causing distortion in the CCD output.

若し、時刻t5において電極7下の全ての電荷を電極9
下に転送するためには第7図(C1に示す如く電極7下
のポテンシャルが少なくとも電荷蓄積によるポテンシャ
ル」二昇分以上Foより低い間に転送を完了する必要が
ある。しかしながら、このような条件にすると時刻t8
において第7図(A)に示す如く電極6下の電荷が電極
7下だけでなく電極9下にまで達してしまう。また、時
刻t、においては第7図(B)に示す如く電極6下の電
荷が電極11下(同図YZ間)捷で達1〜でしまう。従
って、電極6下に蓄積されるべき電荷の一部が一周期前
にサンプリングされた電荷に加算されることとなる。か
かる場合もCCD出力に歪が生じ特性が悪化することと
なる。
If all the charges under the electrode 7 are transferred to the electrode 9 at time t5,
In order to transfer downward, it is necessary to complete the transfer while the potential under the electrode 7 is at least two steps lower than Fo, as shown in FIG. 7 (C1). However, under such conditions Then time t8
In this case, as shown in FIG. 7(A), the charge under the electrode 6 reaches not only under the electrode 7 but also under the electrode 9. Further, at time t, as shown in FIG. 7(B), the charge under the electrode 6 reaches 1 or more due to a break under the electrode 11 (between Y and Z in the figure). Therefore, part of the charge to be accumulated under the electrode 6 is added to the charge sampled one cycle before. In such a case, distortion will occur in the CCD output and the characteristics will deteriorate.

発明の概要 本発明の目的は、完全な電荷転送を可能にする電荷転送
装置の駆動方法を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for driving a charge transfer device that allows complete charge transfer.

本発明による電荷転送装置の4駆動方法は、所定導電型
の半導体層上に絶縁膜を介して形成されかつ定電圧電極
に続いて所定方向に順次配列された第1及び第2転送電
極に印加する互いにほぼ逆相の2つの駆動パルスの瞬時
レベルが変化し始める時刻が相異なるようにしたことを
特徴としている。
The four driving methods of the charge transfer device according to the present invention include applying voltage to first and second transfer electrodes formed on a semiconductor layer of a predetermined conductivity type via an insulating film and arranged sequentially in a predetermined direction following a constant voltage electrode. The present invention is characterized in that the instantaneous levels of the two drive pulses having substantially opposite phases to each other start changing at different times.

実施例 以下、本発明の実施例につき第2図乃至第4図を参照し
て詳細に説明する。
Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 2 to 4.

本発明の駆動方法によって第2図(3)に示す如きパル
スφ8がサンプリング電極としての電極5に印加されか
つ同図(nに示す如きパルスφ1及びφ2が電極7.1
0.11及び電極8,9.12にそれぞれ印加される。
By the driving method of the present invention, a pulse φ8 as shown in FIG. 2(3) is applied to the electrode 5 as a sampling electrode, and pulses φ1 and φ2 as shown in FIG.
0.11 and applied to electrodes 8 and 9.12, respectively.

これらパルスφ0.φ、は例えば互いに逆相の2つのパ
ルスのうちの一方を遅延させることにより得られ、パル
スφ、の立上りエツジとパルスφ、の立下りエツジとの
交点の電位■、よりパルスφ1の立下りエツジとパルス
φ2の立上リエッジとの交点の電位■、の方が高くなっ
ている。
These pulses φ0. φ is obtained, for example, by delaying one of two pulses with opposite phases to each other, and the potential ■ at the intersection of the rising edge of pulse φ and the falling edge of pulse φ is determined by the falling edge of pulse φ1. The potential ■ at the intersection of the edge and the rising edge of the pulse φ2 is higher.

このとき、第5図に示すパルスφ0.φ1.φ2によっ
て駆動した場合の時刻t8に相当する時刻すなわち電極
6下から電極7下への電荷の転送時に電極7下のポテン
シャルが孔に近づいて電極6下から電極7下への電荷の
移動が起こったとき、立下り開始時刻がφ1の立上り開
始時刻より早いφ、が電極8に印加されているので電極
8下のポテンシャルが電イ函7下へ移送された電荷が越
えない程度に高くなる。寸だ、第5図に示すパルスφ。
At this time, the pulse φ0. shown in FIG. φ1. At the time corresponding to time t8 when driven by φ2, that is, when the charge is transferred from below the electrode 6 to below the electrode 7, the potential below the electrode 7 approaches the hole, and the charge moves from below the electrode 6 to below the electrode 7. At this time, since φ, whose falling start time is earlier than the rising start time of φ1, is applied to the electrode 8, the potential under the electrode 8 becomes high enough not to be exceeded by the charge transferred to the bottom of the electric box 7. The pulse φ shown in FIG.

、φ0.φ、によって駆動した場合の時刻t、に相当す
る時刻すなわち電極7下から電極9下への電荷の転送時
には立上り開始時刻がφ1の立下り開始時刻より早いφ
, φ0. When driven by φ, the time corresponding to time t, that is, when the charge is transferred from below the electrode 7 to below the electrode 9, the rising start time is earlier than the falling start time of φ1.
.

が電極8に印加されているので電極7下及び電極8下の
ポテンシャルが電荷が電極6下へ逆流しない程度にvf
oよりも低くなる。
is applied to the electrode 8, the potential below the electrode 7 and the potential below the electrode 8 is vf to the extent that the charge does not flow back to the bottom of the electrode 6.
It will be lower than o.

従って、電荷の逆流による消失及び−周期前にサンプリ
ングされた電荷の誤増加が防止されて完全な電荷転送が
可能となる。
Therefore, loss of charge due to backflow and erroneous increase of charge sampled -period ago are prevented, and complete charge transfer is possible.

第3図は、本発明の他の実施例を示しており、電位V1
. V、がパルスφ□、φ2の最低電位及び最高電位に
等しくなっている。かかる場合も第2図の場合と同様な
動作が得られる。
FIG. 3 shows another embodiment of the invention, in which the potential V1
.. V is equal to the lowest potential and the highest potential of pulses φ□ and φ2. In this case as well, the same operation as in the case of FIG. 2 can be obtained.

第4図は、更に他の実施例を示しており、パルスφ8及
び第1転送電極に印加されるパルスφ1のみが第5図に
おける場合より遅延されている。かかる場合においても
第2図に示すパルスφ。、φ1.φ。
FIG. 4 shows yet another embodiment, in which only the pulse φ8 and the pulse φ1 applied to the first transfer electrode are delayed from the case in FIG. Even in such a case, the pulse φ shown in FIG. , φ1. φ.

によって駆動した場合と同様に電極6下から電極=8− 7下への電荷の移動が起こったとき、電極8下のポテン
シャルが電極7下へ移送された電荷が越えない程度に高
くなる。また、電極7下から電極9下への電荷の転送時
に電極7下及び電極8下のポテンシャルが電荷が電極6
下へ逆流しない程度にFoよりも低くなって完全な電荷
転送が可能となる。
When the charge moves from below the electrode 6 to below the electrode 8-7, the potential below the electrode 8 becomes high enough not to be exceeded by the charge transferred below the electrode 7. Also, when the charge is transferred from below the electrode 7 to below the electrode 9, the potential below the electrode 7 and the potential below the electrode 8 is
It becomes lower than Fo to such an extent that reverse flow does not occur, allowing complete charge transfer.

発明の効果 以上詳述した如く本発明による電荷転送装置の駆動方法
は、所定導電型の半導体層−Fに絶縁膜を介して形成さ
れ所定方向に順次配列された第1及び第2転送電極に印
加する互いにほぼ逆相の2つのパルスの瞬時レベルが変
化し始める時刻が相異なるようにしたので、入力部での
完全が電荷転送を可能にし、CCDの歪特性を大幅に向
上させることができる。まだ、定電圧電極に印加する電
圧の最適値は、パルスφ1.φ2の交点の電圧V0.V
、と密接な関係があり、電圧Vl 、 V2が変動すれ
は定電圧電極に印加する電圧の最適値も変動するが、電
圧Vt、V、はウェハープロセス条件のばらつきにより
ばらつくため、定電圧電極に印加する電圧を固定すると
歩止りが非常に悪くなり、プロセスのコントロールも困
難となる。しかし、第3図に示すパルスを用いればV、
 、 V2はプロセス条件がばらついても変化せず、歩
止りは大幅に向上し、プロセス条件のコントロールも容
易となる。
Effects of the Invention As detailed above, the method for driving a charge transfer device according to the present invention includes first and second transfer electrodes formed on a semiconductor layer -F of a predetermined conductivity type with an insulating film interposed therebetween and arranged sequentially in a predetermined direction. Since the times at which the instantaneous levels of the two applied pulses, which are approximately opposite in phase to each other, begin to change are different, this enables perfect charge transfer at the input section and greatly improves the distortion characteristics of the CCD. . Still, the optimum value of the voltage applied to the constant voltage electrode is the pulse φ1. The voltage V0 at the intersection of φ2. V
, and as the voltages Vl and V2 fluctuate, the optimal value of the voltage applied to the constant-voltage electrode also changes, but since the voltages Vt and V vary due to variations in wafer process conditions, the constant-voltage electrode If the applied voltage is fixed, the yield will be extremely poor and process control will be difficult. However, if the pulse shown in Fig. 3 is used, V,
, V2 does not change even if process conditions vary, yield is greatly improved, and process conditions can be easily controlled.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、CCDの構造を示す断面図、第2図は、本発
明の一実施例を示す波形図、第3図は、本発明の他の実
施例を示す波形図、第4図は、本発明の更に他の実施例
を示す波形図、第5図は、従来の駆動方法を示す波形図
、第6図及び第7図は、従来の駆動方法による駆動パル
スを用いたときのCCD内部のポテンシャルを示す図で
ある。 1代にバイオ=1株式会社 代理人  弁理士 藤 村 元 彦 第7図 #−2凹 叶  く     1 尾ろ図 葬、7図
Fig. 1 is a sectional view showing the structure of a CCD, Fig. 2 is a waveform diagram showing one embodiment of the present invention, Fig. 3 is a waveform diagram showing another embodiment of the invention, and Fig. 4 is a waveform diagram showing another embodiment of the invention. , a waveform diagram showing still another embodiment of the present invention, FIG. 5 is a waveform diagram showing a conventional driving method, and FIGS. 6 and 7 show a CCD when driving pulses according to the conventional driving method are used. FIG. 3 is a diagram showing internal potential. Bio for 1 Generation = 1 Co., Ltd. Agent Patent Attorney Motohiko Fujimura Figure 7 #-2 Concave Leaf 1 Oro Illustrated Funeral, Figure 7

Claims (1)

【特許請求の範囲】[Claims] 所定導電型の半導体層と、前記半導体層に入力に応じた
電荷を注入する手段と、前記半導体層上に絶縁膜を介し
て形成された定電圧電極と、前記半導体層上に絶縁膜を
介して形成されかつ前記定電圧電極に続いて所定方向に
順次配列された第1及び第2転送電極とを有し、前記定
電圧電極に所定電圧を印加して前記定電圧電極下の半導
体層表面に注入電荷を一時蓄積し、前記第1及び第2転
送電極に互いにほぼ逆相の2つの駆動パルスを印加して
前記注入電荷を前記第1及び第2転送電極下の半導体層
表面に沿って順次転送する電荷転送装置の駆動方法であ
って、前記2つの駆動パルスの瞬時レベルが変化し始め
る時刻が相異なるようにしたことを特徴とする電荷転送
装置の駆動方法。
A semiconductor layer of a predetermined conductivity type, a means for injecting a charge according to an input into the semiconductor layer, a constant voltage electrode formed on the semiconductor layer with an insulating film interposed therebetween, and a constant voltage electrode formed on the semiconductor layer with an insulating film interposed therebetween. first and second transfer electrodes are formed by applying a predetermined voltage to the constant voltage electrode and are sequentially arranged in a predetermined direction following the constant voltage electrode, and the surface of the semiconductor layer under the constant voltage electrode is The injected charges are temporarily stored in the first and second transfer electrodes, and two driving pulses having substantially opposite phases are applied to the first and second transfer electrodes to cause the injected charges to be transferred along the surface of the semiconductor layer under the first and second transfer electrodes. 1. A method for driving a charge transfer device that performs sequential transfer, characterized in that the instantaneous levels of the two drive pulses start changing at different times.
JP12174985A 1985-06-04 1985-06-04 Driving method for charge transfer device Pending JPS61279175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12174985A JPS61279175A (en) 1985-06-04 1985-06-04 Driving method for charge transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12174985A JPS61279175A (en) 1985-06-04 1985-06-04 Driving method for charge transfer device

Publications (1)

Publication Number Publication Date
JPS61279175A true JPS61279175A (en) 1986-12-09

Family

ID=14818931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12174985A Pending JPS61279175A (en) 1985-06-04 1985-06-04 Driving method for charge transfer device

Country Status (1)

Country Link
JP (1) JPS61279175A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156880A (en) * 1984-12-28 1986-07-16 Toshiba Corp Driving system for charge transfer device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156880A (en) * 1984-12-28 1986-07-16 Toshiba Corp Driving system for charge transfer device

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