JPS61274346A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61274346A JPS61274346A JP11563985A JP11563985A JPS61274346A JP S61274346 A JPS61274346 A JP S61274346A JP 11563985 A JP11563985 A JP 11563985A JP 11563985 A JP11563985 A JP 11563985A JP S61274346 A JPS61274346 A JP S61274346A
- Authority
- JP
- Japan
- Prior art keywords
- high frequency
- semiconductor substrate
- semiconductor device
- extra high
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の素子表面上の構造に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a structure on an element surface of a semiconductor device.
従来の半導体装置は、第2図(5)および(B)にそれ
ぞれ平面図及び断面図で示す通り、リードフレーム1に
半導体素子を形成した半導体基板2をロー材3で搭載し
、リード部lと半導体基板2上の電極とを細線4で結線
し、そして半導体基板2とリード部lの一部を樹脂5で
封止して完成するものであった。In the conventional semiconductor device, as shown in FIGS. 2(5) and 2(B), respectively, a plan view and a cross-sectional view, a semiconductor substrate 2 on which a semiconductor element is formed is mounted on a lead frame 1 using a brazing material 3, and a lead portion l is mounted on a lead frame 1. and the electrodes on the semiconductor substrate 2 are connected with a thin wire 4, and the semiconductor substrate 2 and a part of the lead part 1 are sealed with a resin 5 to complete the process.
ここで、従来用いられて米た半導体装置の最大の欠陥は
半導体基板20表面と樹脂5が接触している為に、その
超高周波の電気特性を劣化させるということにあった。Here, the biggest drawback of conventionally used semiconductor devices is that the surface of the semiconductor substrate 20 and the resin 5 are in contact with each other, which deteriorates the electrical characteristics of the ultra-high frequency.
本発明による半導体装置は、高周波領域表面を箱型の絶
縁体7でおおったものである。The semiconductor device according to the present invention has a high frequency region surface covered with a box-shaped insulator 7.
以下、本発明について図面によシ詳述する。第1図は本
発明の一実施例を示す。第1図から明らかな様に、集積
回路等の半導体基板2申で超高周波動作領域6の表面に
箱型の絶縁体7を絶縁性接着剤8で接着する。この後、
樹脂5で封止して完成する。したがって領域6上は中空
9となり、高周波特性の劣化がない。Hereinafter, the present invention will be explained in detail with reference to the drawings. FIG. 1 shows an embodiment of the invention. As is clear from FIG. 1, a box-shaped insulator 7 is bonded with an insulating adhesive 8 to the surface of an ultra-high frequency operating region 6 of a semiconductor substrate such as an integrated circuit. After this,
It is sealed with resin 5 and completed. Therefore, there is a hollow 9 above the region 6, and there is no deterioration of high frequency characteristics.
この様に、半導体装置の半導体基板上の超高周波動作領
域の表面上に中空を作ることによシ、電気特性で特に超
高周波での使用可能筒V数を広げる事が可能となる。In this way, by creating a hollow space on the surface of the ultra-high frequency operating region on the semiconductor substrate of the semiconductor device, it becomes possible to increase the number of cylinders V that can be used in terms of electrical characteristics, especially at ultra-high frequencies.
第1図囚、(B)は夫々本発明の一実施例を示す平面図
および断面図である。第2図(イ)、(B)は夫々従来
例を示す平面図および断面図である。
1・・・・・・リードフレーム、2・・・・・・半導体
基板、3・・・・・・ロー材、4・・・・・・細線、5
・・・・・・樹脂、6・・・・・・超高周波動作領域、
7・・・・・・箱型絶縁体、8・−・・・・絶縁性接着
材% 9・・・・・中空。
第1図
′ り−
S稽1缶
3υ−序オ
第 2 回
一ト“°7レムFIGS. 1(B) and 1(B) are a plan view and a cross-sectional view, respectively, showing an embodiment of the present invention. FIGS. 2(A) and 2(B) are a plan view and a sectional view, respectively, showing a conventional example. 1...Lead frame, 2...Semiconductor substrate, 3...Raw material, 4...Thin wire, 5
...Resin, 6...Ultra high frequency operating region,
7...Box-shaped insulator, 8...Insulating adhesive% 9...Hollow. Figure 1' Ri-S Lesson 1 can 3υ-Introduction O 2nd Itto "°7 Rem
Claims (1)
で覆って該高周波領域表面上を中空としたことを特徴と
する半導体装置。1. A semiconductor device, characterized in that a surface of a high frequency region of a semiconductor substrate is covered with an insulator having a hollow portion to form a hollow above the surface of the high frequency region.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11563985A JPS61274346A (en) | 1985-05-29 | 1985-05-29 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11563985A JPS61274346A (en) | 1985-05-29 | 1985-05-29 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61274346A true JPS61274346A (en) | 1986-12-04 |
Family
ID=14667619
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11563985A Pending JPS61274346A (en) | 1985-05-29 | 1985-05-29 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61274346A (en) |
-
1985
- 1985-05-29 JP JP11563985A patent/JPS61274346A/en active Pending
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