JPS61269545A - Computer system - Google Patents

Abstract

PURPOSE:To give much time to the application program of a user by providing a means setting a destination address and detecting own station address to a terminal processor and making a data transfer possible between terminal processing equipments so as to relieve the load to a CPU. CONSTITUTION:When a terminal equipment S1 receives a data from a terminal equipment T1 and the data is sent to a terminal equipment T2, a determined address to a terminal processor S2 is used as a destination address and sent to a system bus B. Then the data reaches all devices connected to the bus B and since the destination address on the bus B and the address set to the own station are coincident for the equipment S2 only, the device S2 only recognizes that the data on the bus B is addressed to the own station. Thus, after the equipment S2 inputs the data to the buffer memory of the own station, the data is sent to the terminal equipment T2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a computer system, and particularly to a terminal processing device that controls input/output with peripheral devices.

[Conventional technology]

FIG. 2 is a blower diagram showing a conventional system of this type, in which (C) is a central processing unit, (A) is a system bus connected to the central processing unit (C), and (A) is a system bus connected to the central processing unit (C).
Tl) and (T2) are terminal devices and (SCI), respectively.

(SC2) are terminal processing devices (1), (2), which interface with the terminal devices (TI) and (T2), respectively.
(3).

(4) is an arrow indicating the flow of data.

The central processing unit (C) executes user application programs and performs system management.

The data read from the terminal device (T1) is transferred to the terminal device (T2).
) The operation of the system shown in FIG. 2 will be explained by taking as an example the case of writing to a file.

According to instructions from the central processing unit (C), terminal processing is transmitted to the central processing unit (C). The central processing unit (C) temporarily stores this data in its memory, and if the data is to be sent to the end/floor device (T2), it sends the data to the terminal processing device (SC2). The terminal processing device (SC2) receives this data from the central processing device (C) and transmits the data to the terminal device (T2).

[Problem that the invention seeks to solve]

Since conventional computer systems are configured as described above, it is necessary for the central processing unit (C) to perform all control of data processing, and when there are a large number of terminal devices, the central processing unit There were problems such as a heavy load and a drop in processing capacity.

This invention was made to solve the above-mentioned problems, and an object of the present invention is to configure a computer system that enables direct data transfer between terminal processing units and reduces the load on the central processing unit.

[Means for solving problems]

In the present invention, direct data transfer between terminal processing devices is made possible by providing the terminal processing devices with the functions of setting a destination address and detecting the own address.

[Effect]

When direct data transfer becomes possible between terminal processing devices,
The load on the central processing unit is reduced accordingly.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which the same reference numerals as in FIG. 2 indicate the same or corresponding parts, and (81
), (82) are terminal processing devices that have the functions of setting data destination addresses and detecting their own address; (B) is a system bus that can transfer data between any terminal processing devices; (5), (6) , (7) show the flow of data.

Next, in FIG. 1, from the terminal device (T1) to the terminal device (
The operation of the system shown in FIG. 1 will be explained using the case where data is transferred at T2) as an example.

The address information of all devices connected to the initial pro system bus 031 is loaded into the terminal processing devices (Sl) and (S2) (written to the memory within the terminal processing device), and sent out by each terminal processing device. This makes it possible to set the destination address of data to be sent and to detect a match between the address on the system bus (Bl) and the address of the local station.

The terminal processing device (Sl) receives data from the terminal device (T1), and when trying to send this data to the terminal device (T2), sends the address specified for the terminal processing device (2S) as the destination. System bus fBl as address
Send upward. This data reaches all devices connected to the system bus tBl, but only in the terminal processing unit (2S) does the destination address on the system bus (Bl match the address set for the local station) Therefore, only the terminal processing unit (2S) is connected to the system bus FBI.
I learned that the above data was for my own station,
The data is input into its own buffer memory and then transmitted to the terminal device (T2).

In addition, in FIG. 1, it is common that terminal processing devices (single or plural) are connected to the system bus tBl in addition to the terminal processing devices (Sl) and (S2), but these are not shown in the drawing. Not shown.

Further, although an example in which one terminal device is connected to one terminal processing device has been described, the same effect can be achieved when a plurality of terminal devices are connected to one terminal processing device.

〔Effect of the invention〕

As described above, according to the present invention, the terminal processing device is provided with a means for setting a destination address and detecting its own address, and data transfer between the terminal processing devices is enabled, so that the load on the central processing device can be reduced, and the user This has the effect of allowing more time to be allocated to processing application programs.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional computer system. (C) central processing unit, ('B) H system bus, (8
1), (S2) U respectively terminal processing device, (TI)
, (T2) are respective terminal devices. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] A computer system in which a central processing unit that executes user application programs and manages the entire system and a plurality of terminal processing units are connected to a common system bus, An address for identifying the terminal processing device is determined for each terminal processing device, and when data is sent from each terminal processing device onto the system bus, the destination of the data is determined in the terminal processing device. means for adding and transmitting a destination address that identifies the terminal processing device, and comparing the destination address sent on the system bus in each terminal processing device with the address specified for the terminal processing device; A computer system comprising means for importing corresponding data into the terminal processing device when a match is detected in the comparison.