JPS61269358A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve the control of hFE in a bipolar type transistor by leaving a buffer film onto the surface of an emitter in the bipolar transistor in a semiconductor device with the bipolar type transistor. CONSTITUTION:A bipolar transistor II and a complementary type MOSFET I are formed to one main surface of an silicon semiconductor base body 11. The semiconductor device is manufactured in such a manner that a base in the bipolar transistor II is diffused, a buffer film 26 is shaped onto the surface, and the unnecessary section of the buffer film 26 is removed by utilizing a mask for diffusing source-drain in the p channel and n channel MOSFET I. A polycrystalline silicon film 29 is attached to one part of a base section through a window hole for the buffer film, and an impurity is diffused to the silicon base body 11 through the polycrystalline silicon film 29, thus forming an emitter 31 in the bipolar transistor II.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor device manufacturing technique in which different active elements are miniaturized and formed on one semiconductor substrate.

[Background technology]

Bi that forms a bipolar transistor and a complementary MOS transistor (referred to as a CMOS transistor that includes both a p-channel and an n-channel) on one semiconductor substrate.
-0MO8IC or LSI (semiconductor integrated circuit device) has already been attempted since 1969.

The features of Bi-0MO8LSI are the high speed and high power drive performance of bipolar integrated circuits, the high integration of CMO8 integrated circuits,
This is because they both have the mutual feature of low power consumption.

In this i-CMO8LSI, the whole surface of the semiconductor substrate is electrically isolated by a thick oxide film selectively formed on the surface, and several islands each having a well of a different conductivity type and a high concentration buried layer are formed. Structures are known in which fine bipolar transistors and transistors having poly-Si gates are formed within these island regions. (Japanese Unexamined Patent Publication No. 59-94861) According to a further miniaturized bipolar CMOS process developed by the inventor of the present application, in order to form an emitter 31 with a shallow junction depth as shown in FIG. 2
5 Surface oxide film 21 and SiO1 film 2 film thickness 9 holes are made and IJ Si (silicon) is deposited thereon, and emitter diffusion is performed through poly-Si, and this poly-Si film itself is used as an emitter. There is a way to use it as an electrode.

In order to control the dimensions of this emitter section, it is necessary to open a window hole 35 in the oxide film by dry etching, but in this case, the silicon surface 36 inside the window hole is scraped and the base width is pinched, resulting in a problem with the bipolar transistor glue, Σ&C. The inventors have found that problems arise in that not only variations occur but also crystal defects occur due to dry etching.

Then, the surface of the emitter section is covered with an oxide film of silicon nitride C3.
It is possible to prevent damage to the silicon surface by wet etching by changing to ilN4). However, providing this nitride on the semiconductor surface has the problem of varying the threshold voltage VτH in other semiconductor regions, that is, the M2S region, which limits the range in which the nitride is provided, and the process becomes complicated due to selective processing. It turns out that there is another problem.

[Purpose of the invention]

The present invention has been made to overcome the above-mentioned problems. That is, one object of the present invention is to improve the control of hFE in a bipolar transistor,
Another objective is to improve yield in the manufacture of bipolar CMO8 ICs.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, in a semiconductor device having a bipolar transistor on one main surface of a silicon semiconductor substrate, an electrode made of polysilicon is provided at the emitter of the bipolar transistor through a window hole made in a film made of a silicon oxide film and a silicon nitride film. This eliminates the abrasion of the silicon surface within the emitter window during contact window opening, enables hFK to be controlled, and achieves the object of the invention, which is to prevent the occurrence of crystal defects due to dry etching.

〔Example〕

FIGS. 1 to 6 show an embodiment of the present invention, and are process cross-sectional views of main process parts of a silicon gate, bipolar CMO8 semiconductor device.

The manufacturing process will be explained in detail below.

(1) A high concentration n+ type buried layer 12 and a p type buried layer 13 are formed on a p- type Si substrate (substrate) 11, and a low concentration n type Si layer is epitaxially grown thereon.
An n-type well layer 1 formed by n-type diffusion is formed on the +-type buried layer 12.
4 and 15, and on the p-type buried layer 13 there is a p-type layer formed by p-type diffusion.
A V-type iso V-type layer 16 and a p-type well layer 17 are formed. Next, using the Si nitride film 19 partially formed on the Si layer via the pentaSi oxide film 18 as a mask, low-temperature oxidation for element isolation is performed to form an isolation oxide film 20. (Fig. 1) Among these, 〇 indicates the M2S portion, and ■ indicates the bipolar portion.

(2) Remove the nitride film 19 and thin oxide film 18, form a new gate oxide film 21 by thermal oxidation, deposit poly-Si on it, photoresist process this poly-Si film, and form a poly-Si gate in MO8iI. 22 is formed. (Figure 2) (3) In the bipolar part ■, use a resist mask to etch the poly-Si film and oxide film in the collector part,
Perform phosphorus ion implantation to form isolation oxide film 2
A collector n+ type layer 23 is formed by cell 7 alignment using 0 as a mask. This collector formation may be performed before the poly ISi gate 22 is formed. After collector formation, MO
In order to improve the gate breakdown voltage of SFET, the gate is
It is oxidized to about 00A, and an oxide film 24 is formed.

Next, boron ions are implanted using a photoresist process, and a base p-type layer 25 is formed in a self-aligned manner using the isolation carbon oxide film as a mask.

After that, 5i7N was deposited using plasma discharge, etc., and Si and N were deposited on the entire surface to a thickness of about 100%.

(nitride) film 26 is formed. (Figure 3) (4)
To form the source and drain of the n-channel MO8, photoresist is used to remove Si and N on the surface of the n-channel MO8.
, remove the Si, N, and films on the collector section on the bipolar ■ side. Next, arsenic or the like is ion-implanted and annealed to form a contact n+ type layer overlapping the collector portion of the source/drain n+ type layer 27 which is self-lined by a poly-Si gate. (4th
Figure) (5) Using photoresist to form the source and drain of p-channel MO8, Si on the p-channel MO8 side is
, N, the film 26 is removed, and the Si3N4 film at the base portion on the bipolar side is removed. Then, by implanting boron ions and annealing, the source/drain p+ type layer 28 is self-lined with a poly-Si gate.
A contact portion is formed overlapping the base p-type layer. At this time, the 5isN4 film 26 is left only in the emitter part of the bipolar part. After that, the entire surface is coated with a high-pressure low-temperature deposition process.

A film 29 is formed. (Fig. 5) (6) Open a contact window in the emitter section by photoresist processing. At this time, first a hole is made in the S io film 29 by dry etching, then a hole is made in the 5isN film 26 by wet etching, and a hole in the thin base S io and film is made by wet etching.・Open a contact window. After this, deposit BoIJSi30 on the entire surface. This poly-Si
By doping P (phosphorous) at a high concentration, the emitter n+ type layer 31 can be formed by diffusing P into the silicon (base surface) through the contact window hole. (FIG. 6) FIG. 7 is an enlarged cross-sectional view of a bipolar transistor portion in a semiconductor device manufactured according to the above bipolar CMOS process.

In this bipolar transistor, the emitter is made by contacting poly-Si to Si through a window hole opened in a laminated film consisting of thin oxide film/buffer film/Sin film.
The emitter is formed by diffusion into the AsftSi substrate through the poly-Si, and the poly-Si is used as an emitter electrode.

In the figure, 32 is an interlayer insulating film, 33 is a base At electrode and collector λL electrode connected to the base through a hole made in the interlayer insulating film, and 34 is an emitter At electrode.

〔Effect of the invention〕

According to the present invention explained in the examples above, the following effects can be obtained.

(1) In bipolar transistors, by leaving a buffer film on the emitter surface, and by finally performing wet etching when opening the emitter window, the silicon surface inside the emitter window is not attacked. . Therefore, bipolar transistors can be manufactured with good control of hFI without generating crystal defects, and as a result, the yield can be improved.

(2) Selective removal of the buffer film to leave it on the emitter surface can be done by using a resist mask for source/drain formation in the CMOS process.
This can be achieved without any special additional mask process.

(3) In the process of the example, when forming collector and base contact holes for the AL electrode, Sioz
Etching and Si, N, etching must be performed. If S i3 N4 on the collector and base are also removed in the photoresist process in steps (4) and (5), then Sin,
Contact holes can be made by etching alone.

Although the invention made by the present inventor has been specifically described above based on examples, the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof.

[Application field]

The present invention can be applied to bipolar MO8 semiconductor devices in general and bipolar transistors in general.

The present invention is particularly effective when applied to bipolar CMO 8-8 RAM LSI.

[Brief explanation of drawings]

FIGS. 1 to 6 are cross-sectional views of the main steps of a bipolar CMO8 IC process showing an embodiment of the present invention. FIG. 7 is a cross-sectional view of the completed bipolar transistor portion. FIG. 8 is a sectional view showing a part of a conventional bipolar transistor before forming an emitter polysilicon electrode. 15...n-type well, 23...collector, 25...
・P-type base, 26...Buffer Lz9...Sin
, ill, 31...n+ type emitter.

Claims (1)

[Scope of Claims] 1. A semiconductor device comprising a semiconductor substrate and a bipolar transistor formed as an active element on one main surface of the substrate, wherein the emitter of the bipolar transistor is connected to the semiconductor substrate on the surface of the semiconductor substrate. A polycrystalline semiconductor contacts the substrate through a window hole made in a film made of an oxide film and a buffer film, and impurities are diffused through this polycrystalline semiconductor, and this polycrystalline semiconductor serves as an emitter electrode. A semiconductor device characterized by: 2. The semiconductor device according to claim 1, wherein the semiconductor is silicon, and the buffer film is made of silicon nitride. 3. A method for manufacturing a semiconductor device in which a bipolar transistor and a complementary MOSFET are formed on one main surface of a silicon semiconductor substrate, wherein after base diffusion of the bipolar transistor, a buffer film is formed on the surface, and p-channel and n-channel Unnecessary portions of the buffer film are removed using a mask for source/drain diffusion of the channel MOSFET, and a polycrystalline silicon film is then deposited on a portion of the base portion through the window hole of the buffer film. A method of manufacturing a semiconductor device, characterized in that an emitter of the bipolar transistor is formed by diffusing impurities into the silicon substrate through a film.