JPS61264442A - Compiler - Google Patents

Abstract

PURPOSE:To improve the overall efficiency of a compiler by obtaining the maximum busy number and the optimum vector length to set the desirable vector length and therefore avoiding the production of the extremely small vector length. CONSTITUTION:If an intermediate code 7 is given, the maximum number of vector registers vt1-vt4 are occupied temporarily in a process (3). Therefore the maximum busy number is decided as value '3' between processes (1) and (7). When such maximum busy number is kept within value '8', the vector length value less than '1024' can be selected with a device of VP200. Therefore both the initial physical and steady physical vector lengths are obtained with retrieval of a vector length deciding table 18. Thus an optimum intermediate code can be outputted.

Description

[Detailed Description of the Invention] [Summary] In a compiler having an intermediate code optimization section, a vector length setting function section is provided in the intermediate code optimization section,
The vector length setting function section refers to a vector length determination table and determines the vector length so as to prevent an extremely short vector length from occurring within a possible range, thereby improving overall efficiency. be disclosed.

[Industrial application field]

The present invention relates to a compiler, particularly a compiler having an intermediate code optimization section, which has a function of determining a preferred vector length.

(Prior Art) In a compiler that generates an object program from a given source program.

This typically occurs when a source program contains a loop, for example, but at the stage of generating intermediate code, vectorized intermediate code is Optimization is carried out.

Figure 5 shows an example of vector calculation, and in the case of one illustration, vector (aI + aZ +...) and vector (+
) +, bz, ...), if the mask (ml, mz, ...) is on, C1 = ai + bz is calculated, and if it is off, C4 = This indicates that an operation C1 is to be performed.

The vector calculation shown in FIG. 5 is performed by a vector computer having a hardware configuration as shown in FIG. In FIG. 6, 1 is a vector processor, 2
3 represents a main storage device, 3 a memory control device, 4 a channel processor, and 5 a large storage device.

FIG. 7 shows a state in which a given source program 6 is being converted into vectorized intermediate code.

In the illustrated source program 6, the value of ■ is "1"
A (I
) and D (I). In intermediate code 7, the vector length is rl
oOJ (i.e. VLENG-100),
It is expressed that A C*) and D(*) are to be found.

[Problem that the invention seeks to solve]

In the compiler, intermediate code 7 as shown in FIG.
However, there is a limit to the number of vector registers that can be used at the stage of executing the object program. Therefore, the question is how many vector registers should be used to generate the object program.

As the vector length increases, fewer vector registers are likely to be used, which may actually pose a problem in efficiently executing a large number of overall processes. Therefore, in general.

The above vector length is determined by checking the busy number, which will be described later.1 For example, the logical vector length is rl O2
5J, and if we choose the physical vector length for the actual calculation to be, for example, "512.", then the above logical vector length is rl 025J.
When the physical vector length is r512,
There is a possibility that the calculation for J will be performed twice and the calculation for the vector length "1" will be performed once. In such a case, it is inefficient to perform calculations with a vector length of "1", and it is preferable to use vector length r5.
It is desirable to be able to divide the calculation into two operations such as 12J and vector length r513J.

[Means for solving problems]

The present invention solves the above problems, and FIG. 1 shows a block diagram of the principle of the present invention. In the figure, numeral 8 represents a compiler, 9 represents a source program, and 10 represents an object program. Further, 11 is a source interpretation section, 12 is a storage allocation section 113 is a vectorization section, 14 is an intermediate code optimization section which is directly related to the present invention, 15 is a register usage determination section, and 16 is an object - Program output section 17 represents a vector length setting function section.

The vectorization unit 13 outputs an intermediate code that has been vectorized in the manner described with reference to FIG. 7, and the intermediate code optimization unit 14 optimizes the intermediate code.

[Effect]

In the case of the present invention, a vector length setting function section 17 is provided in order to prevent calculations with short vector lengths from being mixed at the end as described above. The functional section 17
calculates the maximum busy number in the manner described below, determines the optimal vector length, sets the preferred vector length, and notifies the process (not shown) in the intermediate code optimization unit. In determining the optimum vector length, a process is performed that refers to a vector length determination table.

〔Example〕

FIG. 2 is an explanatory diagram illustrating how the maximum busy number is determined.

Suppose now that an intermediate code 7 as shown in the leftmost column in FIG. 2 is given, the vector register v
t,,v t2. v t3. The vertical bars in the center of Figure 1 indicate the ranges occupied by each of v t4. In the illustrated case, register vt is occupied during processing from ■ to ■. Further, the register vt= is occupied from processing ① to ②. By examining the state of such occupancy, it is found that among the processes from process ■ to process ■, the maximum number of registers are occupied at one time in case of process ■; The maximum busy number until then is determined as the value "3".

Table 1 shows reference vectors that provide a guideline for selecting the vector length when the maximum busy number n is determined for the data processing device models VPloo and VP200. The long DVL is summarized in a table.

If the maximum busy number determined as described above is within the value "8", the vector length can be selected within r1024J in the VP200 device.

The maximum busy number is determined as described above in Table 1, and the approximate vector length D
Under the condition that VL is determined, the value of the initial physical vector length (initial PVL) and the value of the steady physical vector length (steady PVL) are determined by the process of indexing the vector length determination table 18 as shown in FIG. is required. Based on this, the intermediate code optimization unit 14
An intermediate code optimized with respect to the vector length as shown in FIG. 3 is output.

In FIG. 3, the part 19 is a process that is performed only once using the initial physical vector length obtained above, and the part 2o is a process that is performed only once using the initial physical vector length obtained above. Generally, this is a process that is looped multiple times.

Processing with a given logical vector length (LVL) is divided into the above two processes, namely, initial physical vector length processing 19 and steady physical vector length processing 20 (generally a loop). It becomes a form that is processed in a form. In FIG. 3, VLVL is an instruction for setting the physical vector length, and BCT is a branch instruction.

FIG. 4 shows an embodiment of the vector length determination table. Actually, the table 18 may be considered to be stored on the ROM.

In Figure 4, LVL is the logical vector length, AV
L represents the array vector length, and DVL represents the standard vector length. VL-LOOP indicates how many processes are divided into predetermined physical vector lengths when executing a process with a given logical vector length LVL. represents the number of divisions, and "present" represents that the rotation speed is greater than or equal to the value "2".

"No" means no rotation. Also MOD
(＊＊＊) represents the remainder of the result of counting ``＊＊＊J.

The table 18 shown in FIG. 4 represents the following matters. For example, in column (A) shown in the figure, if neither the logical vector length LVL nor the array vector length AVL is known from the given intermediate code (when the actual processing starts, the LVLO value is determined just before that). ) is given as the initial physical vector length (initial PVL), and the steady physical vector length (stationary P
VL) is given as the value of DVL.

Applying actual numerical examples, the above initial PVL and steady PV
Let's find L.

[Numerical example I]

In the case of device VP200, the maximum busy number is the value "8".
”, and the logical vector length LVL is the value rl 0
Suppose it was 60J.

In this case.

=36 (ii) LVL>DVL (iii) DVL>128 Yes.

-2 (rounded down to the decimal point) = 530 (truncated to the decimal point). It will be again. Therefore, column 1 (B) shown in the figure is applied, and the initial PVL is the value r530J, and the steady PVL
is set to the value r530J.

[Numerical example■]

In the case of device VP200, the maximum busy number is the value "8".
”, and the logical vector length LVL is the value rl 0
Suppose it was 25J. In this case = −+ 1 = 5
13 υ VL'. Therefore, column 1 (B) shown in the figure is applied, and the initial PVL is the value r512J, and the steady PVL
is the value r513.

In addition, in the case of the numerical example 9, if the value r512J of the above standard vector length DVL, which is the same as before, is used as is.

1025=1+512+512 Therefore, the vector length "1" is processed once.

A predetermined process is achieved by processing the vector length r5124 twice, and this includes cases where the vector length is extremely small, resulting in poor efficiency.

〔Effect of the invention〕

As explained above, according to the present invention, the vector length is prevented from becoming extremely small as much as possible, and efficiency is improved compared to the conventional case.

[Brief explanation of drawings]

Fig. 1 is a principle block diagram of the present invention, Fig. 2 is an explanatory diagram illustrating the mode of determining the maximum busy number, Fig. 3 is an example of intermediate code output, and Fig. 4 is an embodiment of a vector length determination table. , FIG. 5 is an explanatory diagram for explaining an example of vector calculation, FIG. 6 is an explanatory diagram for explaining an example of the hardware configuration of a vector computer, and FIG. 7 is an explanatory diagram for explaining a vector length control range. In the figure, 1 is a vector processor, 6 is a source program, 7 is an intermediate code, and 8 is a compiler. Reference numeral 14 represents an intermediate code optimization section, 17 a vector length setting function section, and 18 a vector length determination table. Patent applicant: Fujitsu Ltd. Representative Patent Attorney Mori 1) Hiroshi (1 other person)
wt+ wA Vh Dk Bigai Akira,
Mashima 2 Figure 1. Main force example No. 3 m (0+, Oz, -, Ox) + (b+, bz, -,
bz) (CI) C2t91. t Cj-) [;
(mI l m2+ '” l ”'j-)] vAo
(Vector Aod) [w+th mas
k ] Public training development 5 m

Claims (1)

[Claims] A compiler (8) that generates an intermediate code (7) from a given source program (9), performs optimization, and generates an object program (10), An intermediate code optimization section (14) was provided for performing optimization when obtaining the object program (10) from the intermediate code (7), and the maximum busy number was determined in the intermediate code optimization section (14). A vector length setting function section (17) is provided which determines the optimum vector length and sets the vector length. Divide the vector length into an initial physical vector length and a steady physical vector length, and divide the vector length so that the ratio of the initial physical vector length and the steady physical vector length approaches the value "1" as much as possible. The intermediate code optimization unit (14) is configured to refer to the vector length determination table (18), and the intermediate code optimization unit (14) first executes processing according to the given initial physical vector length, and then performs processing according to the given initial physical vector length. A compiler characterized in that it is configured to output intermediate code that repeats processing according to a physical vector length one or more times.