JPS6126241A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make interelement isolation positive without sacrificing the characteristics by a method wherein an epitaxial layer which affects interelement isolation is composed of an epitaxial layer containing little impurity or having the same conductivity type as that of the substrate and an epitaxial layer having the reverse conductivity tupe to that of the substrate. CONSTITUTION:A P<+> type buried layer 42 is formed in the P type substrate 41. A P type epitaxial layer 43 containing little impurity or having the same conductivity type as that of the substrate is formed on this substrate 41. Successively, an N type epitaxial layer 44 is formed. Next, the substrate 41 is partly etched away according to the pattern. It is desirable that the etching depth here is more than the thickness of the layer 44, but a smaller depth is also sufficient. Thereafter, an oxide film 45 is formed in the etched part. This manner enables interelement isolation securely without sacrificing the transistor characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor integrated circuit in which elements are isolated using an epitaxial layer, such as a bipolar integrated circuit, and in particular, in which elements are isolated by a silicon oxide film. This relates to a manufacturing method.

Conventional Structures and Problems One of the purposes of forming an epitaxial layer is isolation between elements. In the case of bipolar semiconductors, conventional isolation between silicon elements has been achieved using PN junctions, but since high speed cannot be achieved with PN junction capacitance, attempts have been made to isolate elements using silicon oxide films (hereinafter abbreviated as oxide films). ing.

A conventional example will be explained below using figures. Figure 1 shows the improved LO
This is an explanation of the main points of a method for forming an isolation oxide film by the CO3 method (selective oxidation method).

FIG. 1a shows a state in which a P2 buried layer 12 is formed on a P type substrate 11 as a channel stopper. In FIG. 1, an N-type epitaxial layer 1 is formed on a substrate 11.
3 is formed. FIG. 1C shows a state in which a portion of the N5 pittaxial layer 13 has been partially etched according to a pattern. Next, FIG. 1d shows a state in which only the etched portions are oxidized to form an oxide film 15 for isolation between elements.

FIG. 2 shows an example of the impurity profile directly under the oxide film 16 formed in FIG. 1d. The impurity concentration at the interface with the oxide film 15 is dominated by boron used for filling the channel stopper with f, but phosphorus contained in the epitaxial layer is also present. Here, if the difference in concentration between boron and phosphorus becomes small, isolation between elements becomes insufficient. This situation will be explained with reference to the drawings. FIG. 3 shows the relationship between the phosphorus concentration at the oxide film interface and the thickness of the epitaxial layer when the conditions for forming the channel stopper are kept constant. When the epitaxial layer has a thickness of 1.3 μm, it exhibits a good inter-element breakdown voltage, but when it becomes thicker than that, the breakdown voltage drops rapidly.

In order to achieve sufficient isolation between elements, ■ Increase the amount of silicon etching.

■ Increase the P concentration of the channel stopper.

■ Make the epitaxial layer shallower.

However, increasing the amount of silicon etched is not preferable because it increases the difficulty of etching itself and increases the stress during oxidation.

Increasing the P+ concentration is not preferable because it increases the PN junction capacitance in the substrate. Further, if the epitaxial layer is made shallow, the withstand voltage of the transistors and transistors themselves decreases, so it is not possible to make the epitaxial layer shallower.

OBJECTS OF THE INVENTION The present invention has been made in response to the above-mentioned problems, and an object of the present invention is to ensure isolation between elements without deteriorating transistor characteristics (high frequency characteristics, breakdown voltage, etc.).

Structure of the Invention The present invention provides an epitaxial layer that affects isolation between elements, including a first epitaxial layer containing impurities of the same type as the substrate or almost no impurities, and a second epitaxial layer containing impurities of the opposite type to the substrate. Consisting of an epitaxial layer of
After that, an isolation oxide film is formed by etching and oxidation. Figure 3, shown earlier as a conventional example, shows the case where the epitaxial layer concentration is 101.
In the case of an epitaxial layer thickness of 1.8 μm, the oxide film interface concentration is approximately twice that of the epitaxial layer. On the other hand, the concentration of boron rapidly decreases at the interface. This is because boron tends to be incorporated into the oxide film during the oxidation process, but phosphorus tends to remain on the silicon side. Therefore, if the phosphorus concentration in the region to be oxidized is lowered in advance, deterioration of the inter-element breakdown voltage will not occur.

Description of examples An embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 shows the application of the present invention to the modified LOCO3 method. In Figure 4 (2L), (111) P type 5×1o ~
50 to 300 Ω on a part of the 5×10 (7) substrate 41
A state in which the P layer 42 of the /mouth is formed is shown. In Fig. 4(b), 2
A first epitaxial layer 43 having an impurity concentration of 0.1 to 1.0 μm is formed with an impurity concentration of ×10 α or less. Continue N
A second epitaxial layer 44 containing 10 15 to 10 α of phosphorus is formed to a thickness of 0.3 to 1.3 μm. In FIG. 4(C), the epitaxial layer e0.
A state in which 6 to 1.0 μm has been removed is shown. The etching depth here is desirably equal to or greater than the thickness of the second N-type epitaxial layer, but may be less than that. Figure 4 (l
In i), the etched part in (C) is 1.0~2.
A state in which an oxide film 45 with a thickness of 0 μm is formed is shown. Thereafter, semiconductor elements are formed in the epitaxial layer 44 on both sides of this isolation oxide film 46 by a normal process. The result of improving the inter-element breakdown voltage by the method of the present invention is shown in FIG. Even if the epitaxial layer becomes thicker, the breakdown voltage between elements does not decrease.

Needless to say, the present invention is applicable not only to bipolar integrated circuits but also to MO3 integrated circuits.

As described in detail, the present invention allows reliable isolation between elements without sacrificing transistor characteristics.

[Brief explanation of the drawing]

Figures 1 (&) to (d) are conventional device isolation process diagrams;
The figure shows the impurity profile of the isolation part between elements, and Figure 3 shows the impurity concentration at the oxide film interface and the breakdown voltage between elements.
4(a) to 4(d) are diagrams showing an isolation process between elements according to an embodiment of the present invention, and FIG. 6 is a diagram showing the impurity concentration at the oxide film interface and the breakdown voltage between elements. 41...Substrate, 42...P layer, 43...
. . . first epitaxial layer, 44 . . . second epitaxial layer. Name of agent: Patent attorney Toshio Nakao and one other name
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Figure 3: /F camphor concentration at the oxide film interface between elements. Figure (C) (d-) Figure 5 Oxide film
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Claims (1)

[Claims] When manufacturing epitaxially grown semiconductor devices,
forming a first epitaxial layer containing impurities of the same type as the substrate or almost no impurities, and subsequently forming a second epitaxial layer containing impurities of the opposite type as the substrate; etching part or all of the epitaxial layer according to a pattern;
A method of manufacturing a semiconductor device, comprising the step of forming an oxide film on the etched portion.