JPS6126210A - Manufacture of gaas semiconductor device - Google Patents

Manufacture of gaas semiconductor device

Info

Publication number
JPS6126210A
JPS6126210A JP14601084A JP14601084A JPS6126210A JP S6126210 A JPS6126210 A JP S6126210A JP 14601084 A JP14601084 A JP 14601084A JP 14601084 A JP14601084 A JP 14601084A JP S6126210 A JPS6126210 A JP S6126210A
Authority
JP
Japan
Prior art keywords
single crystal
layer
substrate
gaas
gaas single
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14601084A
Other languages
Japanese (ja)
Other versions
JPH0114688B2 (en
Inventor
Toshio Nonaka
野中　敏夫
Nagayasu Yamagishi
山岸　長保
Masahiro Akiyama
秋山　正博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP14601084A priority Critical patent/JPS6126210A/en
Publication of JPS6126210A publication Critical patent/JPS6126210A/en
Publication of JPH0114688B2 publication Critical patent/JPH0114688B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02395—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Abstract

PURPOSE:To grow the second GaAs single crystal substrate by effecting recrystallization of Ge with interposing a fluoride insulating layer of high melting point on a GaAs single crystal substrate. CONSTITUTION:A part of GaAs single crystal substrate 11 on which semiconductor elements 12 are arranged is covered with SiO2 13 and CaF2 20 is vapor- deposited on the substrate to 0.1-0.3mum with a substrate temperaure of 400- 600 deg.C to form a single crystal layer 21 and a polycrystalline layer 32. Subsequently, Ge 30 is vapor-deposited to 1mum with a substrate temperature 400 deg.C to form a single crystal layer 31 and a polycrystalline layer 32. Nextly, the Ge polycrystal 32 is recrystallized with the adjacent Ge single crystal 31 as a seed by a zone melting method. Then, a GaAs single crystal substrate 41 is grown to the necessary thickness by an MOCVD method with about 700 deg.C of the substrate temperature and another semiconductor element 42 is formed in the layer 41. By this constitution, even if the recrystallization is done with such temperature that the GaAs single crystal and Ge polycrystal enter into a reaction completely, a GaAs single crystal is laminated easily by recrystallization of Ge because a Ge thin layer is arranged with interposing a fluoride insulating layer.

Description

【発明の詳細な説明】 （産業上の利用分野） 本発明は、ＧａＡｓ半導体装置の製造方法に関し、特に
複数積層のＧａＡｓ単結晶基体の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a GaAs semiconductor device, and more particularly to a method for forming a multi-layered GaAs single crystal substrate.

（従来の技術） 高集積化の極限的３次元デバイスの１つのタイプとして
、２次元デバイス面上に半導体層を成長させ、更にこ１
層中に２次元デバイスを形成する化する工程が必要とな
る。従来、このような再結晶化技術としてＳｉ　ｆ：対
象とするものの外に、例えばＪａｐａｎｅｓｅ　Ｊｏｕ
ｒｎａｌ　ｏｆ　Ａｐｐｌｉｅｄ　Ｐｈｙｓｉｃｓ　Ｖ
ｏｌ　。(Prior art) As one type of extremely highly integrated three-dimensional device, a semiconductor layer is grown on the two-dimensional device surface, and
A step is required to form two-dimensional devices in the layers. Conventionally, as such recrystallization technology, Si f: In addition to the target, for example, Japanese Jou
rnal of Applied Physics V
ol.

２２　、Ａｌ　Ｏ、１９８３年１０月号第Ｌ６２４〜Ｌ
６２６頁で開示されている如く、Ｇｅの再結晶化技術が
知られている。22, Al O, October 1983 issue L624-L
Ge recrystallization techniques are known, as disclosed on page 626.

（発明が解決しようとする問題点） 本発明は、半導体素子が形成されている第１のＧａＡ　
ｓ単結晶基体上に他の半導体素子を形成する第２のＧａ
Ａｓ単結晶基体を成長させることを目的とし、これをフ
ロライド系絶縁層の適用とＧｅの再結晶化工程の適用と
によって達成しようとするものである。(Problems to be Solved by the Invention) The present invention provides a first GaA
s Second Ga forming another semiconductor element on the single crystal substrate
The purpose is to grow an As single crystal substrate, and this is attempted to be achieved by applying a fluoride-based insulating layer and a Ge recrystallization process.

（問題点を解決するための手段） 本発明では、下層の２次元デバイスに対応するものであ
って、ＧａＡｓ単結晶基体を含むものは、その主面が部
分的には８１０２安定化膜のような非単へ結晶絶縁膜で
被覆されているが、部分的に単結晶面が露出した状態と
して準備する。次いで、例えば真空蒸着法のような適宜
の方法で、ＣａＦ２やＳ　ｒ　Ｆ２される。(Means for Solving the Problems) In the present invention, the device corresponding to the lower layer two-dimensional device, which includes a GaAs single crystal substrate, has a main surface partially similar to the 8102 stabilizing film. Although it is covered with a non-single crystal insulating film, it is prepared with the single crystal plane partially exposed. Next, CaF2 or S r F2 is formed using an appropriate method such as a vacuum evaporation method.

次に、このＧｅ多結晶層部分を、例えば帯溶融法によグ
て再結晶化することによってＧｅ層を全て単結晶層とし
、その後、その層上に、有機金属化学気相成長法（ＭＯ
ＣＶＤ　）もしくは分子線エピタキシ成長法によって、
ＧａＡｓ単結晶基体を成長させる。Next, the entire Ge layer is made into a single crystal layer by recrystallizing the Ge polycrystalline layer portion by, for example, a zone melting method, and then, on that layer, metal organic chemical vapor deposition (MO) is applied.
CVD) or molecular beam epitaxy,
A GaAs single crystal substrate is grown.

（作用） 本発明のように、Ｇｅ単結晶層を媒介してＧａＡｓ単結
晶基体を形成しようとする場合、例えばＳ　ｉ０２膜上
のＧｅ層は多結晶となるので、それと隣接した単結晶を
種（シード）として再結晶化する必要がある。フロラ−
イド系絶縁層を第１のＧａＡｓ単結晶基体との間に介在
させることによって、前記Ｇｅ多結晶層にはＧｅ単結晶
が隣接しておシ、これを種としてＧｅ多結晶の再結晶化
が行なわれる。詳′言するに、Ｇｅ多結晶層を例えば帯
溶融法などによって単結晶化する場合、その帯ヒータ温
度を多結晶Ｇｅの融点９４０℃以上にする必要があシ、
この温度は第１のＧａＡｓ単結晶基体とＧｅ単結晶層と
が完全に反応する温度であって結晶性が失なわれる温度
である。(Function) When attempting to form a GaAs single crystal substrate through a Ge single crystal layer as in the present invention, for example, the Ge layer on the Si02 film becomes polycrystalline, so the adjacent single crystal is used as a seed. It is necessary to recrystallize it as a seed. Flora
By interposing the ion-based insulating layer with the first GaAs single crystal substrate, the Ge polycrystal layer is adjacent to the Ge single crystal, and recrystallization of the Ge polycrystal is performed using this as a seed. It is done. Specifically, when a Ge polycrystalline layer is single-crystalized by, for example, a zone melting method, the temperature of the zone heater needs to be higher than the melting point of polycrystalline Ge, 940°C.
This temperature is the temperature at which the first GaAs single crystal substrate and the Ge single crystal layer completely react and the crystallinity is lost.

基体の結晶性をＧｅ層の一部に引き継ぎ、全体のＧｅ層
の単結晶化を可能とする。また、フロライド系絶縁層は
１０１３〜１ｏ１４Ω・（７）程度の絶縁性を有し、第
１と第２のＧａＡｓ単結晶基体間の絶縁層の役目を果す
。又、フロライド系絶縁多結晶上を含むＧｅ単結晶上に
、例えばＭＯＣＶＤ法によｆ）　ＧａＡｓ単結晶を成長
させる場合、基板温度はＧｅの融点よシ低い７００℃以
下で十分可能であるため、Ｇｅ単結晶層への影響を考え
た特別の成長法は必要でない。The crystallinity of the substrate is carried over to a part of the Ge layer, making it possible to make the entire Ge layer into a single crystal. Further, the fluoride-based insulating layer has an insulating property of about 1013 to 1014 Ω·(7), and serves as an insulating layer between the first and second GaAs single crystal substrates. Furthermore, when growing a GaAs single crystal on a Ge single crystal including a fluoride-based insulating polycrystal by, for example, the MOCVD method, it is possible to grow the substrate temperature at 700° C. or lower, which is lower than the melting point of Ge. There is no need for a special growth method that takes into consideration the effect on the Ge single crystal layer.

さらに、第２のＧａＡｓ単結晶基体にＧａＡｓ　ＭＥＳ
ＦＥＴを形成する場合、耐熱性の電極を用いる点に留意
しさえすれば、８ｏｏ℃程度までの熱処理には十分耐え
るので、素子形成の制約を拡大することができる。Furthermore, GaAs MES is applied to the second GaAs single crystal substrate.
When forming an FET, as long as attention is paid to the use of heat-resistant electrodes, the FET can sufficiently withstand heat treatment up to about 80° C., so the restrictions on device formation can be expanded.

（実施例） 図は本発明の詳細な説明するためのＱａＡｓ半導体装置
の断面図がある。(Example) The figure is a sectional view of a QaAs semiconductor device for explaining the present invention in detail.

図を参照するに、１１はＧａＡｓ単結晶基体であル、そ
の中に半導体素子１２が形成されており、一部は安定化
膜であるＳ　ｉＯ２膜１３で被覆されているか一部は・
単結晶面が露出したものを、まず準備する。Referring to the figure, reference numeral 11 denotes a GaAs single crystal substrate in which a semiconductor element 12 is formed, part of which is covered with an SiO2 film 13 which is a stabilizing film, or part of which is covered with a SiO2 film 13 which is a stabilizing film.
First, prepare a single crystal with an exposed surface.

次にこの上に、基板温度４ｏｏ℃〜６ｏｏ℃でｃａＦ２
を真空蒸着して０．１μｍ　−０，３μｍ程度の層２ｏ
を形成する。その場合、単結晶露出面１の層２ノはで１
μｍ程度のＧｅ層３ｏを形成する。Next, on top of this, caF2 was added at a substrate temperature of 4oooC to 6oooC.
A layer of about 0.1 μm - 0.3 μm is formed by vacuum evaporation.
form. In that case, the layer 2 on the single crystal exposed surface 1 is 1
A Ge layer 3o of approximately μm thickness is formed.

この場合も、下層の結晶性は引き継がれ、フロライド系
絶縁単結晶層２１上の層３１は固相成長″によシ単結晶
になるが、フロライド系絶縁多結晶層２２上の層３２は
多結晶となる） 次に帯溶融法にょシ、Ｇｅ多結晶層３１を、その隣接の
Ｇｅ単結晶層３２を種として再結晶化し、全てのＧｅ層
３ｏを単結晶層とする。In this case, the crystallinity of the lower layer is inherited, and the layer 31 on the fluoride-based insulating single-crystal layer 21 becomes a single crystal by solid-phase growth, but the layer 32 on the fluoride-based insulating polycrystalline layer 22 becomes a polycrystalline layer 31. Then, using the zone melting method, the Ge polycrystalline layer 31 is recrystallized using the adjacent Ge single-crystal layer 32 as a seed, and all the Ge layers 3o are made into a single-crystal layer.

次にＭＯＣＶＤ法にょシ、基板温度７００℃程度でＧａ
Ａｓ単結晶基体４１を必要厚さ成長させる。その後、そ
の層４１中に別の半導体素子４２を形成する。Next, using the MOCVD method, Ga
An As single crystal substrate 41 is grown to a required thickness. Thereafter, another semiconductor element 42 is formed in that layer 41.

（発明の効果） 本発明によれば、フロライド系絶縁層を介在させて薄い
Ｇｅ層を形成しているため、Ｇｅの再結晶化技術を利用
して簡単にＧａＡｓ単結晶基体を形成できる利点がある
。(Effects of the Invention) According to the present invention, since a thin Ge layer is formed with a fluoride insulating layer interposed therebetween, there is an advantage that a GaAs single crystal substrate can be easily formed using Ge recrystallization technology. be.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一実施例を説明するために示したＧａＡ　
ｓ半導体装置の断面図である。The figure shows GaA shown to explain one embodiment of the present invention.
s A cross-sectional view of a semiconductor device.

Claims (1)

【特許請求の範囲】[Claims] 半導体素子が形成されているＧａＡｓ単結晶基体を含む
ものであって主面が部分的に非単結晶絶縁膜で被覆され
且つ部分的にＧａＡｓ単結晶面が露出しているものを用
意する工程と、全面にフロライド系絶縁物質を積層して
前記露出面上にはフロライド系絶縁単結晶層を形成し且
つ前記非結晶絶縁膜上にはフロライド系絶縁多結晶層を
形成する工程と、Ｇｅを全面に積層して前記フロライド
系絶縁単結晶層上にはＧｅ単結晶層を形成し且つ前記フ
ロライド系絶縁多結晶層にはＧｅ多結晶層を形成する工
程と当該Ｇｅ多結晶層に隣接する単結晶を種として当該
Ｇｅ多結晶層を再結晶化する工程と、次いで有機金属化
学気相成長法もしくは分子線エピタキシ成長法によって
ＧａＡｓ単結晶を成長させて単記Ｇｅ層上に第２のＧａ
Ａｓ単結晶基体を形成する工程とを備えていることを特
徴としたＧａＡｓ半導体装置の製造方法。a step of preparing a GaAs single crystal substrate on which a semiconductor element is formed, the main surface of which is partially covered with a non-single crystal insulating film, and a GaAs single crystal surface is partially exposed; , stacking a fluoride-based insulating material on the entire surface, forming a fluoride-based insulating single crystal layer on the exposed surface, and forming a fluoride-based insulating polycrystalline layer on the amorphous insulating film; forming a Ge single crystal layer on the fluoride insulating single crystal layer and forming a Ge polycrystalline layer on the fluoride insulating polycrystalline layer; A step of recrystallizing the Ge polycrystalline layer using as a seed, and then growing a GaAs single crystal by organometallic chemical vapor deposition or molecular beam epitaxy to form a second Ga layer on the single Ge layer.
1. A method for manufacturing a GaAs semiconductor device, comprising the step of forming an As single crystal substrate.
JP14601084A 1984-07-16 1984-07-16 Manufacture of gaas semiconductor device Granted JPS6126210A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14601084A JPS6126210A (en) 1984-07-16 1984-07-16 Manufacture of gaas semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14601084A JPS6126210A (en) 1984-07-16 1984-07-16 Manufacture of gaas semiconductor device

Publications (2)

Publication Number Publication Date
JPS6126210A true JPS6126210A (en) 1986-02-05
JPH0114688B2 JPH0114688B2 (en) 1989-03-14

Family

ID=15398049

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14601084A Granted JPS6126210A (en) 1984-07-16 1984-07-16 Manufacture of gaas semiconductor device

Country Status (1)

Country Link
JP (1) JPS6126210A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0759616A (en) * 1993-08-26 1995-03-07 Kyushu Hitachi Maxell Ltd Hair drier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0759616A (en) * 1993-08-26 1995-03-07 Kyushu Hitachi Maxell Ltd Hair drier

Also Published As

Publication number Publication date
JPH0114688B2 (en) 1989-03-14

Similar Documents

Publication Publication Date Title
JPS6012724A (en) Growing method of compound semiconductor
JPH10163114A (en) Semiconductor device and manufacturing method thereof
JP2743377B2 (en) Semiconductor thin film manufacturing method
JPS6126216A (en) Method for growing compound semiconductor
JPS6126210A (en) Manufacture of gaas semiconductor device
JPS6119116A (en) Manufacture of semiconductor device
JPS603148A (en) Substrate for single crystal silicon semiconductor device and manufacture thereof
JPH04298020A (en) Manufacture of silicon thin film crystal
JPS6126211A (en) Crystal growth of semiconductor
JPS58184720A (en) Manufacture of semiconductor film
JP2737152B2 (en) SOI forming method
JPS6379953A (en) Production of thin single crystal film
JP2532252B2 (en) Method for manufacturing SOI substrate
JPH03286520A (en) Manufacture of thin crystalline semiconductor film
JPS6091622A (en) Manufacture of semiconductor substrate
JPH0354819A (en) Manufacture of soi substrate
JPS6248014A (en) Solid phase growth of semiconductor layer
JPS6219046B2 (en)
JPH03240945A (en) Formation of thin metallic film
JPS6341210B2 (en)
JPS61206215A (en) Semiconductor single crystal structure
JPS6126598A (en) Preparation of germanium thin film crystal
JPH0746683B2 (en) Method for manufacturing semiconductor device
JPS5816522A (en) Manufacture of semiconductor device
JPS61197492A (en) Method of forming semiconductor crystal

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term