JPS61253824A - 半導体素子の組立方法 - Google Patents

半導体素子の組立方法

Info

Publication number
JPS61253824A
JPS61253824A JP60095203A JP9520385A JPS61253824A JP S61253824 A JPS61253824 A JP S61253824A JP 60095203 A JP60095203 A JP 60095203A JP 9520385 A JP9520385 A JP 9520385A JP S61253824 A JPS61253824 A JP S61253824A
Authority
JP
Japan
Prior art keywords
bonding
wire
ball
electrode pad
reducing gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60095203A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0462456B2 (enrdf_load_stackoverflow
Inventor
Mitsuo Kobayashi
三男 小林
Osamu Usuda
修 薄田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60095203A priority Critical patent/JPS61253824A/ja
Publication of JPS61253824A publication Critical patent/JPS61253824A/ja
Publication of JPH0462456B2 publication Critical patent/JPH0462456B2/ja
Granted legal-status Critical Current

Links

Classifications

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    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP60095203A 1985-05-02 1985-05-02 半導体素子の組立方法 Granted JPS61253824A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60095203A JPS61253824A (ja) 1985-05-02 1985-05-02 半導体素子の組立方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60095203A JPS61253824A (ja) 1985-05-02 1985-05-02 半導体素子の組立方法

Publications (2)

Publication Number Publication Date
JPS61253824A true JPS61253824A (ja) 1986-11-11
JPH0462456B2 JPH0462456B2 (enrdf_load_stackoverflow) 1992-10-06

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JP60095203A Granted JPS61253824A (ja) 1985-05-02 1985-05-02 半導体素子の組立方法

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013058020A1 (ja) * 2011-10-18 2013-04-25 富士電機株式会社 半導体装置および半導体装置製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55123198A (en) * 1979-03-16 1980-09-22 Tokyo Shibaura Electric Co Method of forming ball of aluminum wire end
JPS5713747A (en) * 1980-06-27 1982-01-23 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS59150434A (ja) * 1983-02-07 1984-08-28 Toshiba Corp 半導体装置の製造方法及び半導体製造装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55123198A (en) * 1979-03-16 1980-09-22 Tokyo Shibaura Electric Co Method of forming ball of aluminum wire end
JPS5713747A (en) * 1980-06-27 1982-01-23 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS59150434A (ja) * 1983-02-07 1984-08-28 Toshiba Corp 半導体装置の製造方法及び半導体製造装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013058020A1 (ja) * 2011-10-18 2013-04-25 富士電機株式会社 半導体装置および半導体装置製造方法

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