JPS61252654A - Resin sealed type semiconductor device - Google Patents
Resin sealed type semiconductor deviceInfo
- Publication number
- JPS61252654A JPS61252654A JP9370885A JP9370885A JPS61252654A JP S61252654 A JPS61252654 A JP S61252654A JP 9370885 A JP9370885 A JP 9370885A JP 9370885 A JP9370885 A JP 9370885A JP S61252654 A JPS61252654 A JP S61252654A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- thin metal
- parts
- center
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、各種亨子機器に使用される樹脂封止型半導体
装置に関し、さらに詳述すれば、チップ表面の電極部と
リードフレームの間を金属細線により接続した構造を有
する樹脂封止型半導体装置に関するものである。Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a resin-sealed semiconductor device used in various types of electronic equipment, and more specifically, the present invention relates to a resin-sealed semiconductor device used in various types of electronic equipment. The present invention relates to a resin-sealed semiconductor device having a structure connected by thin metal wires.
(従来の技術)
従来の樹脂封止型半導体装置について、第1図により説
明する。同図において、従来の樹脂封止型半導体装置は
、チップ搭載部1の上に接着されたチップ2の表面に形
成された複数箇所の電極部3と、リード4の内部端子部
4aとを金属細線5で電気的に接続し、これが封止樹脂
(図示せず)で固定されている。(Prior Art) A conventional resin-sealed semiconductor device will be explained with reference to FIG. In the figure, the conventional resin-sealed semiconductor device has electrode parts 3 formed at a plurality of locations on the surface of a chip 2 bonded on a chip mounting part 1, and internal terminal parts 4a of leads 4 made of metal. Electrical connection is made with a thin wire 5, and this is fixed with a sealing resin (not shown).
チップ2の電極部3は、四角形のチップの各辺から等距
離の位置に配置されていた。The electrode portions 3 of the chip 2 were arranged at equal distances from each side of the square chip.
(発明が解決しようとする問題点)
このような構造では、電極部3と内部端子部4aを接続
する金属細線5は湾曲した状態で接着されているため、
チップ2の上下2辺の中央に近い電極部3では、それぞ
れ接続される内部端子部4aとの距離が短かいため、金
属細線5の湾曲度が大きくなり、封止樹脂を成形する際
に、樹脂流れによって大きい荷重が掛り、金属細線5が
切断するという問題点があった。(Problems to be Solved by the Invention) In such a structure, since the thin metal wire 5 connecting the electrode part 3 and the internal terminal part 4a is bonded in a curved state,
In the electrode part 3 near the center of the upper and lower sides of the chip 2, the distance to the internal terminal part 4a to which it is connected is short, so the degree of curvature of the thin metal wire 5 becomes large, and when molding the sealing resin, There was a problem in that a large load was applied due to the flow of the resin, causing the thin metal wire 5 to break.
本発明は上記の問題点を解決するもので、樹脂封止の工
程で、金属細線5の切断が起らない樹脂封止型半導体装
置を提供しようとするものである。The present invention solves the above-mentioned problems, and aims to provide a resin-sealed semiconductor device in which the thin metal wires 5 are not cut during the resin-sealing process.
(問題点を解決するための手段)
上記の問題点を解決するために、本発明は、チツブの上
下2辺の中央に近い電極部を、各辺よりチップの中心寄
りに配置するものである。(Means for Solving the Problems) In order to solve the above problems, the present invention arranges the electrode portions closer to the center of the two upper and lower sides of the chip closer to the center of the chip than each side. .
(作 用)
このように構成することにより、電極部と内部端子部と
の距離を従来の構造より長くすることにより、金属細線
の湾曲度を減少させ、樹脂封止時に金属細線に掛る荷重
を減少するものである。(Function) With this configuration, the distance between the electrode part and the internal terminal part is made longer than in the conventional structure, thereby reducing the degree of curvature of the thin metal wire and reducing the load applied to the thin metal wire during resin sealing. It is something that decreases.
(実施例)
本発明の実施例を第1図により説明する。同図において
1本発明による樹脂封止型半導体装置は。(Example) An example of the present invention will be described with reference to FIG. In the figure, a resin-sealed semiconductor device according to the present invention is shown.
チップ搭載部1の上に接着されたチップ2の表面に、上
下2辺に配置された電極部3をチップ中心に近くに寄せ
て配設し、これらの電極部3とり−ド4の内部端子部4
aとを金属細線5で電気的に接続し、さらに封止樹脂(
図示せず)によって固定したものである。On the surface of the chip 2 glued onto the chip mounting part 1, electrode parts 3 arranged on the upper and lower sides are arranged close to the center of the chip, and the internal terminals of the leads 4 of these electrode parts 3 are arranged. Part 4
A is electrically connected with a thin metal wire 5, and then a sealing resin (
(not shown).
上下2辺の中央近くの電極部3も、これと金属細線5で
接続される内部端子部4aとの距離が増えて湾曲度が減
少し、これに掛る荷重が減り金属細線5の切断事故が皆
無となり、信頼性が大幅に向上した。The distance between the electrode part 3 near the center of the two upper and lower sides and the internal terminal part 4a connected by the thin metal wire 5 is increased, and the degree of curvature is reduced, and the load applied to the electrode part 3 is reduced, reducing the risk of cutting the thin metal wire 5. There were no problems, and reliability was greatly improved.
なお、本実施例では、上下2辺の中央の電極部3を最も
大きくチップ中心に寄せであるが、この構造に限定され
るものでなく、場合に応じチップの辺の中央に近く配置
された電極部ほどチップ中心に近く寄せた構造にすれば
よい。In this embodiment, the electrode portion 3 at the center of the two upper and lower sides is placed closest to the center of the chip; however, the structure is not limited to this, and the electrode portion 3 may be placed closer to the center of the side of the chip depending on the case. The structure may be such that the electrode portion is closer to the center of the chip.
(発明の効果)
以上説明したように、チップの辺の中央近くの電極部を
チップ中心に寄せで配設することにより、金属細線の切
断事故の発生しない、信頼性のある樹脂封止型半導体装
置が得られる。(Effects of the Invention) As explained above, by arranging the electrode portion near the center of the side of the chip closer to the center of the chip, a reliable resin-sealed semiconductor that does not cause cutting accidents of thin metal wires can be achieved. A device is obtained.
第1図および第2図はそれぞれ本発明の実施例および従
来例を示す樹脂封止型半導体装置の要部平面図である。
1 ・・・チップ搭載部、 2・・・チップ、 3 ・
・・電極部、 4 ・・・ リード、4a・・・内部端
子部、5・・・金属細線。
第1図
第2図FIGS. 1 and 2 are plan views of main parts of resin-sealed semiconductor devices showing an embodiment of the present invention and a conventional example, respectively. 1...Chip mounting part, 2...Chip, 3.
...Electrode part, 4...Lead, 4a...Internal terminal part, 5...Metal thin wire. Figure 1 Figure 2
Claims (1)
で電気的に接続してなる樹脂封止型半導体装置において
、チップの辺中央に近い電極部ほどチップ中心に寄せて
配設したことを特徴とする樹脂封止型半導体装置。In a resin-sealed semiconductor device in which the electrodes on the surface of the chip and the internal terminals of the leads are electrically connected by thin metal wires, the electrodes are placed closer to the center of the chip as they are closer to the center of the sides of the chip. Characteristics of resin-sealed semiconductor devices.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9370885A JPS61252654A (en) | 1985-05-02 | 1985-05-02 | Resin sealed type semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9370885A JPS61252654A (en) | 1985-05-02 | 1985-05-02 | Resin sealed type semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61252654A true JPS61252654A (en) | 1986-11-10 |
Family
ID=14089910
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9370885A Pending JPS61252654A (en) | 1985-05-02 | 1985-05-02 | Resin sealed type semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61252654A (en) |
-
1985
- 1985-05-02 JP JP9370885A patent/JPS61252654A/en active Pending
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