JPS6125173B2 - - Google Patents
Info
- Publication number
 - JPS6125173B2 JPS6125173B2 JP55170834A JP17083480A JPS6125173B2 JP S6125173 B2 JPS6125173 B2 JP S6125173B2 JP 55170834 A JP55170834 A JP 55170834A JP 17083480 A JP17083480 A JP 17083480A JP S6125173 B2 JPS6125173 B2 JP S6125173B2
 - Authority
 - JP
 - Japan
 - Prior art keywords
 - flip
 - diagnostic
 - register
 - flop
 - package
 - Prior art date
 - Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
 - Expired
 
Links
Classifications
- 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F11/00—Error detection; Error correction; Monitoring
 - G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
 
 
Landscapes
- Engineering & Computer Science (AREA)
 - General Engineering & Computer Science (AREA)
 - Theoretical Computer Science (AREA)
 - Computer Hardware Design (AREA)
 - Quality & Reliability (AREA)
 - Physics & Mathematics (AREA)
 - General Physics & Mathematics (AREA)
 - Tests Of Electronic Circuits (AREA)
 - Test And Diagnosis Of Digital Computers (AREA)
 
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP55170834A JPS5794857A (en) | 1980-12-05 | 1980-12-05 | Logic device | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP55170834A JPS5794857A (en) | 1980-12-05 | 1980-12-05 | Logic device | 
Publications (2)
| Publication Number | Publication Date | 
|---|---|
| JPS5794857A JPS5794857A (en) | 1982-06-12 | 
| JPS6125173B2 true JPS6125173B2 (en:Method) | 1986-06-14 | 
Family
ID=15912190
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| JP55170834A Granted JPS5794857A (en) | 1980-12-05 | 1980-12-05 | Logic device | 
Country Status (1)
| Country | Link | 
|---|---|
| JP (1) | JPS5794857A (en:Method) | 
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPH0766030B2 (ja) * | 1983-07-08 | 1995-07-19 | 株式会社日立製作所 | 論理パッケージの診断方法 | 
| US6304987B1 (en) | 1995-06-07 | 2001-10-16 | Texas Instruments Incorporated | Integrated test circuit | 
| JP3005250B2 (ja) | 1989-06-30 | 2000-01-31 | テキサス インスツルメンツ インコーポレイテツド | バスモニター集積回路 | 
| JPH0368038A (ja) * | 1989-08-08 | 1991-03-25 | Nec Eng Ltd | 情報処理装置 | 
| JP2738112B2 (ja) * | 1990-02-22 | 1998-04-08 | 日本電気株式会社 | 情報処理装置の障害情報採取方式 | 
| JPH08226953A (ja) * | 1993-04-05 | 1996-09-03 | Hitachi Ltd | 論理パッケージ診断方式 | 
| US6408413B1 (en) | 1998-02-18 | 2002-06-18 | Texas Instruments Incorporated | Hierarchical access of test access ports in embedded core integrated circuits | 
| US6405335B1 (en) | 1998-02-25 | 2002-06-11 | Texas Instruments Incorporated | Position independent testing of circuits | 
| US7058862B2 (en) | 2000-05-26 | 2006-06-06 | Texas Instruments Incorporated | Selecting different 1149.1 TAP domains from update-IR state | 
| US6728915B2 (en) | 2000-01-10 | 2004-04-27 | Texas Instruments Incorporated | IC with shared scan cells selectively connected in scan path | 
| US6769080B2 (en) | 2000-03-09 | 2004-07-27 | Texas Instruments Incorporated | Scan circuit low power adapter with counter | 
- 
        1980
        
- 1980-12-05 JP JP55170834A patent/JPS5794857A/ja active Granted
 
 
Also Published As
| Publication number | Publication date | 
|---|---|
| JPS5794857A (en) | 1982-06-12 | 
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