JPS61239664A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a device having the high degree of integration and the large peak inverse voltage of a base-collector junction by isolating and forming an impurity diffusion region in a self-alignment manner to a thick oxide film and adjusting and determining a space between both the impurity diffusion region and the oxide film by impurity diffusion length to the inside from the end section of a poly Si film. CONSTITUTION:SiO2 2, Si3N4 3, non-added poly Si 4 and Si3N4 5 are laminated on an Si substrate 1, and the layers 5-3 are removed selectively. The surface is coated with Si3N4 6, and left only on the side surfaces of the layers 5-3 through RIE. An insulating isolation film 7 in required thickness and a biting section 8 are shaped through oxidation. Only Si3N4 6 is removed by utilizing the difference of film thickness. B is diffused in length longer than length up to the biting section 8 from the end section of exposed poly Si 4. Si3N4 5 is eliminated, and non-added poly Si 4 is taken away selectively through wet type etching. Ions are implanted by an Si3N4 mask 3, and a base layer 10 is formed in a self-alignment manner to the insulating isolation film 7. According to the constitution, the base layer and the insulating isolation layer are separated only by a distance of the minimum possible of a demand, thus preventing the lowering of the withstanding voltage value of a base-collector junction, then also obviating the deterioration of the degree of integration.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a bipolar integrated circuit device that is highly integrated and has a high reverse breakdown voltage of a pace-collector junction. be.

[Conventional technology]

Conventionally, in bipolar integrated circuit devices, in order to improve the degree of integration of devices, the transistor space region is formed in contact with the sidewalls of a thick isolation oxide film, or is isolated from the base region at the expense of the degree of integration. The regions are separated from each other. In either case, a photoresist process for forming an insulating isolation oxide film and a photoresist process for forming a paste region are required.

[Problem that the invention seeks to solve]

Among the conventional base region formation methods described above, the method of forming the base region in contact with the sidewall of a thick insulating isolation oxide film limits the characteristics of the collector-paste junction, and particularly reduces the reverse breakdown voltage value of the junction. There is a drawback.

Furthermore, the method of simply forming the base region and the insulating isolation region apart from each other is undesirable in terms of the degree of integration because the distance between the two is increased more than necessary because of the necessity of ensuring a margin for positioning accuracy.

[Means for Solving the Problems] The method for manufacturing a semiconductor device of the present invention includes: - forming a silicon dioxide film, a first silicon nitride film, a polycrystalline silicon film and a second silicon film on the entire surface of a conductive type semiconductor substrate; a step of sequentially depositing a silicon nitride film and etching and removing the second silicon nitride film, the polycrystalline silicon film, and the first silicon nitride film in a predetermined region; The first silicon nitride film, polycrystalline silicon a step of leaving the silicon nitride film on the end side of the second silicon nitride film, a step of performing oxidation using the first, second and third silicon nitride films as masks to form a thick oxide film, and a step of forming a thick oxide film on the third nitride film. etching away the silicon film and diffusing impurities into the polycrystalline silicon film to a predetermined distance from the exposed end side surface of the polycrystalline silicon film; and impurities in the second silicon nitride film and the polycrystalline silicon film. a step of sequentially etching away the undiffused portion and the first silicon nitride film immediately below it, and a step of forming an impurity region of opposite conductivity type by ion implantation using the polycrystalline silicon film into which the impurity has been diffused as a mask. It consists of:

〔Example〕

Next, the present invention will be explained with reference to the drawings.

1 to 4 are vertical sectional views in the order of steps of an embodiment of the present invention.

First, a silicon dioxide film 2 with a thickness of 500X is formed on a silicon substrate 1, followed by a first silicon nitride film 3 with a thickness of 100X, a non-doped polycrystalline silicon film 4 with a thickness of 4000A, and a film with a thickness of 100X. Second silicon nitride film 5
are sequentially deposited and formed. Subsequently, the second silicon nitride layer 5, the non-doped polycrystalline silicon film 4, and the first silicon nitride layer in the region where the insulating isolation oxide film is to be formed are removed using a photoetching method (FIG. 1). □ Next, after forming a third silicon nitride film 6 with a thickness of 300X on the entire surface, only the third silicon nitride film on the flat part is removed using reactive ion etching, and the first silicon nitride film 3 is removed. The third silicon nitride film 6 is left only on the side surfaces of the end portions of the non-doped polycrystalline silicon film 4 and the third silicon nitride film 5. Continuing to accomplish. At this time, an encroaching portion 8 of the oxide film is formed under the first silicon nitride film. Furthermore, since the non-doped polycrystalline silicon film 4 is covered with a silicon nitride film, it is not oxidized at all (FIG. 2).

Next, by utilizing the difference in film thickness between the second silicon nitride film and the third silicon nitride film, etching necessary to remove the 300A thick silicon nitride film 6 is performed, and the third silicon nitride film is removed. Only film 6 is removed. Subsequently, boron (B) is injected into the interior from the exposed end of the non-doped polycrystalline silicon film 4.
to spread. Here, it is desirable that the diffusion distance of boron from the end of the non-doped polycrystalline silicon into the interior is longer than the part 8 where the insulating isolation oxide film bites (third
figure).

Further, the second silicon nitride film 5 is removed, and then the polycrystalline silicon film 4 is selectively removed by wet etching, which takes advantage of the selectivity due to the difference in boron content in the polycrystalline silicon. Then, the first silicon nitride film 3 underneath is removed. Subsequently, ions are implanted using the polycrystalline silicon film 9 containing boron and the silicon nitride film 3 thereunder as a mask to form a base region 10 in self-alignment with the isolation oxide film (FIG. 4).

In this manner, according to the method of the present invention, the base region can be formed in a self-aligned manner with respect to the isolation region.
By separating the two by the minimum necessary distance, it is possible to prevent the breakdown voltage value of the base-collector junction from decreasing.

〔Effect of the invention〕

As explained above, in the present invention, the impurity diffusion region can be formed so as to be self-aligned and separated from the thick oxide film. Further, the distance between the two is determined by the diffusion distance of boron from the edge of the polycrystalline silicon film into the interior of the polycrystalline silicon film, and can be adjusted. Therefore, a good junction breakdown voltage value between the semiconductor substrate and the impurity diffusion region can be achieved. Further, compared to a method in which a thick oxide film is formed in contact with an impurity diffusion region, the degree of integration is not significantly lowered.

[Brief explanation of the drawing]

1 to 4 are vertical cross-sectional views in order of steps for explaining the main steps of an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Silicon substrate, 2... Silicon dioxide film, 3... First silicon nitride film, 4...
...Non-doped polycrystalline silicon film, 5...
・Second silicon nitride film, 6... Third silicon nitride film, 7... Insulating isolation oxide film, Death...
- Biting portion of insulating isolation oxide film, 9... polycrystalline silicon film containing boron, 10... base region. −He婉special℃ TOMINA ★

Claims (1)

[Claims] A silicon dioxide film, a first silicon nitride film, a polycrystalline silicon film, and a second silicon nitride film are sequentially deposited on one main surface of a semiconductor substrate of one conductivity type, and the second silicon nitride film is formed in a predetermined region. , a step of etching and removing the polycrystalline silicon film and the first silicon nitride film, and a step of depositing a third silicon nitride film thinner than the second silicon nitride film over the entire surface; removing the third silicon nitride film by an anisotropic etching method to leave it on the end side surfaces of the first silicon nitride film, the polycrystalline silicon film, and the second silicon nitride film; and a step of performing oxidation using the second and third silicon nitride films as masks to form a thick oxide film, and removing the third silicon nitride film by etching and removing a predetermined portion from the side surface of the exposed end of the polycrystalline silicon film. a step of diffusing impurities into the polycrystalline silicon film to a distance of and forming an opposite conductivity type impurity region by ion implantation using the polycrystalline silicon film into which the impurity is diffused as a mask, the opposite conductivity type impurity region and the thick oxide film are self-aligned by a predetermined distance. A method of manufacturing a semiconductor device, characterized in that the semiconductor device is formed separately.