JPS61235962A - Address converting system in virtual machine system - Google Patents

Abstract

PURPOSE:To improve the processing efficiency by providing a means defining the length of an effective address and a means changing dynamically the length of address to a virtual address so as to make the length of the effective address of the virtual address equal to the length of the real address thereby preventing generation of a nonuse memory access in advance. CONSTITUTION:In changing the address mode from the virtual address mode to the real address mode, the address is changed into a virtual address space 12 by loading a data beta defining the virtual address space for real address mode to the virtual space definition register, the length of the effective virtual address is set equal to the length of the real address to generate an effective address space 12-1, then the control is returned to the program of a virtual machine 9. In changing the real address mode into the virtual address mode, the address is changed into the virtual address space 11, the length of the effective virtual address is set so that all the virtual address spaces are usable, and after the effective address space 11-1 is generated, the control is returned to a program of the virtual machine 9.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a virtual computer system for an electronic computer, and in particular, to a virtual computer system for an electronic computer, in particular a program that is running in a real address mode on a real computer (hereinafter referred to as a real computer). This invention relates to an address translation method when operating a virtual machine in virtual address mode.

[Conventional technology]

When running a program that was running in real address mode on a real computer on a virtual computer system.

In a virtual computer system, in order to create multiple virtual computers with the same architecture as the real computer in one real computer, if a program that runs in real address mode on the real computer is run in real address mode on the virtual machine,
Control is required to simultaneously run multiple programs that operate in real address mode. As a result, it is necessary to allocate only one real address mode space (hereinafter referred to as real address space) as the address space of a real computer to one virtual computer, and the virtual computer system This required replacing the entire real address space corresponding to the virtual machine, resulting in a large overhead.

Normally, a virtual machine operates in a virtual address mode in which the address space can be switched simply by changing the contents of a register that defines the virtual address space (hereinafter referred to as virtual space definition register).

In the virtual computer system realized as above,
If the length of the virtual address is longer than the length of the real address because a program that runs in real address mode on a real computer runs in virtual address mode, the upper bits of the address that are not valid as an address on a real computer are may access unexpected memory.

Therefore, when a virtual computer system causes a program that operates in real address mode on a real computer to operate in virtual address mode, the address space is not valid. An unexpected memory access that occurs when the upper bit is not O will cause an interrupt to the real computer. And, taking advantage of that interruption.

By simulating the instruction that caused the interrupt in the same way as if the virtual machine system accessed memory in real address mode, program operation is guaranteed.

[Problem that the invention seeks to solve]

However, in the conventional method described above, when a program running in real address mode on a real computer is run in virtual address mode on a virtual computer system, the difference between the length of the virtual address and the length of the real address occurs. Unexpected access to memory has been avoided by simulating instructions triggered by computer interrupt notifications, but simulating instructions increases the load on the computer and reduces the performance of the virtual computer system. The disadvantage was that it significantly degraded the

[Means for solving the problem] The address conversion method according to the present invention is useful when operating a virtual computer system using a computer system in which the length of the virtual address is longer than the length of the real address. When a program that runs in real address mode on a computer is run in virtual address mode of a virtual machine, the upper part of the address becomes valid because it would be invalid in real address mode due to the difference in the length of the address. Based on the means for detecting an instruction when executing a memory access using an invalid address and the means for storing the instruction, a virtual machine is provided with a means for guaranteeing normal memory access operation by canceling the instruction immediately after the detection. In the computer system, means for defining a valid address length for the virtual address and means for dynamically changing the address length are provided.

It is characterized in that the length of the effective address of the virtual address is equal to the length of the real address.

[Embodiments of the invention]

Next, two embodiments of the address conversion system according to the present invention will be described in detail with reference to one drawing.

Figure 1 (a), (b), and Figure 2 (,),
(b) is a block diagram showing the configurations of the first and second embodiments of the present invention, respectively. In the figure, 1,
8 is a virtual computer system that exists in an actual computer.

2.3.9 is a virtual computer, and 5.10 is a control table for a virtual machine existing in the virtual computer system, including address mode information (M, D), data defining virtual space (x, y, α, β), etc. are stored. 6 and 7 are virtual address spaces corresponding to each virtual machine 2 and 3, 6-1
．． 7-1 is the effective address space of each virtual machine. 11 and 12 are virtual address spaces when the virtual machine 9 operates in the real address mode and the virtual address mode. 11-1, 12-1 are each valid address spaces. In addition, M and D used as display symbols in these embodiments indicate address modes as control data of the virtual machine, 2M is virtual address mode, and D is real address mode. Also, x, y, α
, β indicates data that defines the virtual space, by setting this data in the virtual space definition register.

You can change the virtual address space of a virtual machine.

First, in the embodiment shown in FIG.
The virtual machines 2 and 3 that exist are controlled by a virtual machine control table 5. this house.

The virtual computer 2 uses the data X that defines the virtual space in the control table 5 to create the virtual address space 6.
It works. M is in virtual address mode, and all of its virtual address space can be used as a valid address space 6-1. The virtual computer 3 operates in the virtual address space 7 by using y as data defining the virtual space in the control table data. D is in real address mode, and part of its space can be used as a valid address space 7-1.

Now, when the virtual machine 2 is running the program, when trying to run the program in the virtual machine 3 in response to a request from the virtual machine system, the control table data y is input to the virtual space definition register. By loading, the virtual address space 7 is switched. In this case, since the virtual machine 3 is instructed to operate according to the real address mode whose address mode of the control table data is D,
As with virtual machine 2, using the entire virtual address space will result in unnecessary accesses to the address space, so set the length of the effective virtual address to the same length as the real address to prevent unnecessary accesses to the address space. After it is deleted, control is transferred to the program of the virtual machine 3. In addition, when the program of virtual machine 3 is running and the program of virtual machine 2 is to be operated at the request of the virtual machine system, the virtual address is When switching to space 7, the program running on virtual machine 3 must be in real address mode.

Since the size of the effective address space is different from the virtual address mode of virtual machine 2, set the length of the effective virtual address so that the entire virtual address space can be used,
Control is transferred to the program of virtual machine 2.

In addition, in the above, we have explained the case where there is only one virtual machine each in the virtual machine system, such as virtual machines 2 and 3, which operate in different address modes, but if there are multiple other virtual machines with the same address. Control transfer between virtual machines with the same address mode is achieved by changing only the virtual space definition register and leaving the length of the effective virtual address unchanged or setting it to the same value, even if two virtual machines exist. . Other than that, the operation is exactly the same.

Next, in the embodiment shown in Figure 1, the virtual machine always operates in the same address mode, whereas the address mode information in the control table of the virtual machine is determined by instructions from the program on the virtual machine. An example of dynamic change will be described with reference to the embodiment of FIG. In FIG. 2, in a virtual computer 9 existing in a virtual computer system 8.

When M is designated as the server address mode information by the table 10 that controls the virtual machine, the virtual machine operates in the virtual address space 11 by using α as the data that defines the virtual address space. Since it is virtual address mode, the address space 11-1 is all valid.
It can be used as When D is specified in the address mode information, β is used as data that defines the virtual address space, thereby operating in the virtual address space 12. In this case, since this is the space when operating in real address mode, part of that space is valid address space 12.
-1.

Now, when the virtual machine 9 is operating in the virtual address mode, the program on the virtual machine 9 changes the address mode information M in the control table 10 to D, that is, the address mode changes from virtual address mode to real address mode. When an instruction to change mode is executed, the virtual machine system

By loading data β that defines the virtual address space for real address mode into the virtual space definition register,
After creating a valid address space 12-1 by changing the address to the virtual address space 12 and setting the length of the valid virtual address to be the same as the length of the real address, the virtual computer 9
・Also, when the address mode information in the control table 10 is changed from D to M, that is, when an instruction to change the address mode from real address mode to virtual address mode is executed, the virtual computer system By loading α into the virtual space definition register,
Change the address to virtual address space 11, and set the length of the effective virtual address so that the entire virtual address space can be used.

After creating a valid address space 5 11-1, control is returned to the program of the virtual machine 9.

In the embodiment shown in FIG. 2, only one virtual computer 9 exists in the virtual computer system 8, but by combining the control transfer between virtual computers in the embodiment shown in FIG. It is also possible to configure a virtual computer system in which there are a plurality of virtual computers that operate by dynamically changing address modes.

FIG. 3 is a block diagram showing the configuration of a circuit that defines the effective address length applied to the first and second embodiments. In this figure, 20 is a register that holds the fetched instruction, 21 and 22 are addresses,
This is a register section in which data etc. are stored, and which register is used depends on the instruction. Reference numeral 23 denotes an adder for generating an address by combining the register specified by the instruction and the address data in the instruction.

24 is a bit pattern generator that generates a specific pit pattern or turn in response to an instruction to set an effective address length. This beep) /? For example, if an effective address length of 2 bits is specified, the turn generator 24 will be set to 2.
When an effective address length of 5 bits is specified, binary data of "0...011111" is generated. 25 is a logical data arithmetic unit.

Now, an instruction to be executed is given to the instruction register 20, the instruction involves memory access, and register data selected from the register sections 21 and 22 according to the instructions of the instruction and address data in the instruction are used. A and P addresses are created by the address generation adder 23. At this time, depending on the instruction, not all of the register data in the register section 22.23 and the address data in the instruction are used as input to the address generation adder 23. On the other hand, when receiving an instruction to change the effective address length, the pitno 4 p -y generator 24 generates a nolean corresponding to the effective address length of the program of the virtual machine that has been running before. The output of the address generation adder 23 and the output of the bit pattern generator 24 are fed to a logical operator 25, and by performing a logical product of the two, the invalid part of the address is cleared, and only the valid address length part is removed. It operates to leave the data of.

In addition, when operating an electronic computer as a real computer, Pitno J? The specific data generated by the turn generator 24 is binary data of all "1"s, and is controlled so that all addresses of the address generation adder 23 are treated as valid.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, in a virtual machine system, even when a virtual machine operates in real address mode, the length of the virtual address is made equal to the length of the real address, and By dynamically changing the length.

The occurrence of unnecessary memory accesses can be prevented in advance, and the effect of improving processing efficiency and performance is significant.

[Brief explanation of drawings]

FIGS. 1 and 2 are block diagrams showing the configurations of first and second embodiments of the present invention, respectively. FIG. 3 is a block diagram of a circuit that defines a valid address length for a virtual address applied to the embodiments of FIGS. 1 and 2. FIG. In the figure, 1 and 8 are virtual computer systems existing in the real computer, 2 and 3.9 are virtual computers, 5゜10 is a control table of the virtual computer, 6.7, 11゜12 is the virtual address space of the virtual computer, 6 -1゜7-1.11-1.12
-1 is the effective address space of the virtual machine, and 20 is a register that holds instructions. 21 and 22 are register sections, 23 is an adder for generating addresses, 24 is a pit/main turn generator that dynamically generates specific binary data, and 25 is a logical arithmetic unit. Figure 1 <a> (b) Figure 2 (a) (b) Virtual address space Virtual address space Figure 3

Claims (1)

[Claims] 1. When operating a virtual computer system using a computer system where the length of the virtual address is longer than the length of the real address, a program that runs in real address mode on the real computer must be run in the virtual address mode of the virtual machine. means for detecting an instruction at the time of memory access execution using an address that is invalid because a part of the upper part of the address that would be invalid in the real address mode becomes valid due to the difference in the length of the address when the address is accessed; In a virtual computer system, the virtual machine system includes means for simulating an instruction immediately after detection to guarantee normal memory access operation based on the means for storing the virtual address; and means for dynamically changing the length of the address to make the length of the effective address of the virtual address equal to the length of the real address.