JPS6220034A - Program status word switching control system - Google Patents

Abstract

PURPOSE:To attain a system as a RAM by storing a program status word (PSW) of a virtual computer and modifying data in a RAM and reading out them to operate OR by microprogram control and sending this OR result to a register of each part as an effective PSW. CONSTITUTION:The current PSW generated for each virtual computer is stored in a storage device 20, and modifying data prepared by a high pervisor is stored in a storage device. When the high pervisor executes a specific PSW load instruction for execution of the virtual computer, a microprogram control part 24 which controls execution of this instruction reads out the current PSW and modifying data in prescribed addresses of storage devices 10 and 21 and receives the OR result through an OR gate 22 and a selecting circuit 23, and this result is distributed to the register in each part through a load line 25 as the effective PSW.

Description

[Detailed Description of the Invention] [Summary] This is a program state word (PSW) switching control method in a processing device of a computer system. In particular, when a virtual machine is executed, the PSW of the virtual machine is controlled so that the effective PSW is modified by information set by a hypervisor program or the like that manages the virtual machine. In that case, by separating the generation of the effective PSW from the control to set the word in a register and enable it, the time constraints from generation to setting can be relaxed.
A configuration in which the PSW and modification data are held in a so-called RAM storage device becomes possible, and the economical efficiency of the processing device can be improved.

[Industrial application field]

The present invention relates to a program state word (hereinafter referred to as PSW) switching control method in a computer system, particularly in a processing unit that executes a virtual machine. well known.

When running a virtual machine, a hypervisor, which is a management program, generally manages the execution of multiple virtual machines. For example, the hypervisor sets a predetermined psw and transfers control to one of the virtual machines. Execution of the virtual machine is started, and control is performed by the hypervisor by issuing an instruction from the virtual machine to the hypervisor to execute a privileged instruction or the like.

[Problems to be solved by conventional technology and invention] PSW
As is well known, the control information includes various control modes of the program to be executed, interrupt masks, storage access keys, instruction addresses, etc., and constitutes control information for defining the execution environment of the program.

For example, FIG. 2 shows an example of a 64-bit PSWO consisting of two words, the first word 1 and the second word 2, and the bits in each part 1 and 2 are control units with general functions as shown in the table. It's a bit.

A table PSW is generated for each program and stored, for example, in the main memory, and when control is passed to a certain program, the PSW for that program (this is the current PSW
) is loaded into a predetermined register of the processing device, the execution environment of the program is set.

During execution of a virtual machine, the psW of the virtual machine is generated by a management program executed on the virtual machine.
If it is enabled as the current psw that controls the computer, and the execution environment is changed, changes to interrupt masks, address translation, and other controls will affect the entire system.
This may cause inconvenience.

Therefore, the hypervisor intervenes and validates the logical sum of the information exemplified as modification data 3 in FIG. 2 and the required focus of the current PSW as the effective PSW. Here, the bit controlled is, for example, R
ST, 10. EX, M and P bits (corresponding bits of the modification data are indicated by X in the figure).

For this purpose, as shown in FIG. 3, the contents of the register 10 of the current PSW and the register 11 of the modification data are ORed at the gate 12, and the selection circuit 13 outputs the OR output in the case of a virtual machine, or In other cases, the contents of the register 10 are selected and set as the effective PSW 14.

In order to control the selection circuit 13, a register 15 indicating the virtual machine operating state is separately set.

Note that the effective psw is conceptually one control word, but as mentioned above, it consists of a large number of control bits with different functions, and as a result, each bit is placed near its associated control part. It will be distributed across multiple integrated circuit registers.

In recent years, a system has been considered in which registers are stored as much as possible in a storage device consisting of a so-called random access memory (RAM), and necessary registers are read out when necessary and used for control. By utilizing RAM in the configuration of logic circuits in this manner, registers can be easily integrated at a higher density, resulting in economicalization of the device.

However, regarding the control of the PSW shown in FIG. 3, it is necessary to perform logic on the PSW read from the storage device and the modification data before distributing it to each part, so the path from reading the storage device is long and constant. Therefore, there was a problem in that it was difficult to apply the RAM resist method.

Measures to solve problem C] FIG. 1 is a block diagram showing the configuration of the present invention.

In the figure, 20 and 21 are storage devices consisting of RAM for registers, 22 is an OR gate, 23 is a selection circuit, and 24
is a microprogram control section.

[For production]

The storage device 20 stores a small amount of current psw generated for each virtual machine, and the storage device 21 stores modification data provided by four hypervisors.

When the hypervisor executes, for example, a specific psw load instruction for execution of a virtual machine, the microprogram control unit 24 that controls the execution of the instruction first
The current PSW and modification data are read from predetermined addresses 0 and 21, and the OR result is received through the OR gate 22 and the selection circuit 23.

Next, this result is distributed to the registers of each part via the load line 25 as an effective PSW.

With the above configuration, it becomes possible to convert the current psw register of the virtual machine into RAM and store it in the storage device.

〔Example〕

In FIG. 1, the effective PSW 14 and register 15 have the same functions as in FIG. 3.

The storage device 20 stores at least the current psw generated for each virtual machine, and the storage device 21 stores modification data prepared by the hypervisor.

When a normal PSW load instruction (for example, an LPSW instruction) is executed, the microprogram control unit 24 transfers specified load data to the effective PS via the load line 26.
It is loaded into W14 and stored at a predetermined address in storage device 20.

For example, when an LPSW instruction is fetched in a virtual machine, its execution is interrupted and control is passed to the hypervisor.

After the hypervisor performs necessary management processing and the like, it simulates the LPSW instruction of the virtual machine and executes, for example, a specific psw load instruction in order to return control to the virtual machine.

In executing this specific PSW load instruction, the microprogram control unit 24 first reads the current PSW and modification data from predetermined addresses in the storage devices 20 and 21, and passes through the OR gate 22 and the selection circuit 23 to OR the result. I will take it.

Next, this result is distributed to the registers of each part via the load line 25 as an effective PSW.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, in a processing device that executes a virtual machine, registers such as the current PSW can be converted into RAM, making it easy to increase the sophistication of the integration of the processing device. It has a remarkable industrial effect of improving economy, reliability, etc.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the configuration of an embodiment of the present invention, Fig. 2 is a ps
FIG. 3 is a block diagram of a conventional configuration example. In the figure, 1 is the first word of psw, 2 is the second word of psw, 3 is modification data, 10.11.15 is a register, 12.2
2 is an OR gate, 13.23 is a selection circuit, 14 is an execution psw, 20.21 is a storage device, and 24 is a microprogram control unit. Configuration example block diagram Figure 3

Claims (1)

[Claims] In a processing device of a computer system, a storage device (20, 21) for holding a current program state word and modification data, a means (14) for holding an effective program state word, and a storage device (20, 21) for holding an effective program state word. ), and a mechanism (22, 23) that configures an effective program state word by reading out the current program state word and the modification data from the current program state word and performing a predetermined modification on the current program state word using the modification data; and a mechanism (24, 25) for setting the configured effective program state word in the register.
) A program state word switching control method characterized by having the following.