JPS6123329A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6123329A JPS6123329A JP59144690A JP14469084A JPS6123329A JP S6123329 A JPS6123329 A JP S6123329A JP 59144690 A JP59144690 A JP 59144690A JP 14469084 A JP14469084 A JP 14469084A JP S6123329 A JPS6123329 A JP S6123329A
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- ball
- capillary
- gold
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13144—Gold [Au] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明はフリップ７０．プ技術、スパイダーボンデング
技術、フィルムキャリヤー技術或いは’Ｉ’ＡＢ技術等
による半導体装置組立に用いられるパンダ付半導体装置
テ、グのバンプ形成技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention provides a flip 70. The present invention relates to a bump forming technique for a semiconductor device with a panda, which is used for assembling a semiconductor device by a bonding technique, a spider bonding technique, a film carrier technique, an 'I'AB technique, or the like.
（従来の技術）
フリップチップ技術、スパイダーボンデング技術、フィ
ルムキャリヤー技術或はＴＡＢ技術は従来のワイヤーボ
ンデング技術に代る革新的な半導体装置組立技術として
注目を浴びて来たが、現在の所、いずれの技術も広く採
用されるには至っていない。その最も大きな原因は、使
用される半導体装置テ、グのボンデングパット上に金、
アルミニウムまたは銅等の金属バンクを作る必要がある
点にある。バンプ形成技術は多層金属薄膜形成技術、メ
ッキ技術及び写真蝕刻技術を組み合せた複雑な工程と高
度の技術水準と専用の製造設備を必要とする。(Prior art) Flip chip technology, spider bonding technology, film carrier technology, or TAB technology has been attracting attention as an innovative semiconductor device assembly technology to replace the conventional wire bonding technology, but at present. However, neither technology has been widely adopted. The biggest reason for this is the amount of gold on the bonding pads of the semiconductor devices used.
The point is that it is necessary to make a metal bank, such as aluminum or copper. Bump formation technology requires a complex process that combines multilayer metal thin film formation technology, plating technology, and photo-etching technology, a high level of technology, and specialized manufacturing equipment.
従って、この技術の実施に当っては多額の設備投資を必
要とし、且つ、テッグ単価が割り高になるという欠点が
あり、結果的に前記技術の普□及を妨げる仁とになって
いた。Therefore, implementation of this technology requires a large amount of capital investment, and the unit price of the technology is relatively high, which ultimately hinders the spread of the technology.
こ、れに代る技術として通常のボールボンデング技術に
よりバングを形成しようという考冬がある。As an alternative technique to this, there is consideration of forming the bang using a conventional ball bonding technique.
この舅法を第１図によって工程順に説明すると先ず（８
１図に於不、ボンデング線、の先端にトーチまたは電気
放電によりボールを形成し、 （Ｉ））図でボンデング
キャピラリーによシボール部をボンデングパット部に圧
着し、次でｔｃ）図でキャピラリーとボンデング線を同
時に引き上げる事によりボール部の直上でボンデング線
を切断し、ボール部をボンデングパット部に残し、この
ボールをバングとして使用しようとするもので今る。To explain this method in the order of steps using Figure 1, first (8
In Figure 1, a ball is formed at the tip of the bonding wire using a torch or electric discharge, and the ball part is crimped onto the bonding pad part using the bonding capillary as shown in Figure (I)), and then the ball part is crimped to the bonding pad part as shown in Figure tc). The current method is to cut the bonding wire directly above the ball by pulling up the capillary and the bonding wire at the same time, leaving the ball on the bonding pad and using this ball as a bang.
（発明が解決しようとする問題点）”−この技術の欠点
はボンデング線がボールのすぐ上では第２図に示すよう
にキャピラリーの内径で決る太さになっており、単に引
き上げただけではボンデング線はボールのすぐ上では切
れない。従って、ボールの上には必ずボンデング線の切
れ残りが存在し、且つその長さが一定しないという点に
ある。このボンデング線の切れ侠りは、作業効率を低下
ζせるだけではなく、半導体装置組立後に’Ｈ絡等の不
具合を発生する原因になる。(Problem to be solved by the invention) - The disadvantage of this technique is that the bonding line just above the ball has a thickness determined by the inner diameter of the capillary, as shown in Figure 2, and if it is simply pulled up, the bonding line will not work. The wire cannot be cut directly above the ball. Therefore, there is always some unbroken bonding wire above the ball, and its length is not constant. Not only does this cause a decrease in ζ, but it also causes problems such as 'H' circuits after the semiconductor device is assembled.
本発明の目的は前記従来の方法によるボンデング線の取
り残しを無くし安定した形状のバンクを形成し、安価で
信頼度の高い、バンプ付半導体装置チ、プを供給しよう
とするものである。An object of the present invention is to eliminate the bonding wires left behind by the conventional method, form a bank with a stable shape, and provide a semiconductor device chip with bumps that is inexpensive and highly reliable.
（問題点を解決するための手段）
本発明によれば、全極細線を溶融してボール状にした部
分を素子の電極パッドに押し付け、一旦引き上げた後再
度ボール部に押し付けてその後金属細線を切断し、ボー
ル部のみのパンクを電極パッド上に形成するバンプ付半
導体装置の製造方法を得る。(Means for Solving the Problems) According to the present invention, the ball-shaped part made by melting all the ultra-fine wires is pressed against the electrode pad of the element, once pulled up, and then pressed against the ball part again. A method for manufacturing a semiconductor device with bumps is obtained by cutting and forming a puncture only at the ball portion on an electrode pad.
（実施例） 次に、本発明の実施例を図面により説明する。(Example) Next, embodiments of the present invention will be described with reference to the drawings.
第３図（ａ）に於て１は硝子、金属またはセラミック製
のボンデング用キャピラリーを、２けボンデング用金線
を、３は金線２の先端にトーチ又は電気放電によって作
られた金ポール部を、４は牛導体装瞳テップの全面を桟
って被着された保護用絶縁被膜を、５は配線用金属薄膜
を、６は保護用絶縁被膜４に開孔さぜる翅・によって作
られたボンデングパッド部を、７は半導体基板を示す。In Fig. 3(a), 1 is a capillary for bonding made of glass, metal, or ceramic, 2 is a gold wire for bonding, and 3 is a gold pole part made at the tip of the gold wire 2 by a torch or electric discharge. , 4 is a protective insulating film coated over the entire surface of the cow conductor pupil tip, 5 is a metal thin film for wiring, and 6 is a wing made by opening holes in the protective insulating film 4. 7 shows a semiconductor substrate.
次に第３図ｆｂ）に於て、キャピラリー１を押し下け、
金ボール３をボンデングパット部６に圧接し、熱千着を
行った゛伏態を示す。 ９
次に、第３図ｆｃ）・に示すよう罠１、ボンデングパッ
ト部り−”１．を若干上に゛持ち上げ更に第３図（ｄ）
Ｋ示すように、・僅かに横にずらし、その後第３図（ｅ
）に示すようにン再１度キヤ、ピラリ・−１を下方に押
し下げ金線２の金ボール部３のすぐ上の部分にくびれ部
を生じさせる。 、 次で
第３・図（ｆ）に示すよう、に、キャピラリー１と金：
線２゛を゛同□時に引合上けられる′。このとき金線、
２けへ′第３図（ｅ）の工程で生じたくびれ部から切断
０、以下−半導体装置テ、プの゛ボンデングパッド数。Next, in Fig. 3 fb), push down the capillary 1,
The figure shows a lying state in which a gold ball 3 is pressed against a bonding pad part 6 and heat bonded. 9 Next, as shown in Fig. 3 (fc), raise the trap 1 and the bonding pad part 1 slightly upward and further as shown in Fig. 3 (d).
・Slightly shift it to the side as shown in Figure 3 (e).
) As shown in FIG. 1, push the pillar 1 downward once again to create a constriction in the part of the gold wire 2 just above the gold ball part 3. , as shown in Figure 3(f), with capillary 1 and gold:
Line 2 can be drawn up at the same time. At this time, the gold wire
2. The number of bonding pads in the semiconductor device is 0.
だけこの操作を繰返すことにより、金バンプ付半導体装
置・チ、ブが容易に製造・できる０ ′ 、・′、
零発゛明０実施、例・ｆ明らかなように、金線は・必ず
くびれ部・か°ら一切断す、る為、゛従来の方法では避
ける事ができなかったボンデング線の切断”残シは全く
発生しない。By repeating this operation, semiconductor devices with gold bumps can be easily manufactured.
As is clear, the gold wire must be completely cut from the waist, so there is no residual cutting of the bonding wire, which could not be avoided with conventional methods. No shi occurs at all.
従って本発明の技術によって製造された半導体装置は組
立後短絡等の不具合を生ずる恐れは全くない。Therefore, the semiconductor device manufactured by the technique of the present invention has no fear of causing problems such as short circuits after assembly.
壕だ、本発明による技術には、特殊な設備、加工技術を
全く必要とせず、単に従来のワイヤーボングーのプログ
ラムまたは機構を一部変更する事により、容易に実施す
ることができる０′（発明の効果）−
従って、°本発明によれば、新たな設備投資や技術開発
を行うことなぐ、安価で信頼度の高い共ング付半導体装
置テ、ノを嫂い準備肋間で供給を可能にするものである
。However, the technology according to the present invention does not require any special equipment or processing technology, and can be easily implemented by simply partially changing the program or mechanism of a conventional wire bong. Therefore, according to the present invention, it is possible to supply an inexpensive and highly reliable semiconductor device with a common coupling without making any new equipment investment or technological development. It is something.
、゛パ, ゛pa
第１図＋ａ）、 （ｂ）および（Ｃ）は従来の方法を工
程順に示した断面図である。 ゛
第２図は従来の方法によるボール形状の拡大断面図であ
る。 ′ 。
第３図（ａ’１． （ｂ）’、 （ｃｌ、 （ｄ）、
（ｅ）および（ｆ）は本発明の一実施例による技術を工
程順に示した断面図である。
１・・・・・・ボンデングキャピラリー、２・・・・・
・ボンデング細線、３・・・・・・ボール部、４・・・
・・絶縁被膜、５・・・・・・金属薄膜配線％６・・・
・・・ボンデングパッド部、７・・・・・・半導体基板
。
（ａＪ （桑）（の
（ｅ）
第３ 図
（ｆ＞1+a), (b) and (C) are cross-sectional views showing the conventional method in the order of steps. 2 is an enlarged sectional view of a ball-shaped ball formed by a conventional method. ′. Figure 3 (a'1. (b)', (cl, (d),
(e) and (f) are cross-sectional views showing a technique according to an embodiment of the present invention in the order of steps. 1...Bonden capillary, 2...
・Bonden thin wire, 3...Ball part, 4...
...Insulating film, 5...Metal thin film wiring%6...
. . . Bonding pad portion, 7 . . . Semiconductor substrate. (aJ (mulberry) (of
(e) Figure 3 (f>
Claims (1)
溶融してボール状にしたものを圧着後キャピラリーを僅
かにづらした後再圧着を行い、ボンデング線のボール部
の直上部にくびれ部を生じさせ、その後にボンデングキ
ャピラリーとボンデング線を同時に引き上げる事により
、ボンデング線をくびれ部で切断し、ボンデングパット
上にボール部のみを残存させる事を特徴とする半導体装
置製造法。After crimping the tip of a fine metal wire into a ball shape by melting it to the bonding pad of a semiconductor device, the capillary is slightly shifted and crimping is performed again to create a constriction just above the ball of the bonding wire. A semiconductor device manufacturing method characterized in that the bonding capillary and the bonding wire are then pulled up at the same time to cut the bonding wire at the constriction, leaving only the ball portion on the bonding pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59144690A JPS6123329A (en) | 1984-07-12 | 1984-07-12 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59144690A JPS6123329A (en) | 1984-07-12 | 1984-07-12 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6123329A true JPS6123329A (en) | 1986-01-31 |
Family
ID=15367994
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59144690A Pending JPS6123329A (en) | 1984-07-12 | 1984-07-12 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6123329A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4754900A (en) * | 1986-03-12 | 1988-07-05 | Microelectronics And Computer Technology Corporation | Method of and apparatus for dispensing a controlled amount of a liquid metal |
| JPH03503554A (en) * | 1988-09-14 | 1991-08-08 | ベロイト・コーポレイション | Intermediate vacuum roll for dryer |
| US5124277A (en) * | 1990-01-10 | 1992-06-23 | Mitsubishi Denki Kabushiki Kaisha | Method of ball bonding to non-wire bonded electrodes of semiconductor devices |
| WO1997012394A1 (en) * | 1995-09-26 | 1997-04-03 | Siemens Aktiengesellschaft | Method of electrically connecting a semiconductor chip to at least one contact surface |
| CN103409654A (en) * | 2012-09-12 | 2013-11-27 | 田中电子工业株式会社 | Silver-gold-palladium alloy bump manufacture line |
| CN103811449A (en) * | 2012-11-07 | 2014-05-21 | 乐金股份有限公司 | Solder ball bump structure and method for forming the same |
-
1984
- 1984-07-12 JP JP59144690A patent/JPS6123329A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4754900A (en) * | 1986-03-12 | 1988-07-05 | Microelectronics And Computer Technology Corporation | Method of and apparatus for dispensing a controlled amount of a liquid metal |
| JPH03503554A (en) * | 1988-09-14 | 1991-08-08 | ベロイト・コーポレイション | Intermediate vacuum roll for dryer |
| US5124277A (en) * | 1990-01-10 | 1992-06-23 | Mitsubishi Denki Kabushiki Kaisha | Method of ball bonding to non-wire bonded electrodes of semiconductor devices |
| WO1997012394A1 (en) * | 1995-09-26 | 1997-04-03 | Siemens Aktiengesellschaft | Method of electrically connecting a semiconductor chip to at least one contact surface |
| CN103409654A (en) * | 2012-09-12 | 2013-11-27 | 田中电子工业株式会社 | Silver-gold-palladium alloy bump manufacture line |
| CN103409654B (en) * | 2012-09-12 | 2015-06-24 | 田中电子工业株式会社 | Silver-gold-palladium alloy bump manufacture line |
| CN103811449A (en) * | 2012-11-07 | 2014-05-21 | 乐金股份有限公司 | Solder ball bump structure and method for forming the same |
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