JPS61225838A - Forming method for electrode wirings - Google Patents

Abstract

PURPOSE:To eliminate an increase in the contacting resistance of a semiconductor region by containing an impurity of the same type as the region in electrode wirings, thereby preventing the impurity amount of the contacting boundary with the region from reducing. CONSTITUTION:An impurity of the same type as that (e.g., arsenic) contained in a semiconductor region is implanted or diffused in a high melting point metal or metal silicide 3 connected with the region. Then, even if it is annealed at 1,000 deg.C or higher, the contacting resistance is not increased.

Description

[Detailed Description of the Invention] [Summary] Formation of an electrode wiring in which an impurity of the same type as a contacting semiconductor region is implanted or diffused into a refractory metal or a refractory metal silicide used as an electrode wiring of a semiconductor device. It's a method.

[Industrial Field of Application] The present invention relates to a method of forming a connection electrode wiring among methods of manufacturing a semiconductor device.

In a semiconductor device such as an IC, semiconductor elements and other circuit elements are formed on a semiconductor substrate, and a large number of electrode wirings leading out from these areas are provided on the upper surface.

Aluminum films or aluminum alloy films have traditionally been used for these electrode wirings, but the problem is that aluminum has a low melting point, making ICs highly integrated.

When high-density multilayer wiring is formed, there is a drawback that it imposes restrictions on the formation of interlayer insulating films and the like.

Therefore, a conductive polycrystalline silicon film has come to be used as an alternative wiring material, but this has the disadvantage of low electrical conductivity. Therefore, recently, a method of using a high melting point metal or a high melting point metal silicide for electrode wiring has been used. MoSix)
A typical wiring material is a silicide film such as

However, when connecting these wiring materials to a semiconductor region, sufficient consideration must be given to the increase in contact resistance.

[Prior Art] FIG. 3 shows an example of conventional electrode wiring, and is a cross-sectional view of an n-channel MO3 semiconductor element.

In the figure, 1 is a p-type silicon substrate, 2 is an n-type source or drain region, 3 is an electrode wiring made of tungsten, 4 is a gate electrode, 5 is a gate insulating film, and 6 is a field insulating film, and this semiconductor element When incorporated into an IC, phosphorus silicate glass (PSG) is further added to the top surface.
) film is coated and a second wiring layer is provided thereon,
Multilayer wiring is formed. Although these are not shown, in the case of an IC, FIG. 3 can be said to be a sectional view in the middle of the process.

However, in order to form the structure as shown in FIG. 3, first the field insulating film 6 is formed, then the gate insulating film 5 and the gate electrode 4 are formed, and then arsenic ions are implanted and heat treated. An n-type source or drain region 2 is defined. Thereafter, tungsten is deposited by sputtering and patterned to form the electrode wiring 3.

This is a well-known formation method, but as in this example, in the method of manufacturing a semiconductor device, the electrode wiring is formed after the element is formed.

[Problems to be Solved by the Invention] However, there is always the problem of increased contact resistance in the connection between the electrode wiring and the semiconductor region, and even with aluminum electrode wiring, measures have not been taken to reduce the contact resistance. There is. An increase in contact resistance has also been observed in the above-mentioned electrode wiring made of high melting point metal or high melting point metal silicide, and it has been found that the increase in contact resistance due to the connection between the n-type region and the electrode wiring is particularly remarkable.

When the cause of this was investigated using the above-mentioned n-channel MO3 semiconductor device, the result was that it was caused by annealing (heat treatment) after forming the electrode wiring. Figure 4 shows the annealing temperature (
"c) and resistance (Ωd). As shown, the contact resistance increases due to annealing, and especially in the case of an n-type region containing arsenic, the contact resistance increases significantly. In the figure, The curve ■ shows the change in contact resistance with the n-type region containing arsenic, and the curve ■ shows the change in the contact resistance with the n-type region containing boron.The contact resistance of the n-type region containing arsenic is It is shown that the resistance of 10-2 Ωcj increases to the order of 10-5 Ωd after annealing at 1000°C.

However, this annealing step after forming the electrode wiring cannot be avoided. For example, after covering the PSG film, the PSG film is once melted (melted) so that the second wiring layer is formed smoothly, but the annealing temperature is
The temperature is about 050°C. In addition, in the case of high melting point metal silicide, in order to lower the resistance of the wiring layer, it is necessary to
Annealing was performed at 00°C for about 30 minutes.

The present invention proposes a method for forming electrode wiring that prevents contact resistance from increasing even when such an annealing step is added.

[Means for solving the problem] The problem is to implant or diffuse an impurity of the same type as the impurity (for example, arsenic) contained in the semiconductor region into the refractory metal or refractory metal silicide connected to the semiconductor region. The problem is solved by a method of forming electrode wiring that includes steps.

[Operation] That is, in the present invention, an impurity of the same type as the semiconductor region to be contacted is contained in the electrode wiring. In this case, even if annealing is performed, the amount of impurities at the contact interface with the semiconductor region will not decrease, and therefore the contact resistance will not increase.

[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.

FIG. 1 is a cross-sectional view of an n-channel MO3IC according to the present invention during the process. That is, in this step, the field insulating film 6
．． Gate insulating film 5. Gate electrode 4.

After forming an n-type source or drain region 2 by implanting arsenic ions and heat treatment, a tungsten film 3 with a thickness of about 2,000 yen is deposited by sputtering, and arsenic ions are implanted into it. This is an in-process diagram.

For the tungsten film 3 having such a thickness, arsenic ions are applied at an acceleration voltage of 160 KV and a dose of 4×lO/C-
Inject under the following conditions.

Then, even if annealing is performed at a temperature of 1000° C. or higher, the contact resistance will not increase.

Figure 2 (al, (bl) is a diagram showing the change in arsenic concentration to explain this. Figure (a) shows the source (drain) region 2 and the electrode wiring immediately after arsenic ions are implanted into the electrode wiring. The arsenic concentration in 3 is shown by the curve S. In addition, FIG. If it is included, the amount of arsenic at the contact interface between the source region 2 and the electrode wiring 3 will not decrease much, and therefore, the performance of the IC can be improved without increasing the contact resistance.

Although the above description has been made using an example of a tungsten electrode wiring in contact with an n-type region, an increase in contact resistance can be similarly suppressed using other high-melting point metals or their silicides.

Furthermore, the same effect can be obtained even if the same impurity ions as the impurity contained in the contacting semiconductor region are implanted.

[Effects of the Invention] As is clear from the above description, according to the present invention, the contact resistance is reduced and the performance of the IC is improved.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of the MO3IC according to the present invention during the formation process, FIG. FIG. 4, a cross-sectional view of a semiconductor element, is a graph showing the relationship between the conventional contact resistance and annealing temperature. In the figure, 2 indicates an n-type source or drain region, and 3 indicates an electrode wiring made of tungsten. /As 逼n【の Hamagohi V One T Episode 2 Figure

Claims (2)

[Claims] (1) A refractory metal or refractory metal silicide is deposited on a semiconductor region provided with an electrode window, and then an impurity of the same type as an impurity contained in the semiconductor region is added to the refractory metal or refractory metal silicide. A method for forming an electrode wiring, the method comprising the step of implanting or diffusing. (2) The method for forming an electrode wiring according to claim 1, wherein the impurity contained in the semiconductor region and the impurity implanted or diffused are arsenic.