JPS61208850A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to form with high reproducibility the pillar conductive layer as the connecting conductive part between the upper and the lower wiring layers, by installing the intermediate conductive layer to act as the etching stopper between the lower wiring layer and the pillar conductive layer. CONSTITUTION:The lower wiring film 2a of Al alloy film, etc., about 0.1-0.2mum thick intermediate conductive layer 7 of TiW alloy film, etc., as the etching stopper, and the wiring film 8a of Al alloy film, etc. are formed in turns on the substrate 1. The etching of the wiring film 8a is performed by applying the resist film 3a to the mask. In this process, the etching conditions are so set that the etching speed for the wiring film 8a of Al alloy film, etc. is sufficiently higher than the etching speed for the intermediate conductive layer 7. Thus, on the occasion of etching to form the pillar conductive layer 8, the intermediate conductive layer 7 or the lower wiring layer 2 can be employed as the etching stopper, so that even without etching control, the pillar conductive layer 8 can be formed at all times with the definite film thickness and reproducibility.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to an improvement in a method for connecting upper and lower wiring layers in multilayer wiring in a semiconductor device.

[Conventional technology]

In conventional semiconductor devices with this type of multilayer wiring structure, the upper part is formed using the so-called pillar formation method.
The main manufacturing steps of the connection method between the lower wiring layers are shown in FIGS. 2(a) to 2(g).

In the conventional method shown in FIG. 2, first, a wiring film 2a is formed on the main surface of the silicon semiconductor substrate 1 and has a thickness equal to the total thickness of a lower wiring layer and a living room insulating film, which will be described below.
A resist film 3a is formed by sputtering using an aluminum alloy film or the like, and a resist film 3a is patterned and coated on the surface corresponding to the pillar that will be the conductive part connected to the upper wiring layer (FIG. 3(a)). Using this resist film 3a as an etching mask, the wiring 112a is selectively etched away by a film thickness corresponding to the interlayer insulating film, and the pillar conductive layer 4 is formed on the wiring film 2a using the remaining film thickness. do. In other words, the pillar conductive layer 4 is formed on the wiring film 2a.
is selectively molded so that it remains with a predetermined amount of protrusion (FIG. 6(b)).

Subsequently, after removing the resist film 3a once, a resist film 3b patterned into a predetermined lower wiring pattern is again coated on the wiring film 2a including the formed pillar conductive layer 4 portion. Formally the same figure (C
)), and this time, using this resist film 3b as an etching mask, the wiring film 2a other than the pillar conductive layer 4 is selectively removed by knee etching, thereby forming the lower wiring layer 2.
．． That is, the lower wiring layer 2 having 4 portions of the pillar conductive layer is formed (FIG. 4(d)).

In this case, after once removing the resist film 3b, a silicon oxide film, a phosphorus glass film, etc. A living room insulating film 5 such as a film is formed, and a resist film 3C is again formed to cover the entire surface of the interlayer film 5 (see (e) in the same figure), and these resist film 3C and the interlayer insulating film 5 are Under conditions such that the respective etching rates are equal, reactive ion etching (RrE) is not performed until at least the surface portion of the pillar conductive layer 4 is exposed (FIG. 1(f)), and then,
After removing the resist film 3C, an upper wiring layer θ is formed by patterning, and this upper wiring layer 6 is connected to the lower wiring layer 2 through the pillar conductive layer 4 (see (g) in the same figure). If the thickness of the interlayer insulating film 5 is greater than or equal to the total thickness of the lower wiring layer 2 and the pillar conductive layer 4, reactive ion etching is performed to remove the resist (II!). 3C can also be removed at the same time, and the step of removing the resist film 3C can be omitted.

[Problem that the invention seeks to solve]

In the case of the conventional method described above, in the step of forming the pillar conductive layer 4 shown in FIG. Control, that is, a stop must be made during the etching process, so this process requires 1. There is a problem in that the film thicknesses of the lower wiring layer 2 and the pillar conductive layer 4 change depending on the uniformity of the wiring pattern, changes in temperature, etc.), which hinders the repeatability of the device configuration. there were.

In view of these drawbacks in the conventional method, the present invention
The object of the present invention is to obtain a method for forming a pillar conductive layer as a connecting conductive part between upper and lower wiring layers with good reproducibility.

[Means for solving problems]

In order to achieve the above object, the method of the present invention includes interposing an intermediate conductive layer made of a conductive material that acts as an etching stopper/etcher between the lower wiring layer and the pillar conductive layer;
Alternatively, a conductive material that acts as an etching stopper is used in the lower wiring layer itself.

[For production]

Therefore, in the method of the present invention, the intermediate conductive layer is etched for forming the pillar conductive layer.

Alternatively, since the lower wiring layer acts as an etching stopper, the pillar conductive layer can always be formed at a predetermined thickness with good reproducibility without controlling etching.

〔Example〕

An embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail below with reference to FIGS. 1(a) to 1(g).

In this invention, the pillar conductive layer can be formed by interposing an intermediate conductive layer using a conductive material that acts as an etching stopper on the lower wiring layer, or by interposing an intermediate conductive layer using a conductive material that acts as an etching stopper on the lower wiring layer itself. Although there are cases where this method is used, an example in which the former method is applied will be described here.

FIGS. 1(a) to 1(g) are sectional views sequentially showing the manufacturing process at the main stages of this embodiment method,
In the method of the embodiment shown in FIG. 1, the same reference numerals as in the conventional method shown in FIG. 2 indicate the same or corresponding parts.

In the method of the embodiment shown in FIG. 1, first, a lower wiring layer 2a of a predetermined thickness such as an aluminum (AM) alloy film or a titanium tungsten (TiW) alloy film is formed on the main surface of the silicon semiconductor substrate 1. 0, 1-0.
The intermediate conductive layer 7, which has a sufficient thickness as an etching paste of about 2 p-ta, is further made of aluminum (A4
Q.) The wiring film 8a of a predetermined thickness made of an alloy film or the like is sequentially formed, but these three-layer films can be formed successively by, for example, a sputtering method. A resist film 3a is patterned in the shape of a portion of the pillar to cover the surface corresponding to the portion of the pillar that will be the conductive portion connected to the wiring layer (FIG. 2(a)).

Next, using the resist film 3a described above as an etching mask, wiring lines H8a made of an aluminum alloy film or the like are formed.
For example, the etching is selectively removed by reactive ion etching (RIE) using a bromine-based gas, but at this time, the etching rate of the intermediate conductive layer 7 made of the titanium-tungsten alloy film is higher than that of the aluminum alloy film. It is preferable to select etching conditions so that the etching speed for the wiring fIIJ8a is sufficiently high, and to finish the selective etching for the wiring film 8a, for example, monitor the emission of gas plasma in the RIE. This detects the wiring film 8a.
In this way, the pillar conductive layer 8 can be selectively formed at a predetermined position on the intermediate conductive layer 7 with a predetermined protrusion amount (
Figure (b)).

Subsequently, after removing the resist film 3a, a resist film 3b patterned into a predetermined lower wiring pattern is again deposited on the intermediate conductive layer 7 including the formed pillar conductive layer 8. The same figure shows how to form a coating (
C)), and this time, using this resist film 3b as an etching mask, the intermediate conductive layer 7 other than the pillar conductive layer 8 is etched.
．． And the wiring film 2a thereunder is etched by reactive ion etching (RI) using, for example, chlorine-based gas, as described above.
E) is selectively etched away, but this time, the etching speed for the intermediate conductive layer 7 and the wiring film 8a is made as equal as possible, or at least 9% of the intermediate groove is etched.
7L=Start+Xx+14-7g The etching conditions for both may be changed as shown in FIG. That is, in this case, the lower wiring layer 2 having 8 portions of the pillar conductive layer can be formed via the intermediate conductive layer 7 (see (d) in the same figure).

The manufacturing steps after the previous step are exactly the same as those in the conventional method described above, but will be repeated here just in case.

That is, after the resist 113b is once removed, the main surface portion of the substrate 1 and the intermediate conductive layer 7 including the pillar conductive portion 98 are removed. An interlayer insulating film 5 such as a silicon oxide film or a phosphorus glass film is formed on the lower wiring layer 2 by a CVD method, a sputtering method, etc., and a resist film 3C is again formed on the entire surface of the interlayer film 5 (same as above). figure(
e)), these resist film 3c and interlayer insulating film 5,
Under conditions such that the respective etching rates are equal, reactive ion etching is not performed until at least the surface portion of the pillar conductive layer 8 is exposed (see FIG. 2).
After that, after removing the resist film 3c, the upper wiring layer 6
The upper wiring layer 8 is connected to the lower wiring layer 2 through the pillar conductive layer 8 by patterning.
Figure (g)). Note that at this time, the film thickness of the interlayer insulating film 5 is
If the total film thickness is greater than or equal to the total thickness of the lower wiring layer 2 and the pillar conductive layer 8, the resist film 3c can also be removed at the same time by reactive ion etching, and the step of removing the resist film 3c can be omitted.

Therefore, in the method of this embodiment, an intermediate conductive layer made of a conductive material that acts as an etching stopper is interposed between the lower wiring layer and the pillar conductive layer.
During etching for forming the pillar conductive layer, the intermediate conductive layer acts as an etching stopper, and the pillar conductive layer can always be formed with a predetermined thickness with good reproducibility without additionally controlling etching.

In the method of the embodiment, the same conductive material is used for the lower wiring layer and the pillar conductive layer, but different materials may be used. In particular, as the lower wiring layer, when forming the pillar wiring layer by etching, By using a conductive material that acts as an etching stopper, the lower wiring layer itself can be used in place of the intermediate conductive layer, as mentioned above.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, an intermediate conductive layer made of a conductive material that acts as an etching stopper is interposed between the lower wiring layer and the pillar conductive layer, or the lower wiring layer itself is Since a conductive material that acts as an etching stopper is used, the intermediate conductive layer or the lower wiring layer can act as an etching stopper during etching for forming the pillar conductive layer. It has the advantage of being able to always form a film with a predetermined thickness with good reproducibility without controlling the molding process by etching.

[Brief explanation of the drawing]

FIGS. 1(a) to 1g) are sectional views sequentially showing the manufacturing process at the main stages according to an embodiment of the method for manufacturing a semiconductor device according to the present invention, and FIGS. 2(a) to 2g) are sectional views, respectively. FIGS. 3A and 3B are sectional views sequentially illustrating the main stages of the manufacturing process according to the conventional method as described above; FIGS. 1... Silicon semiconductor substrate, 2a and 2...
Wiring film and lower wiring layer, 3a to 3C...resist film, 5...interlayer insulating film, B...upper wiring layer, 7...intermediate conductive layer, 8a and 8...・Pillar conductive layer. Agent Masuo Oiwa Figure 1 Figure 1 Figure 2 Figure 2 Name of the invention Method for manufacturing semiconductor devices 3 Name of the person making the amendment (601) Mitsubishi Electric Corporation 5 Target of amendment Figure 1

Claims (2)

[Claims] (1) In a method for connecting upper and lower wiring layers in a semiconductor device having multilayer wiring, a wiring film as a lower wiring is formed on the main surface of a semiconductor substrate, and a conductive material acts as an etching stopper when forming the next pillar conductive layer. An intermediate conductive layer using a conductive layer, a wiring film as a pillar conductive part for connection with the upper wiring, or a wiring film as a lower wiring, an upper wiring using a conductive material that acts as an etching stopper when forming the next pillar conductive layer. a step of sequentially forming each wiring film as a pillar conductive part for connection with the pillar conductive part; a step of etching and forming the wiring film as the pillar conductive part to form a pillar conductive layer; and a step of acting as the etching stopper. An intermediate conductive layer using a conductive material that acts as an etching stopper, and a wiring film as a lower wiring, or a wiring film as a lower wiring using a conductive material that acts as an etching stopper.
It includes a step of etching and forming an intermediate conductive layer consisting of two layers, and a lower wiring layer, or a single lower wiring layer, and then a predetermined procedure is performed on these to form an interlayer insulating film and the above-mentioned. 1. A method of manufacturing a semiconductor device, characterized in that an upper wiring layer connected to a lower wiring layer via a pillar conductive layer is formed in each of the pillars. (2) Sequentially forming a wiring film as a lower wiring, an intermediate conductive layer using a conductive material that acts as an etching stopper when forming the next pillar conductive layer, and a wiring film as a pillar conductive part for connection with the upper wiring. In this case, the intermediate conductive layer and the wiring film as the pillar conductive part are formed using different conductive materials, and at least the intermediate conductive layer is formed by etching the wiring film as the pillar conductive part. 2. The method of manufacturing a semiconductor device according to claim 1, wherein a conductive material that acts as an etching stopper is used during molding.