JPS61208227A - Connection of integrated circuit element in ic card - Google Patents

Connection of integrated circuit element in ic card

Info

Publication number
JPS61208227A
JPS61208227A JP60048222A JP4822285A JPS61208227A JP S61208227 A JPS61208227 A JP S61208227A JP 60048222 A JP60048222 A JP 60048222A JP 4822285 A JP4822285 A JP 4822285A JP S61208227 A JPS61208227 A JP S61208227A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit element
wiring
substrate
card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60048222A
Other languages
Japanese (ja)
Inventor
Takayuki Okamoto
隆之 岡本
Takao Kitagawa
孝夫 北川
Kaname Tamada
玉田 要
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Maxell Ltd
Original Assignee
Hitachi Maxell Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Maxell Ltd filed Critical Hitachi Maxell Ltd
Priority to JP60048222A priority Critical patent/JPS61208227A/en
Publication of JPS61208227A publication Critical patent/JPS61208227A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Abstract

PURPOSE:To perform easy connection between an integrated circuit element and a substrate by connecting electrode parts of the integrated circuit element directly to those of the substrate without using conductors such as gold wires. CONSTITUTION:A member which is housed in an IC card is constituted by a substrate 3 and a bottom plate 4, on the surface of which wirings 1 and 2 or printed patterns are provided respectively, and an integrated circuit element 5. A cutout 6, in which the integrated circuit element 5 is accomodated, is provided in the substrate 3 and wirings 1a are formed on the inside walls of the cutout 6. On the other hand, electrode parts 7 which are connected to the wirings 2 on the bottom plate 4 are attached to the bottom of the integrated circuit element 5. The member is assembled with those components in such a manner that the integrated circuit element 5 is connected to the substrate 3. The IC card is formed by incorporating the substrate 3 accomodating the integrated circuit element 5 in this manner into the card body.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ICカードに収納される基板に集積回路素子
を組込むに際して、該基板と素子との間の接続を有効に
行なう、ICカードの集積回路素子を結線する方法に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention provides an IC card that effectively connects an integrated circuit element to a board housed in the IC card when the integrated circuit element is incorporated into the board. The present invention relates to a method of wiring integrated circuit elements.

〔従来の技術〕[Conventional technology]

一般に、ICカードは印刷配線のパターンを施こした基
板に集積回路素子を組込み、この基板をカード本体に収
納することにより形成される。そして、集積回路素子と
基板との間の接続は、従来はワイヤボンディングにより
行なうようにしていた。このワイヤボンディングは細い
金線を使用し、この金線の両端をそれぞれ素子側と基板
側とに結着するものである。さらに、この基板における
素子収納部に合成樹脂による封止を行なうことによって
、当該ワイヤポンディングによる結線部分を保護するよ
うにしていた。
Generally, an IC card is formed by incorporating an integrated circuit element into a substrate having a printed wiring pattern, and housing this substrate in a card body. Conventionally, the connection between the integrated circuit element and the substrate has been made by wire bonding. This wire bonding uses a thin gold wire, and both ends of the gold wire are bonded to the element side and the substrate side, respectively. Further, by sealing the element housing portion of this substrate with synthetic resin, the connection portion by the wire bonding is protected.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前述したように、ワイヤボンディングにより集積回路素
子の接続を行なうために、極めて細い金属で結線する必
要があるが、この結線作業は著しく困難かつ面倒である
だけでなく、たとえ樹脂封止を行なっても、当該結線部
分を十分に保護することができず、ICカードの曲げ、
ねじり試験を行なう際、また長期間使用中に前述の結線
部分が堝傷する欠点があった。
As mentioned above, in order to connect integrated circuit elements by wire bonding, it is necessary to connect them with extremely thin metal, but this connection work is not only extremely difficult and troublesome, but even if resin encapsulation is used, However, the wiring part could not be sufficiently protected, and the IC card could be bent or
There was a drawback in that the above-mentioned wire connections were damaged during torsion tests and during long-term use.

本発明は叙上の点に鑑みてなされたもので、集積回路素
子の基板への接続を容易かつ効率的に行なうことができ
、しかもこの接続部分に必要な強度を持たせることがで
きるようにしたICカードの集積回路素子の結線方法を
提供することを目的とするものである。
The present invention has been made in view of the above-mentioned points, and has an object to enable easy and efficient connection of an integrated circuit element to a substrate, and to provide the necessary strength to this connection part. The object of the present invention is to provide a method for connecting integrated circuit elements of an IC card.

〔問題点を解決するための手段〕[Means for solving problems]

前述の目的を達成するために、本発明の方法は、表面に
印刷配線のパターンが施こされた基板に、該配線と連な
る位置において、板厚方向に貫通孔を穿設し、該貫通孔
に導電材を充填する工程と、前記基板を貫通孔の穿設位
置に沿って切り抜くことにより内周壁に前記導電材によ
る配線が形成された切抜部を形成する工程と、表面に配
線のパターンを設けた底板を、その配線が前記内周壁の
配線と接続する状態で前記基板に貼着することによって
、切抜部により画成される素子収納部を形成する工程と
、底面に電極部を形成した集積回路素子を前記素子収納
部内に収納し、該電極部を前記底板に形成した配線と結
着させる工程とから構成したことを、その特徴とするも
のである。
In order to achieve the above-mentioned object, the method of the present invention involves drilling a through hole in the board thickness direction at a position connected to the wiring in a substrate having a printed wiring pattern on the surface, and a step of filling the substrate with a conductive material, a step of cutting out the substrate along the drilling position of the through hole to form a cutout in which the wiring of the conductive material is formed on the inner peripheral wall, and a step of forming a wiring pattern on the surface. a step of forming an element housing section defined by a cutout by attaching the provided bottom plate to the substrate with its wiring connected to the wiring of the inner peripheral wall; and forming an electrode section on the bottom surface. The method is characterized in that it comprises the steps of accommodating an integrated circuit element in the element accommodating part and connecting the electrode part to the wiring formed on the bottom plate.

〔実施例〕〔Example〕

以下、本発明の実施例を図面に基づいて詳細に説明する
Embodiments of the present invention will be described in detail below with reference to the drawings.

まず、ICカードに収納される部材は、第1図に示した
ように、それぞれ表面に印刷配線のパターンを施こして
なる配線1,2が形成された基板3及び底板4と、集積
回路素子5とからなり、基板3には該集積回路素子5を
収納する切抜部6が開設されると共に該切抜部6の内周
壁にも配線1aが形成されている。一方、集積回路素子
5の底面には、底板4の配線2と接続するための電極部
7が取付けられている。そして、これらの各部材を組立
てることにより集積回路素子5を基板3と結線した状態
に組込み、このようにして集積回路素子5を組込んだ基
板3は、カード本体に収納させることにより、ICカー
ドが形成されることになる。
First, as shown in FIG. 1, the components housed in the IC card include a substrate 3 and a bottom plate 4 on which wirings 1 and 2 are formed with printed wiring patterns on their surfaces, and an integrated circuit element. 5, a cutout 6 for accommodating the integrated circuit element 5 is formed in the substrate 3, and a wiring 1a is also formed on the inner peripheral wall of the cutout 6. On the other hand, an electrode portion 7 for connection to the wiring 2 on the bottom plate 4 is attached to the bottom surface of the integrated circuit element 5 . Then, by assembling these members, the integrated circuit element 5 is assembled in a state where it is connected to the board 3, and the board 3 with the integrated circuit element 5 installed in this way is housed in the card body, so that it can be used as an IC card. will be formed.

そこで、前述の集積回路素子5を基板3に組込んで、そ
れと結線させる方法について説明する。
Therefore, a method of incorporating the above-mentioned integrated circuit element 5 into the substrate 3 and connecting it thereto will be explained.

まず、第2図に示した如く、表面に配線パターンを描く
ことにより配線1が設けられた基板3にその配線1の端
部位置に板厚方向に貫通する貫通孔8、所謂スルーホー
ルを穿設する。そして、この貫通孔8内に配線パターン
を描く際に使用したと同一の導電材を注入する。
First, as shown in FIG. 2, a wiring pattern is drawn on the surface of the board 3, on which the wiring 1 is provided, and a through hole 8, a so-called through hole, is formed at the end of the wiring 1 in the board thickness direction. Set up Then, the same conductive material used when drawing the wiring pattern is injected into the through hole 8.

次に、該貫通孔8を2分割する位置で基板3を切り抜く
ことにより、内周壁に配線1aを形成した切抜部6が形
成される。そして、この切抜部6内には集積回路素子5
を収納させるものであるから、該集積回路素子5の外形
より僅かに大きい寸法に形成するのが好ましい。
Next, by cutting out the substrate 3 at a position that divides the through hole 8 into two, a cutout 6 in which the wiring 1a is formed is formed on the inner peripheral wall. In this cutout 6, an integrated circuit element 5 is placed.
Since the integrated circuit element 5 is to be housed therein, it is preferable to form the integrated circuit element 5 in a size slightly larger than the external shape of the integrated circuit element 5.

然る後、この表面と切抜部6の内周壁とに相互に接続状
態にある配!1.1aを形成した基板3を底板4に貼着
するのであるが、この貼着時に該底板4の表面に設けた
配!2と基板3例の配線1aと接続させる必要がある。
Thereafter, the arrangement which is in mutual connection with this surface and the inner circumferential wall of the cutout 6 is formed! 1.1a formed on the substrate 3 is attached to the bottom plate 4. At the time of this attachment, the arrangement provided on the surface of the bottom plate 4! 2 and the wiring 1a of the three substrates.

このために、例えば当該接続部における配線1a、2の
端部のうち少なくとも一方を幅広に形成したり、導電ペ
ーストを付着するようにすれは、両者の接続を円滑に行
なうことができるようになる。これにより第3図に示し
た如く、基板3の切抜部6と底板4とにより素子収納部
9が形成される。
For this purpose, for example, by making at least one of the ends of the wirings 1a and 2 at the connection part wide, or by applying a conductive paste, the connection between the two can be made smoothly. . As a result, as shown in FIG. 3, an element housing portion 9 is formed by the cutout portion 6 of the substrate 3 and the bottom plate 4.

さらに、このようにして形成した素子収納部9内に集積
回路素子5を収納し、その電極部7を配線2と結線させ
るが、この結線は、例えば配線2側または電極部7側に
ハンダボールを取付けて、該ハンダボールを介して集積
回路素子5を載置して、炉に挿入してハンダボールを溶
解することにより、集積回路素子5の電極部7と基板3
側の配線2との間はハンダ付は部10を介して結線され
ることになる。
Furthermore, the integrated circuit element 5 is housed in the element housing part 9 formed in this way, and its electrode part 7 is connected to the wiring 2, but this connection is made by, for example, using a solder ball on the wiring 2 side or the electrode part 7 side. is mounted, the integrated circuit element 5 is mounted via the solder balls, and the electrode portion 7 of the integrated circuit element 5 and the substrate 3 are melted by inserting the integrated circuit element 5 into a furnace and melting the solder balls.
The wiring 2 on the side is connected via the soldering part 10.

前述のようにして集積回路素子5を組込んだ基板3は、
ICカードのカード本体における基板収納用凹部内に収
納した状態に装着されて使用される。而して、集積回路
素子5における結線部は、金線等による配線を使用して
はおらず、ハンダ付けにより直接接続させるようにして
いるから、当該結線部分の強度は著しく良好で、ICカ
ードに比較的大きな曲げ力やねじり力が作用しても、当
該結線部分が損傷するおそれはない。そして、底板4を
大きな強度を有する部材で形成すれば、集積回路素子は
安定した状態で素子収納部9内に収納されて、より良好
に保護されるようになり、このために基vi3は軽量な
部材で必要最小限度、即ち集積回路素子5の厚みより僅
かに肉厚に形成でき、全体重量の軽減化及び薄肉化を図
ることができる。
The substrate 3 incorporating the integrated circuit element 5 as described above is
The IC card is used by being installed in a board storage recess in the card body of the IC card. Since the wiring in the integrated circuit element 5 does not use gold wire or the like, but is directly connected by soldering, the strength of the wiring is extremely good, and it is suitable for IC cards. Even if a relatively large bending force or twisting force is applied, there is no risk of damage to the connected portion. If the bottom plate 4 is made of a material with high strength, the integrated circuit elements can be stored in the element storage part 9 in a stable state and better protected, and for this reason the base vi3 is lightweight. It can be formed using the minimum required number of materials, that is, slightly thicker than the thickness of the integrated circuit element 5, and the overall weight and thickness can be reduced.

なお、前述の実施例では、集積回路素子5の電極部7と
底板4の配wA2とをハンダ付けにより接続させる構成
としたが、これに代えて導電性のペーストを使用しても
よい。また、本発明の結線方法により結線部分に十分な
強度を付与することができるので、必ずしも樹脂封止を
行なう必要はないが、集積回路素子5の防湿保護を図る
ために、樹脂封止等を行なうようにしてもよい。
In the above embodiment, the electrode portion 7 of the integrated circuit element 5 and the wiring wA2 of the bottom plate 4 are connected by soldering, but a conductive paste may be used instead. Further, since the wiring connection method of the present invention can impart sufficient strength to the wiring part, it is not necessarily necessary to perform resin sealing, but in order to protect the integrated circuit element 5 from moisture, resin sealing etc. You may do so.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、集積回路素子の
電極部を金線等による配線を介することなく、直接基板
側と接続させるようにしたから、その間における結線を
容易に行なうことができ、しかもこのようにして結線さ
れた部分は十分な機械的強度を有し、比較的大きな曲げ
力やねじり力等がrcカードに作用しても、当該結線部
分が損傷するおそれはない。また、基板の表面に形成し
た配線と底板に形成した配線とを基板の板厚方向に貫通
孔を穿設し、この貫通孔に導電材を充填した後に、当該
部位を切抜くことによって形成したから、この内周壁に
おける配線パターンを容易に設けることができる。
As explained above, according to the present invention, since the electrode portion of the integrated circuit element is directly connected to the substrate side without using wiring such as gold wire, wiring between them can be easily made. Furthermore, the wired portions thus connected have sufficient mechanical strength, and even if a relatively large bending force, twisting force, etc. are applied to the RC card, there is no risk of damage to the wired portions. In addition, the wiring formed on the surface of the board and the wiring formed on the bottom plate were formed by drilling a through hole in the thickness direction of the board, filling the through hole with a conductive material, and then cutting out the relevant part. Therefore, a wiring pattern on this inner peripheral wall can be easily provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の方法により組付けられる部材の分解
斜視図、第2図は基板の切抜き加工を説明する斜視図、
第3図は集積回路素子の組込み状態を示す断面図である
。 1、la、2・・・配線、3・・・基板、4・・・底板
、5・・・集積回路素子、7・・・電極部、8・・・貫
通孔、9・・・素子収納部。 ゛旨、I°・:′ 一′、′1゛ 7二e:ンシ1づ(シ1戸
FIG. 1 is an exploded perspective view of members assembled by the method of the present invention, FIG. 2 is a perspective view illustrating cutting out processing of a board,
FIG. 3 is a cross-sectional view showing the assembled state of the integrated circuit element. DESCRIPTION OF SYMBOLS 1, la, 2... Wiring, 3... Substrate, 4... Bottom plate, 5... Integrated circuit element, 7... Electrode part, 8... Through hole, 9... Element storage Department.゛effect, I°・:'1','1゛72e:

Claims (1)

【特許請求の範囲】[Claims]  表面に印刷配線のパターンが施こされた基板に、該配
線に連なる位置において、板厚方向に貫通する貫通孔を
穿設して、該貫通孔に導電材を充填する工程と、前記基
板を前記貫通孔の穿設位置に沿って切り抜くことにより
内周壁に前記導電材による配線が形成された切抜部を形
成する工程と、表面に配線のパターンを設けた底板を、
その配線が前記内周壁の配線と接続する状態で前記基板
に貼着することによって切抜部により画成される素子収
納部を形成する工程と、底面に電極部を形成した集積回
路素子を前記素子収納部内に収納し、該電極部を前記底
板に形成した配線と結着させる工程とから構成したこと
を特徴とする、ICカードにおける集積回路素子の結線
方法。
A step of drilling a through hole penetrating in the thickness direction of the board at a position connected to the wiring in a board having a printed wiring pattern on its surface, and filling the through hole with a conductive material; A step of forming a cutout portion in which the wiring made of the conductive material is formed on the inner peripheral wall by cutting out along the drilling position of the through hole, and a bottom plate having a wiring pattern provided on the surface,
forming an element storage area defined by a cutout by pasting the wiring on the substrate in a state where the wiring is connected to the wiring on the inner peripheral wall; A method for connecting an integrated circuit element in an IC card, comprising the steps of storing the integrated circuit element in a storage part and connecting the electrode part to wiring formed on the bottom plate.
JP60048222A 1985-03-13 1985-03-13 Connection of integrated circuit element in ic card Pending JPS61208227A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60048222A JPS61208227A (en) 1985-03-13 1985-03-13 Connection of integrated circuit element in ic card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60048222A JPS61208227A (en) 1985-03-13 1985-03-13 Connection of integrated circuit element in ic card

Publications (1)

Publication Number Publication Date
JPS61208227A true JPS61208227A (en) 1986-09-16

Family

ID=12797388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60048222A Pending JPS61208227A (en) 1985-03-13 1985-03-13 Connection of integrated circuit element in ic card

Country Status (1)

Country Link
JP (1) JPS61208227A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5413964A (en) * 1991-06-24 1995-05-09 Digital Equipment Corporation Photo-definable template for semiconductor chip alignment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5413964A (en) * 1991-06-24 1995-05-09 Digital Equipment Corporation Photo-definable template for semiconductor chip alignment
US5561328A (en) * 1991-06-24 1996-10-01 Digital Equipment Corporation Photo-definable template for semiconductor chip alignment

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