JPS61201457A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To obtain a resistor, second insulating films and resistance length at pitches finer than the pitches of the layout of electrodes by using several kinds of patterns in which spaces among the second insulating films and contact windows differ. CONSTITUTION:Spaces d', d'' among insulating films 4 and contact windows 7 do not constant, and take different values. That is, a pattern A consisting of a silicon coating 2 in the same width as a previously cell-registered fundamental pattern, a contact window 7 and an electrode 8a or either of patterns B, C in which insulating films 4 in the same width as the fundamental pattern and length of DELTAL are superposed on the pattern A, the size of DELTAL is changed and spaces among the insulating films 4 and the contact windows 7 are altered is selected and arranged to an end section in the long direction of the fundamental pattern composed of a silicon coating 2 and an insulating film 4. Since resistance length is constituted by the sum of the length L of the insulating film 4 in the fundamental pattern and the length DELTAL of the insulating films 4 in variation cells, the variation cells, the size of DELTAL thereof is varied, are selected properly. Accordingly, resistance length at pitches finer than the pitches of a layout is acquired easily.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resistor for a semiconductor integrated circuit, and more particularly to a highly accurate silicon film resistor formed on an insulating film.

[Conventional technology]

Conventionally, a silicon film resistor formed on an insulating film has a structure shown in FIGS. 4 and 5. 4 is a plan view thereof, and FIG. 5 is a cross-sectional view thereof. In FIG. 6, 1 is an insulating film, 2 is a silicon film of one conductivity type, such as polysilicon, and 3 is a process for selective oxidation of the silicon film. The formed insulating film is an insulating film patterned by oxidizing the surface of the 4U silicon film, 5 is a metal silicide layer, and after buffing the insulating film 4 to 7, platinum is deposited on the repaired silicon film 2. It is formed by selective etching of platinum after heat treatment. 6 is an insulating film, 7 is a contact window, 8°a is an electrode, and 8b is made of the same material as the U electrode 8a.

Such resistance can be achieved by metal silicide/! The layer resistance of 5 is 5
Since it is as low as Ω/mouth or less, the resistance value can be determined by the 20-layer resistance of the silicon film, the shape of the silicon film 2 directly under the insulating film 4, and W as shown in the figure. Usually, silicon coated 20-layer resistors are manufactured in two types: one for low resistance of several hundred ohms, and one for high resistance of several hundred ohms, in order to reduce the resistor area. The spacing d between the contact windows 70 and the contact windows 70 is an alignment margin between the insulating film 4 and the contact windows 7, and all the resistors are unified to have the same size.

[Problem that the invention seeks to solve]

In the conventional resistor described above, when designing a photomask to create each region shown in the figure, a layout drawing several hundred to 1000 times larger in which all transistors, resistors, wiring, etc. are placed accurately is usually drawn, and this is used as a basis. In the digitizing work, a procedure is taken in which arrangement information is input to a graphic processing device and converted into photomask data by a pattern generator or electronic drawing device. In addition, the dimensions of each area shown in the figure differ in the minimum pitch of the area depending on the magnification of the layout drawing. For example, if the drawing pitch of the layout drawing and the input resolution of the digitizing work are 1k1mm, a layout drawing of 200 times has a 5μ pitch, and a layout drawing of 1000 times has a 5μ pitch. 1 in the layout drawing
It becomes μ pitch.

Therefore, when the resistance length is 200 times, the pitch is 5μ, 1000
It is only possible to obtain discrete values with a 1μ pitch. For this reason, the resistance value design accuracy decreases, or the resistance length L? In order to design with a pitch of α5 to 0.1μ and to increase the accuracy of resistance value design, it is necessary to draw a layout drawing 5000 to 10000 times larger, which poses problems such as requiring an enormous number of design man-hours. Furthermore, the resistance width W, the shape of the silicon film 2, and the electrode 8a.

The wiring 8b, the resistor spacing, and the wiring or electrode spacing can be designed accurately even with a 5μ pitch, so a layout drawing 200 times larger is sufficient, but in order to design the resistor length finely, these areas are designed with a 1000 times larger size or more. There is also the disadvantage that layout drawings must be drawn.

'Also, in order to see the effects seen in transistor patterns, it is a good idea to draw the pattern at high magnification in advance and register the cells in the graphic processing device.
There is a hierarchical method to arrange the corresponding cell e200 times,
In general, the number of Excels required is unrealistic because some of the resistors included in an integrated circuit have the same resistance value, but have different resistance values, and the shape of the resistor is determined at the layout arrangement stage.

[Means for solving problems]

It is an object of the present invention to eliminate the above-mentioned problems of conventional silicon film resistors, and to easily obtain resistor design with the same precision as a high-magnification layout drawing even in a low-magnification layout drawing. That is, the gist of the present invention is to provide a silicon film formed on a first insulating film on a semiconductor substrate, a second insulating film covering a part of the silicon film, and a metal covering the remaining part of the silicon film. a silicide layer, a gX3 insulating film covering the second insulating film and the metal silicide layer, and an electrode connected to the metal silicide layer through a contact window opening a part of the third insulating film. , in a resistor for a semiconductor integrated circuit in which a silicon film under the second insulating film is used as a resistor, several types of patterns with different intervals between the second insulating film and the contact window are used;
Layout pitch of the resistor, second insulating film, and electrode Pitch 0 Resistance length with fine pitch 'jk: #'fr:
It is in the resistance for semiconductor integrated circuits, which is expressed as a percentage.

〔Example〕

Next, the present invention will be explained with reference to all the drawings.

Fig. 1 is a plan view of one embodiment of the present invention, Fig. 2 is a plan view of a pattern constituting it, and Fig. 3 is a 111g1
FIG. In the figure, the insulation film is 1°3.4,
6. Silicon film 2, metal silicide 5, contact window 7, electrode 8a, arrangement 8b [formed by the same method as the conventional method, the difference from the conventional method is that the distance between the insulating film 4 and the contact window 7 is d', d ``is not constant but varies in value.

That is, at the end in the length direction of the basic pattern made of the silicon film 2 and the insulating film 4 shown in FIG. pattern or ld
, overlay the insulating film 4 having the same width as the basic pattern and the length ΔL on the A pattern, and select all of the B and C patterns in which the distance between the insulating film 4 and the contact window 70 is changed by changing the dimension of ΔL. This is C, which was designed to be placed. Even if all the variation cells of F, basic pattern, and A, B, and C are laid out at low magnification, for example, 200 times, the resistance length is the length L of the insulating film 4 of the basic pattern and the insulating film 4 of the variation cell. Since it is composed of the sum of lengths ΔL, by registering variation cells with different dimensions of ΔL and selecting them appropriately, it is possible to easily obtain a resistance length with a fine pitch in the layout pitch area. Furthermore, since the basic pattern can have any shape on the layout drawing, only the aforementioned variation cells need be registered, and there is no need to register a huge number of cells as in the conventional method.

〔Effect of the invention〕

As explained above, according to the present invention, when designing a semiconductor integrated circuit, a silicon film resistor having a resistance length with a fine pitch can be used for layout pitches of transistors, resistors, wiring, etc. Since it is possible to obtain a layout drawing with the necessary magnification for the layout, it is possible to easily obtain a silicon film resistor with high precision in conventional manufacturing design.

Furthermore, in order to obtain a silicon film resistor with the same design precision as the conventional one, it is sufficient to draw a layout drawing with a lower magnification than the conventional one, so that the number of design steps can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a plan view of an embodiment of the present invention, FIG. 2 is a plan view of the pattern that constitutes the whole, FIG. 3 is a sectional view of FIG. 1, and FIG. 4 is a plan view of a conventional silicon coating. FIG. 5 is a sectional view thereof. 1... Insulating film, 2... Silicon coating (
polysilicon), 3...insulating film, 4...
・Insulating film, 5...Metal silicide layer, 6...
...Insulating film, 7...Contact window, 8a...
...Electrode, 8b...Wiring. #lWJ rod 5 times

Claims (1)

[Claims] a silicon film selectively formed on the first insulating film, a second insulating film directly covering a portion of the silicon film, a metal silicide layer in contact with the remaining portion of the silicon film, and the second insulating film and a third insulating film covering the metal silicide layer, and a plurality of resistors each including a contact window through which a part of the third insulating film is opened to expose a part of the metal silicide layer. A semiconductor integrated circuit device comprising: a predetermined resistor among these resistors, wherein a distance between the second insulating film and the contact window is different from that of other resistors.