JPH0382031A - Semiconductor integrated circuit and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a metallic wiring having a larger surface area by including the metallic wiring, a cross section of which vertical to the direction of currents is formed in the same irregular shape at an arbitrary point. CONSTITUTION:Metallic wirings, cross sections of which vertical to the direction of currents are formed in the same irregular shape at arbitrary points, are contained in a plurality of the metallic wirings 1 shaped onto a single semiconductor substrate. Two or more of etching is executed selectively to a certain one metallic wiring layer 1 on the single semiconductor substrate, the film thickness of a certain metallic wiring in a plurality of the metallic wirings is changed regularly, and the cross section vertical to the direction of currents is formed in the same irregular shape at the arbitrary point of the metallic wiring. The metallic layer 1 is shaped, a section to be left as the wiring is masked with a photo-mask 3 and etching treatment is executed. Only a protruding section on the wiring to which the irregular shape must be formed is masked with the photo-mask 3, and the metallic wiring 1 having a shape shown in the figure is shaped through second etching treatment.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to metal interconnects in semiconductor integrated circuits, particularly interconnects that require high-speed operation.

[Conventional technology]

As the technology of semiconductor integrated circuits advances and their degree of integration increases, the width and pitch of metal interconnections tend to become smaller, and the thickness of metal films tends to become thinner.

Additionally, operating frequencies are becoming higher and higher, and elements on semiconductor integrated circuits tend to switch faster.

FIG. 4 is a perspective view showing the shape of metal wiring in a conventional semiconductor integrated circuit. In FIG. There are 2 shown. Metal wiring (1) for signal lines, power supplies, etc. formed on a semiconductor substrate in a conventional semiconductor integrated circuit has a rectangular cross-sectional shape as shown. The figure shows that the insulating layer (2) underlying the metal wiring is flat. The actual metal wiring layer (1) is a polysilicon wiring layer, a diffusion layer, 1! The layers forming the transistor, such as the edge layer, have an irregularly uneven shape.

However, main lines such as power supplies and clock signals that are supplied to the entire semiconductor integrated circuit are often placed in wiring areas where there are no transistors on the semiconductor integrated circuit. The insulation layer is very flat, so the metal wiring has the shape shown in Figure 4.

Furthermore, metal wiring for power supplies, clock signals, etc. must be able to flow the necessary current with good responsiveness.

Conventionally, metal wiring with a rectangular cross section, such as those for power supplies and clock signals, was handled by making the wiring width sufficiently large.

[Problem to be solved by the invention]

In conventional semiconductor integrated circuits, there has been a problem in that the current density of metal wiring must be increased without increasing the area occupied.

This invention was made to solve the above-mentioned problems, and its purpose is to obtain metal wiring with a larger surface area.

[Means to solve the problem]

A semiconductor integrated circuit according to the present invention is provided with metal wiring whose film thickness is selectively changed and whose surface is uneven.

[Effect]

The metal wiring in this invention has the effect of increasing its surface area.

〔Example〕

An embodiment of this invention will be described below with reference to the drawings.

FIG. 1 is a perspective view showing an embodiment of a metal wiring of a semiconductor integrated circuit according to the present invention having irregularities, and FIG. 2 is a perspective view showing an embodiment of each step of the metal wiring manufacturing method of the present invention. In figure 0, +11 is a metal wiring layer, (2)
(3) shows the metal wiring layer (insulating layer underlying 11), and (3) shows the photoresist used by photolithography.The semiconductor integrated circuit of the example shown here has a very high operating frequency, and the switching of each element is The speed is fast.

As the operating frequency of a semiconductor integrated circuit increases, the operating speed within the semiconductor integrated circuit increases, and current tends to flow on the surface of the metal wiring (1) due to the well-known skin effect. Therefore, the current flowing through the metal wiring 11) depends on its surface area.

As shown in Figure 1, metal interconnects (+1) through which large currents flow instantaneously, such as power supplies and clock signals inside semiconductor integrated circuits, have uneven cross-sectional shapes by selectively changing the thickness of the metal interconnects. It has become. When the metal wiring (1) is manufactured in this manner, a sufficient current can be passed through the metal wiring with good responsiveness.

Next, a method of manufacturing this metal layer wA(1) will be explained. First of all,
As shown in Figure 2 (al), the metal layer is shaped and the parts to be left as wiring are covered with photoresist (3) by photolithography.
Next, as shown in Figure 2(e), etching is performed to leave only the part that will become the wiring.Furthermore, as shown in Figure 3(e), a photo is etched on the wiring where the uneven shape is to be added. Only the convex portions formed by plate making are masked with photoresist (3).

By performing the etching process again, a metal wiring (1) having the shape shown in FIG. 1 can be manufactured.

Although the above example shows the case where the metal wiring is convex, it is also possible to make the metal wiring convex and the space between them concave, as shown in FIG. 3. According to this example, the current density can be further increased. It has a large effect.

〔Effect of the invention〕

As described above, according to the present invention, the current density of the metal layer wire can be easily increased without increasing the area occupied on the semiconductor integrated circuit, so the size of the entire semiconductor integrated circuit chip can be suppressed. This has the effect of improving retention and reducing costs.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a perspective view showing unevenness on the metal wiring of a semiconductor integrated circuit according to an embodiment of the present invention, and FIG. 2 is a perspective view showing the steps of the metal wiring manufacturing method of the present invention. 3 is a perspective view showing a metal wiring of a semiconductor integrated circuit according to another embodiment of the present invention with unevenness, and FIG. 4 is a perspective view showing the shape of metal wiring in a conventional semiconductor integrated circuit. It is. In medicine, (1) is a metal wiring layer 1. +2) is an insulating layer,
(31 indicates a photoresist. In the figures, the same reference numerals indicate the same or corresponding parts.

Claims (2)

[Claims] (1) A semiconductor integrated circuit characterized in that a plurality of metal wirings formed on a single semiconductor substrate include metal wirings whose cross section perpendicular to the direction of current has the same uneven shape at any point. . (2) Selectively etching one metal wiring layer on a single semiconductor substrate two or more times, regularly changing the film thickness of a certain metal wiring among multiple metal wirings, and changing the direction of current flow. A method for manufacturing a semiconductor integrated circuit, characterized in that a cross section perpendicular to is made to have the same uneven shape at any point of the metal wiring.