JPS6120029B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an arithmetic device using a processor such as a microcomputer.

With recent advances in digital circuit technology, microcomputer processors have become smaller.
With this, microcomputers, controllers, etc.
Attempts have been made to introduce it into various analog devices. In this case, since the processor performs various operations or tasks in a time-sharing manner, it is unacceptable for the processor to malfunction or perform erroneous operations.

Here, the present invention attempts to realize an arithmetic device having a function of self-checking whether or not a processor is operating normally.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure _, reference numeral 10 denotes an input terminal _to which the analog signal to be operated, _e It constitutes a pressure means. 11 and 12 are respective comparators, and 20 is a processor which receives the signals from each comparator as input, and is a microcomputer, for example. 30 is a D/A converter that converts the digital signal from the processor 20 into an analog signal and supplies its output in common to one input terminal of each of the comparators 11 and 12, as well as to an analog signal holding means 40 to be described later. . Analog signal holding means 40
consists of a semiconductor switch 41 driven by a signal from the processor 20, a capacitor 42, and an amplifier 43. Note that this analog signal holding means is not required when the calculation result is obtained as a digital signal. 50 is an output terminal.

The comparator 11 has an operand signal e _x at one input terminal.
is given, _this signal _e
It is used as an input signal. The comparator 12 has a divided voltage signal e _x /divided by resistors R ₁ and R ₂ at one input terminal.
n (n=R ₂ /R ₁ +R ₂ ) is given, and this divided voltage signal and the D/A converter 3 given to the other input terminal.
The _comparison result is used as an input signal to the processor 20.

The processor 20 includes an input port 21, a data memory section 22 made up of, for example, a read/write memory, an arithmetic control section 23, a program memory section 24 made up of, for example, a read-only memory, and an output port 25. . The input port 21 receives signals from the comparators 11 and 12, and waits for the output signals of the comparators 11 and 12 to be read sequentially or selectively in response to a signal from the arithmetic control section 23. The data memory section 22 temporarily stores a signal applied from the input port 21 in response to a signal from the calculation control section 23, and stores calculation results. The program memory section 24 stores in advance conversion procedures for converting analog signals into digital signals, procedures for controlling peripheral circuits, various calculation procedures, and data necessary for calculations, and the contents thereof are used for calculation control. It is read out by a signal from section 23. The arithmetic control section 23 reads the state of the signal applied to the input port 21, writes it to the data memory section 22, decodes the arithmetic procedure from the program memory section 24, and reads the data read from there and the data memory. The signals read from the section 22 are used to perform digital calculations. The output port 25 is supplied with a digital signal output from the data memory section 22 or the arithmetic control section 23, and sends the digital signal to the D/A converter 30 according to the signal from the arithmetic control section 23.
Alternatively, a control signal for controlling this circuit is output to the signal holding circuit 40. The D/A converter 30 converts the digital signal outputted from the output port 25 into an analog signal, which is then sent to the comparators 11 and 12.
It is commonly applied to the other input terminal of the analog signal holding means 40 when the switch 41 is made conductive by an output command signal (control signal) from the processor 20.

The operation of the apparatus configured in this way will be explained next. First, when checking whether the device is operating normally, the processor 20
For example, the comparator 1 is activated according to the signal (program) written in the program memory section 24.
The output signal from the comparator 11 is read, and the operated signal _e into a digital signal. Although there are various methods for converting an analog signal into a digital signal, for example, a successive approximation method can be used to easily convert the analog signal into a digital signal. The converted digital signal is written into a part of the data memory section 22 as _Ex , for example. Next, the processor 20 reads the output signal from the comparator 12 and converts the output signal from the comparator 1 to
The divided voltage signal _ex /n applied to the input terminal of 2 is converted into a digital signal, and this is written into a part of the data memory section 22 as _Ex /n, for example. Next, the processor 20 uses Ex _{and Ex} /n stored in the data memory section 22 to perform a predetermined operation, for example, a division operation, according to the self-check program stored in the program memory section 24. and find the ratio of E _x and E _x /n. The procedure used to calculate the ratio depends on the content of the program, but it is preferable to use various calculation procedures from the standpoint of checking various functions. The result of performing the division operation is
The answer is n or 1/n, assuming that the analog-to-digital conversion loop and various arithmetic functions are operating normally. Therefore, the processor 20 calculates whether the calculation result is n or 1/
By determining whether or not n, the function of the processor 20 and the operation of the entire device including the comparators 11 and 12 and the D/A converter 30 are self-checked for normality or abnormality over the entire input range. be able to.

FIG. 2 is an example of a flowchart outlining a self-check program.

FIG. 3 is a block diagram showing another embodiment of the present invention. In this embodiment, the signal to be calculated e
_x and the voltage e _x /n divided by resistors R ₁ and R ₂ are applied to A/D converters 13 and 14, respectively, and the converted digital signals E _x and E _x /n are given to the processor 20. This is how it was done. Further, a switch is provided on the output side of the analog signal holding means 40, and if the calculation result obtained by executing the self-check program is not n or 1/n, this switch 45 is turned off. Possibly the fail-safe side
In this embodiment, the alarm means 46 is driven. In addition, in this embodiment, the number of A/D converters is one, and a multiplexer is provided on the input side of this A/D converter.
The selected signal may be applied to the A/D converter.

In each of the embodiments described above, the program for self-checking is executed at regular intervals or as needed, and is executed by the processor 20.
It goes without saying that normally a predetermined calculation or a predetermined control operation is processed in a time-sharing manner. In addition, the number of analog signals to be operated on is not limited to one,
There may be even more.

Conventionally, a check program has been executed to determine whether the processor is operating normally or abnormally, but in this case, it is possible to check only the processor; A converter or comparator or A/
D converter) could not be checked. There is also a check method in which a constant value is A/D converted, but although it is possible to check for singular points, it is not possible to check for the entire input range.

The device according to the present invention has the advantage of being able to determine whether the operation of the entire device is normal or abnormal. Furthermore, since the check is performed using the analog signal to be operated on, it is possible to automatically determine whether the operation is normal or abnormal over the entire input range in which the analog signal to be operated on changes.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a flow chart showing an outline of a self-check program, and FIG. 3 is a block diagram showing another embodiment of the present invention. 10...Input terminal, _R1 , _R2 ...Resistance voltage dividing means, 11, 12 comparator, 20...Processor, 3
0...D/A converter, 40...analog signal holding means, 50...output terminal.

Claims (1)

[Scope of Claims] 1. In an arithmetic device that converts an analog signal to be operated into a digital signal and performs a predetermined operation, a resistor voltage dividing means for dividing the voltage of the analog signal to be operated is provided, and the analog signal to be operated and the resistor divider are provided. A self-check of the entire device is carried out by converting the voltage-divided signals by the voltage dividing means into digital signals and calculating the ratio of the two, and determining whether the result is a constant value related to the voltage division ratio of the resistive voltage dividing means. An arithmetic device designed to perform 2. If the result of converting the analog signal to be operated and the signal divided by the resistive voltage dividing means into digital signals and calculating the ratio of the two is not a constant value related to the voltage dividing ratio of the resistive voltage dividing means, the output signal of the device 2. The arithmetic device according to claim 1, further comprising means for controlling the value to a safe value.