JPH0739123U - AD converter - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide an AD conversion device capable of highly accurately detecting a failure of the AD conversion device used in a power system protection / control device. [Structure] A CPU 1 divides the entire input range of an AD conversion circuit 3 into fixed steps, and sequentially writes data corresponding to each step into the DA conversion circuit 2. DA conversion circuit 2
Inputs the output corresponding to the written data to the AD conversion circuit 3 via the multiplexer 4. CPU1
Compares the data written in the DA conversion circuit 2 with the output data of the AD conversion circuit 3 to detect a failure in the entire input range of the AD conversion circuit 3.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a failure detection method for an AD converter, which is a protection / control device in a power system and takes in a signal proportional to an alternating current or voltage value of the system obtained by a transformer as a detection signal and converts it into a digital signal. .

[0002]

[Prior art]

 Conventionally, in a protection / control device in a power system, an analog signal proportional to the AC current or voltage value of the system obtained by using a transformer or the like is input to the AD conversion device, and the AD conversion device A digital relay system is used that converts the input signal into digital data and inputs it to the CPU, which processes the digital data and protects and controls the power system based on the processing result. There is.

An AD conversion device used for such a protection / control device in a power system is required to have high reliability and is generally provided with a failure detection means. The failure detection means of this AD converter inputs the output of a constant voltage power source or the like used inside the apparatus as a test voltage and reads the output to this input to detect a failure.

[0004]

[Problems to be solved by the device]

 However, the conventional AD conversion device only detects a failure near the output voltage of the constant voltage power supply or the like, and does not detect a failure in the entire input range of the AD conversion circuit.

FIG. 3 is a diagram showing the relationship between the input and the output of the AD converter. FIG. 3A is a diagram showing an input / output relationship when the AD converter is normal. FIG. 3B is a diagram showing an input / output relationship when the AD conversion device has a specific error failure. FIG. 3C is a diagram showing an input / output relationship when the AD conversion device has a nonlinear failure. FIG. 3D is a diagram showing an input / output relationship when the AD converter is in a slight input error failure. As is apparent from these figures, the conventional AD converter cannot detect the relative error fault when the input voltage for fault detection is small. Further, at the time of non-linear failure, if the input voltage is V1 (see FIG. 3C) or higher, the failure cannot be detected. Furthermore, when the input voltage is large, it is not possible to detect a minute input error failure. Therefore, the protection / control device in the power system has a drawback that the accuracy cannot be guaranteed in the entire input range of the AD conversion circuit.

An object of the present invention is to provide an AD conversion device capable of highly accurately detecting a failure of an AD conversion circuit used in a protection / control device or the like in a power system.

[0007]

[Means for Solving the Problems]

 The AD converter according to the present invention includes an AD converter circuit which takes in a signal proportional to the magnitude of an AC current or an AC voltage of a power system as an external input signal, converts the signal into digital data and outputs the digital data, and the output of the AD converter circuit. A CPU that takes in via a data bus or the like and performs arithmetic processing based on the CPU, a DA conversion circuit that converts the digital data written by the CPU via the data bus or the like into an analog signal and outputs the analog signal, and the aforementioned AD conversion A switching circuit that selects the external input signal and the output of the DA conversion circuit as an input to the circuit, and the CPU divides an input range of a predetermined width of the AD conversion circuit into predetermined steps, and Step data writing means for sequentially writing the data corresponding to the steps to the DA conversion circuit, and each step written by the step data writing means. Characterized by providing an AD converter circuit failure detecting means reads the output of the AD converter you determine a failure of the AD converter circuit for data per flop, the.

[0008]

[Action]

 In the AD converter of this invention, the switching circuit selects the input to the AD converter circuit as the external input signal and the output of the DA converter circuit. In the AD conversion device, the CPU divides the input range of the AD conversion circuit into a predetermined width at predetermined steps, and sequentially writes the data corresponding to each step into the DA conversion circuit. The DA conversion circuit inputs the voltage for the written data for each step to the AD conversion circuit via the switching circuit. The CPU reads the output from the AD conversion circuit via the bus and determines the failure of the AD conversion circuit at each step.

[0009]

【Example】

 FIG. 1 is a diagram showing the configuration of an AD converter according to an embodiment of the present invention. An AD converter used for protection and control of a power system includes a CPU 1, a DA converter circuit 2 for converting a data value written by the CPU 1 into an analog voltage and outputting the analog voltage, and an input analog voltage. An AD conversion circuit 3 for converting to digital data and a multiplexer 4 for switching the input to the AD conversion circuit 3 are provided. The output of the DA conversion circuit 2 and a plurality of detection signals (a signal proportional to the magnitude of the AC current or AC voltage of the power system) sent from the outside are input to the multiplexer 4. The CPU 1, the DA conversion circuit 2 and the AD conversion circuit 3 are connected to each other via a bus 5, and the input channel data S 1 is output from the CPU 1 to the multiplexer 4.

With the above configuration, in the AD converter, a plurality of detection signals sent from the outside or the output of the DA converter 2 is sequentially switched by the multiplexer 4 and input to the AD converter 3. . The AD conversion circuit 3 converts the input detection signal into digital data and sends it to the bus 5. The CPU 1 reads the data sent to the bus 5 and performs arithmetic processing for protection and control based on this data.

In the AD converter, the CPU 1 executes arithmetic processing for protection and control, which is a main function, at regular time intervals. By the way, after the CPU 1 completes the arithmetic processing for protection and control, there is extra time until the arithmetic processing for protection and control is started next, and the CPU 1 enters the test mode at this extra time. Further, in the AD converter, the CPU 1 stops the main function and enters the test mode even when an externally attached test switch is operated.

FIG. 2 is a diagram showing an operation flow in the test mode. In the test mode, the CPU 1 controls the multiplexer 4 as described above to switch the input to the AD conversion circuit 3 so that the output of the DA conversion circuit 2 is input (n1). The CPU 1 evenly divides the entire input range of the AD conversion circuit 3 in certain steps. The entire input range is an input range that guarantees the input / output characteristics required for the AD converter to operate with a predetermined accuracy. The CPU 1 sequentially writes data to the DA conversion circuit 2 via the bus so that the DA conversion circuit 2 outputs the voltage corresponding to each of the divided steps.

For example, when the input range of the AD conversion circuit 3 is 0 to Vc and the number of divided steps is N, the CPU 1 first sets the step rank A to 1 (n2), and the DA conversion circuit 2 ( Data for outputting a voltage of Vc / N) × A is written (n3). The DA conversion circuit 2 outputs a voltage of (Vc / N) × S when the data is written in the CPU 1. The output of the DA conversion circuit 2 is input to the AD conversion circuit 3 via the multiplexer 4. The AD conversion circuit 3 converts this input voltage into digital data and outputs it to the bus 5. The CPU 1 reads the data sent to the bus 5 and determines the failure of the AD conversion circuit 3 (n4). This failure judgment is performed using the following formula.

The output theoretical value of the AD conversion circuit 3 with respect to the output value of the AD conversion circuit 3−the input |> ε ε is a reference value for determining whether the AD conversion circuit 3 has a failure, and is set in advance. If the above equation is satisfied, it is determined that the failure.

When the CPU 1 determines in this failure determination that the AD conversion circuit 3 is not a failure, the CPU 1 compares the step rank A with the number of steps N (n5). When it is determined in this comparison that the step rank A is equal to or smaller than the number of steps N, the CPU 1 adds 1 to the step rank A (n6), and the DA conversion circuit 2 outputs the voltage corresponding to the next step. Write via the bus 5 (n3). The CPU 1 determines the failure of the AD conversion circuit 3 as in the above (n4). On the other hand, when it is determined that the step rank A is larger than the number of steps N, the CPU 1 completes the test mode and shifts to the normal operation mode (n7). As a result, the CPU 1 repeatedly performs the failure determination with the divided number of steps, and the failure detection of the AD conversion circuit 3 is performed in the entire input range of the AD conversion circuit 3.

On the other hand, when the CPU 1 determines that the AD conversion circuit 3 is in failure by this failure determination, the CPU 1 performs failure time processing including error processing (n8).

As described above, since the AD conversion apparatus determines the failure detection of the AD conversion circuit 3 in the entire input range of the AD conversion circuit 3, the ratio error failure, the non-linearity failure, and the minute input as shown in FIG. Error faults can be reliably detected, and the accuracy of the AD converter circuit of the protection / control device in the power system can be guaranteed.

[0018]

[Effect of device]

 As described above, according to this invention, the failure of the AD conversion circuit used in the AD conversion device can be detected with high accuracy and reliability.

For example, when the AD conversion circuit has a specific error failure, the failure is detected in a large input range. In addition, when there is a nonlinear failure or a minute input error failure, the failure is detected within a small input range.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an AD converter according to an embodiment of the present invention.

FIG. 2 is a diagram showing a flow in a test mode of the AD converter according to the embodiment.

FIG. 3 is a diagram showing a relationship between inputs and outputs of an AD conversion circuit.

[Explanation of symbols]

 1-CPU 2-DA conversion circuit 3-AD conversion circuit 4-multiplexer

Claims (1)

[Scope of utility model registration request] 1. An A / D conversion circuit which takes in a signal proportional to the magnitude of an alternating current or an alternating voltage of a power system as an external input signal, converts it into digital data, and outputs the digital data.
A CPU that takes in the output of the D conversion circuit via a data bus or the like and performs arithmetic processing based on it, and a DA conversion circuit that converts the digital data written by the CPU via the data bus or the like into an analog signal and outputs the analog signal. , Said A
The external input signal and the DA are input to the D conversion circuit.
A switching circuit that selects the output of the conversion circuit, and the CPU divides the input range of the AD conversion circuit of a predetermined width into predetermined steps, and sequentially writes the data corresponding to each step in the DA conversion circuit. A step data writing means and an AD conversion circuit failure detecting means for reading the output of the AD conversion circuit for the data for each step written by the step data writing means to judge a failure of the AD conversion circuit are provided. An AD conversion device characterized in that