JP2704062B2 - Information processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an information processing apparatus, and more particularly to an information processing apparatus in which a plurality of LSIs are connected by a data bus.

[0002]

2. Description of the Related Art Conventionally, this type of information processing apparatus includes a bidirectional data bus, a plurality of LSIs including an input / output control circuit for the data bus and a data check circuit, which are interconnected by the data bus, and It is composed of an error register that holds an error detected by the data check circuit.

[0003]

In the conventional information processing apparatus described above, when an error is detected by the data check circuit, the LSI that detected the error can be identified by looking at the error register, but the LSI that caused the error is pointed out. There is a drawback that it is difficult to do.

[0004]

An information processing apparatus according to the present invention comprises: a bidirectional data bus; an input / output control circuit for controlling data input / output to / from the data bus; and an input data from the data bus. A plurality of LSIs, each of which includes a data check circuit, and an error register that holds an error detected by the data check circuit in correspondence with the plurality of LSIs. A value indicating whether data is being input from the data bus or data is being output is stored for each LSI, and when an error is registered in the error register, there is provided a bus emission register for holding the value. doing.

[0005]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. Four LSIs 11, 12, 13 and 14 are connected to each other by a bidirectional data bus a.

Each of the four LSIs 11, 12, 13, and 14 includes a data check circuit 15 for detecting an error in input data from the data bus a, and an input / output control for controlling whether to output data to the data bus a. And a circuit 16.

The error register 17 is a 4-bit register to which error signals b, c, d, and e of four LSIs are input, and when an error occurs, holds error information and suppresses updating of the register.

The bus emission register 18 has four Ls.
An LSI that outputs data to the data bus a by a 4-bit register that receives bus output permission signals f, g, h, and i output from each input / output control circuit 16 of the SI;
When an error is registered in the error register 17, updating of the register is suppressed.

When an error is detected, an error register 1
7 and the bus emission register 18 are checked to indicate a faulty LSI. The bus emission register 18 indicates that one LSI has output data to the data bus 9, and when an error is detected in the error register 17 by a plurality of LSIs, the error is output to the data bus a. The LSI that has been operating is considered to have failed.

[0011]

As described above, the present invention provides a bus emission register for storing data bus output permission information of a plurality of LSIs connected by a data bus, so that a fault occurs when a data bus error is detected. L
There is an effect that SI can be easily pointed out.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

[Explanation of symbols]

 11, 12, 13, 14 LSI 15 Data check circuit 16 I / O control circuit 17 Error register 18 Bus emission register a Data bus

Claims (1)

(57) [Claims] An input / output control circuit for controlling input / output of data to / from the data bus; and a data check circuit for checking input data from the data bus. And a plurality of LSIs interconnected by the data check circuit and an error detected by the data check circuit.
An error register for correspondingly storing, for each LSI, a value indicating whether the plurality of LSIs are inputting data from the data bus or outputting data;
An information processing apparatus comprising: a bus emission register that holds a value when an error is registered in the error register.