JPH0250226A - Microcomputer - Google Patents

Abstract

PURPOSE:To prevent data which are stored in a ROM from being read by controlling whether the data of the ROM are outputted or not according to coincidence between data which are inputted from an external part when a power source is inputted, and data to be read from the ROM just after a test condition is obtained. CONSTITUTION:A microcomputer has an input data latch circuit 4 to latch input data when the power source is inputted, a ROM data latch circuit 2 just after the test condition is obtained, a coincidence detecting circuit 3 to detect the coincidence between the output of the input data latch circuit 4 and the output of the ROM data latch circuit 2 and a control circuit 6 to control whether the ROM data are outputted or not according to the coincidence to be detected by the coincidence detecting circuit 3. Thus, even when the test condition is obtained, the data stored in a ROM1 are not outputted to an external part and the data stored in the ROM1 can be protected to any person excepting a data preparing person.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer with a built-in ROM, and more particularly to a microcomputer that can output ROM data to the outside during testing.

[Conventional technology]

Conventionally, some microcomputers have a built-in read-only memory (hereinafter referred to as ROM) for storing data such as instructions.

There is a microcomputer that can directly output ROM data to the outside in order to test the ROM data.

Figure 2 shows the RO of a microcomputer with built-in ROM.
It is a block diagram showing the M section. When the test state is entered, the test signal 16 changes from the "θ" level to the "1" level, and the ROM 14 outputs the ROM data 17, and the ROM 14 outputs the ROM data 17.
The M data lγ is outputted to the outside by the output circuit 15.

[Problem to be solved by the invention]

The conventional microcomputer described above outputs data to the outside whenever it enters a test state, so it
Even a third party who does not know the data stored in the ROM can easily
The disadvantage is that it can copy data. In particular, microcomputers with built-in electrically writable read-only memory (hereinafter referred to as FROM) perform a check after writing, so the contents of FROM are output to the outside to expose the test state, so the contents of FROM are stored in the FROM. The disadvantage is that a third party can easily copy the stored data.

[Means to solve the problem]

The microcomputer of the present invention has an input data latch circuit that latches input data when the power is turned on, a ROM data latch circuit that latches input data immediately after entering a test state, and a match between the output of the input data latch circuit and the output of the ROM data latch circuit. and a control circuit that controls whether or not to output ROM data depending on whether or not the coincidence detection circuit detects a coincidence.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

ROM1 is a ROM that stores data, ROM data signal 11 is an output signal of ROMI, ROM data latch circuit is a latch circuit that latches the ROM data signal 11 immediately after the test signal changes from a non-test state to a test state, and is an input. The circuit 5 is an input circuit that takes in input data from the outside, the input data signal 12 is an output signal of the input circuit 5, and the input data latch circuit 4 receives the input data by a power-on signal 8 that is issued once when the power is turned on to the microcomputer. The latch circuit that latches the signal 12 and the match detection circuit 3 are R.
A coincidence detection circuit detects whether the output of the OM data latch circuit 2 and the output of the input data latch circuit 4 match, the coincidence signal 10 is the output signal of the coincidence detection circuit 3, and the control circuit 6 detects the coincidence signal 10. ROM data signal 1 when
1 is output as is to the output data signal 13, and the match signal 1 is output as is.
The output circuit 7 is a control circuit that outputs a fixed signal as the output data signal 13 when 0 does not match, and the output circuit 7 is an output circuit that outputs the output data signal 13 to the outside.

The operation of the ROM data read test shown in FIG. 1 will be described below.

Comparison input data is applied to the input circuit 5 when power is applied to the mass/microcomputer. This comparison input data is data that is read out from the ROM when the microcomputer is next put into a test state, and is data that is obvious to the person who created the data stored in the ROM. This comparison input data is latched by the input data latch circuit 4.

Next, when not in the test state, the test signal 9 is, for example, "0".
level, and in the test state, the test signal 9 is “
The ROM data signal 11 immediately after the test signal 9 changes from the "0" level to the "1" level.
Latch the data. If the ROM address at this time is determined in the system, the data latched by the ROM data latch circuit 2 will be specific data determined by the data stored in the ROMI. Since this data is obvious to the person who created the data stored in the ROM 1, it is easy to provide it as the above-mentioned input data for comparison. When the output of the ROM data latch circuit 2 and the output of the input data latch circuit 4 match, the match signal 10 of the match detection circuit 3 becomes, for example, a 1" level, and the match signal 10 becomes "1".
When the level is reached, the control circuit 6 outputs the ROM data signal 11 as it is as the output data signal 13, and the output circuit 7 outputs the output data signal 13 to the outside.

In addition, the input data for comparison given when the power is turned on, that is, the data latched in the input data latch circuit 4, is
If it is different from the specific data latched by the OM data latch circuit 2, the output signal of the coincidence detection circuit 3, the coincidence signal 10
becomes “O” level. Then, the control circuit 6 outputs a fixed signal, eg, all "0" level, as the output data signal 13 regardless of the ROM data signal 11. As a result, even in a test state, the data stored in the ROMI is not output to the outside, and the data stored in the ROMI can be protected from anyone other than the data creator.

〔Effect of the invention〕

As explained above, the present invention controls whether or not to output ROM data based on whether or not the data input from the outside when the power is turned on matches the data read from the ROM immediately after entering the test state. This has the effect of preventing a person who does not know the data stored in the ROM from reading the data stored in the ROM.

Furthermore, in the present invention, the case where the ROM is built-in has been described, but the FRO
A similar effect can be obtained in the case of a microcomputer with built-in M.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a ROM section according to an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional ROM section. 1... ROM for data storage, 2... RO that latches the ROM output immediately after entering the test state
M data latch circuit, 3... Coincidence detection circuit for detecting whether the output of the ROM data latch circuit 2 and the output of the input data latch circuit 4 match, 4...
- Input data latch circuit that latches an input data signal in response to a power-on signal, 5... Input circuit that takes in external input and outputs input data signal 12, 6...
...RO depends on whether the match detection circuit detects a match or not.
A control circuit that controls whether to output the value of the M data signal 11 or a fixed value, 7... An output circuit that outputs the output data signal 7 to the outside, 8... A microcomputer. Power-on signal that appears when the power is turned on, 9...
. . . Test signal that is “1” level when in test state, “0” level when not in test state, 10 . . . Coincidence signal that is the output of coincidence detection circuit 3, 11 .
ROM data signal, which is the output of ROMI, 12...
...Input data signal taken in from the outside by the input circuit 5,
13... Output data signal which is the output of the control circuit, 14... ROM storing data, 15...
. . . Output circuit that outputs the ROM data signal 17 to the outside, 16 . . . Test signal that is “1” level in the test state and “0” level when not in the test state,
17...ROM data signal which is the output of ROM14. Agent: Patent Attorney Otomo Uchihara /ffi

Claims (1)

[Claims] In a microcomputer that has a built-in ROM and can output ROM data to the outside during a test, there is an input data latch circuit that latches input data from the outside when the power is turned on, and an input data latch circuit that latches the output data of the ROM immediately after entering the test state. 1. A microcomputer comprising a ROM data latch circuit for outputting the output data of the ROM to the outside only when the output of the input data latch circuit and the output of the ROM data latch circuit match.