JPS61187120U

JPS61187120U -

Info

Publication number: JPS61187120U
Application number: JP6910185U
Authority: JP
Priority date: 1985-05-10
Filing date: 1985-05-10
Publication date: 1986-11-21
Also published as: JPH042501Y2

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例の構成を示す回路
図、第２図は同実施例の各部の波形を示す波形図
、第３図は従来の周波数／電圧変換回路の構成例
を示す回路図、第４図は同変換回路の各部の波形
を示す波形図、第５図はこの考案の実施例を説明
するためのブロツク図である。１……ゲート回路、９……ローパスフイルタ（
平滑手段）、１１……クロツク発生回路（クロツ
クパルス発生手段）、１２……同期パルス発生回
路、１３……同期パルス出力手段、１４……電子
スイツチ（第１の切換手段）、１５……電子スイ
ツチ（第１の切換手段）、１５……電子スイツチ
（第２の切換手段）、１６……ツエナーダイオー
ド、１７……差動増幅器、２０……回転方向判別
および同期パルス出力回路（同期パルス出力手段
）。 Figure 1 is a circuit diagram showing the configuration of an embodiment of this invention, Figure 2 is a waveform diagram showing waveforms of various parts of the same embodiment, and Figure 3 is a circuit diagram showing an example of the configuration of a conventional frequency/voltage conversion circuit. 4 is a waveform diagram showing the waveforms of each part of the conversion circuit, and FIG. 5 is a block diagram for explaining an embodiment of this invention. 1...Gate circuit, 9...Low pass filter (
11... Clock generation circuit (clock pulse generation means), 12... Synchronous pulse generation circuit, 13... Synchronous pulse output means, 14... Electronic switch (first switching means), 15... Electronic switch (first switching means), 15... Electronic switch (second switching means), 16... Zener diode, 17... Differential amplifier, 20... Rotation direction discrimination and synchronous pulse output circuit (synchronous pulse output means ).

Claims

[Claims for Utility Model Registration] A frequency/voltage conversion circuit that converts an input pulse signal into a DC voltage corresponding to the frequency of the pulse signal, comprising: (a) clock pulse generation means for generating clock pulses of a constant period; (b) ) synchronous pulse output means for outputting a synchronous pulse signal having a constant pulse width determined based on the clock pulse in synchronization with the input pulse signal from either the first or second output terminal; The first switch is controlled by the signal output from the first output terminal of the synchronization pulse output means.
(d) a second switch whose switching is controlled by a signal output from a second output terminal of the synchronization pulse output means;
(e) means for commonly supplying a constant voltage to one terminal of each of the first and second switching means and commonly supplying a ground potential to each other terminal; , differential amplifying means to which the signals obtained at each common terminal of the second switching means are supplied to the first and second input terminals, respectively; and (g) smoothing means to which the output of the differential amplifying means is supplied. A tail wave number/voltage conversion circuit comprising: and.