JPS6340191U - - Google Patents
Info
- Publication number
- JPS6340191U JPS6340191U JP13126686U JP13126686U JPS6340191U JP S6340191 U JPS6340191 U JP S6340191U JP 13126686 U JP13126686 U JP 13126686U JP 13126686 U JP13126686 U JP 13126686U JP S6340191 U JPS6340191 U JP S6340191U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- outputs
- clock pulse
- switching elements
- bridge circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 5
Description
第１図は本考案の１実施例を示す回路図、第２
図はその各部出力波形図である。第３図は従来の
この種のスイツチング回路の一例を示す回路図、
第４図はその各部出力波形図である。
１……直流電源、２，３，５，６……スイツチ
ング素子、４，７……直列回路、８……負荷、２
０……シフトレジスタ、２２……ＡＮＤ回路、２
４……ＮＯＲ回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing one embodiment of the present invention.
The figure shows the output waveform diagram of each part. FIG. 3 is a circuit diagram showing an example of a conventional switching circuit of this type.
FIG. 4 is a diagram showing the output waveforms of each part. 1... DC power supply, 2, 3, 5, 6... Switching element, 4, 7... Series circuit, 8... Load, 2
0...Shift register, 22...AND circuit, 2
4...NOR circuit.
Claims (1)
を矩形波制御信号に基いて交互にオン・オフして
負荷電流・電圧を制御するブリツジ回路において
、 前記矩形波入力信号をクロツクパルスに同期し
て読込みクロツクパルス間隔の時間差をもつて２
つのＱ１およびＱ２出力とするシフトレジスタと
、前記Ｑ１およびＱ２出力が入力されるＡＮＤ回
路およびＮＯＲ回路とを備え、前記ＡＮＤ回路お
よびＮＯＲ回路の出力によつて前記２つのスイツ
チング素子をそれぞれオン・オフ制御することを
特徴とするブリツジ回路のスイツチング素子保護
回路。[Claims for Utility Model Registration] In a bridge circuit that controls load current and voltage by alternately turning on and off two switching elements connected in series with a power supply based on a rectangular wave control signal, 2 with a time difference of the read clock pulse interval in synchronization with the clock pulse.
A shift register with two Q1 and Q2 outputs, and an AND circuit and a NOR circuit to which the Q1 and Q2 outputs are input, and the two switching elements are controlled by the outputs of the AND circuit and the NOR circuit. A bridge circuit switching element protection circuit characterized by on/off control.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986131266U JPH0746074Y2 (en) | 1986-08-29 | 1986-08-29 | Switching circuit protection circuit for bridge circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986131266U JPH0746074Y2 (en) | 1986-08-29 | 1986-08-29 | Switching circuit protection circuit for bridge circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6340191U true JPS6340191U (en) | 1988-03-15 |
| JPH0746074Y2 JPH0746074Y2 (en) | 1995-10-18 |
Family
ID=31029558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986131266U Expired - Lifetime JPH0746074Y2 (en) | 1986-08-29 | 1986-08-29 | Switching circuit protection circuit for bridge circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0746074Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57138877A (en) * | 1981-02-20 | 1982-08-27 | Hitachi Ltd | Da/ac inverter |
| JPS5996871A (en) * | 1982-11-19 | 1984-06-04 | Hitachi Ltd | Controller for inverter |
-
1986
- 1986-08-29 JP JP1986131266U patent/JPH0746074Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57138877A (en) * | 1981-02-20 | 1982-08-27 | Hitachi Ltd | Da/ac inverter |
| JPS5996871A (en) * | 1982-11-19 | 1984-06-04 | Hitachi Ltd | Controller for inverter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0746074Y2 (en) | 1995-10-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS59182747U (en) | interface circuit | |
| JPS6340191U (en) | ||
| JPS61126630U (en) | ||
| JPS61187120U (en) | ||
| JPS6419119U (en) | ||
| JPS6234800U (en) | ||
| JPS6247220U (en) | ||
| JPS63152319U (en) | ||
| JPH0278344U (en) | ||
| JPH03124774U (en) | ||
| JPS637995U (en) | ||
| JPS61123991U (en) | ||
| JPS5948136U (en) | Self-output selection type one-shot circuit | |
| JPS63160092U (en) | ||
| JPS61134135U (en) | ||
| JPS6383827U (en) | ||
| JPH0449873U (en) | ||
| JPS61149825U (en) | ||
| JPS6150217U (en) | ||
| JPH0384642U (en) | ||
| JPH02101283U (en) | ||
| JPH028230U (en) | ||
| JPH0344711U (en) | ||
| JPH0395917U (en) | ||
| JPS61195642U (en) |