JPS6247220U - - Google Patents

Info

Publication number
JPS6247220U
JPS6247220U JP13820085U JP13820085U JPS6247220U JP S6247220 U JPS6247220 U JP S6247220U JP 13820085 U JP13820085 U JP 13820085U JP 13820085 U JP13820085 U JP 13820085U JP S6247220 U JPS6247220 U JP S6247220U
Authority
JP
Japan
Prior art keywords
duty ratio
switching
pulse signal
signal
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13820085U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13820085U priority Critical patent/JPS6247220U/ja
Publication of JPS6247220U publication Critical patent/JPS6247220U/ja
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例の構成を示す回路
図、第2図は同実施例の回路各部の波形を示す波
形図、第3図は従来の利得制御回路の構成を示す
回路図である。 10……ローパスフイルタ、20……キヤリア
信号発生部(デユーテイ比制御手段)、21……
パルス幅変調部(デユーテイ比制御手段)、SW
1〜SW4……スイツチング素子(スイツチング
手段)。
Figure 1 is a circuit diagram showing the configuration of an embodiment of this invention, Figure 2 is a waveform diagram showing waveforms of various parts of the circuit of the same embodiment, and Figure 3 is a circuit diagram showing the configuration of a conventional gain control circuit. be. 10...Low pass filter, 20...Carrier signal generator (duty ratio control means), 21...
Pulse width modulation section (duty ratio control means), SW
1 to SW4...Switching element (switching means).

Claims (1)

【実用新案登録請求の範囲】 入力アナログ信号をパルス信号によつてスイツ
チングして出力するスイツチング手段と、 前記パルス信号のデユーテイ比を制御電圧に応
じて変化させるデユーテイ比制御手段と、 前記スイツチング手段の出力信号を復調するロ
ーパスフイルタ とを具備することを特徴とする利得制御回路。
[Claims for Utility Model Registration] Switching means for switching and outputting an input analog signal using a pulse signal; duty ratio control means for changing the duty ratio of the pulse signal in accordance with a control voltage; A gain control circuit comprising: a low-pass filter that demodulates an output signal.
JP13820085U 1985-09-10 1985-09-10 Pending JPS6247220U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13820085U JPS6247220U (en) 1985-09-10 1985-09-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13820085U JPS6247220U (en) 1985-09-10 1985-09-10

Publications (1)

Publication Number Publication Date
JPS6247220U true JPS6247220U (en) 1987-03-23

Family

ID=31042964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13820085U Pending JPS6247220U (en) 1985-09-10 1985-09-10

Country Status (1)

Country Link
JP (1) JPS6247220U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012217223A (en) * 2012-08-17 2012-11-08 Asahi Kasei Electronics Co Ltd Variable gain inverting amplifier circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5433506A (en) * 1977-06-01 1979-03-12 Procter & Gamble Detergent tablets
JPS5646327B2 (en) * 1972-11-29 1981-11-02

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5646327B2 (en) * 1972-11-29 1981-11-02
JPS5433506A (en) * 1977-06-01 1979-03-12 Procter & Gamble Detergent tablets

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012217223A (en) * 2012-08-17 2012-11-08 Asahi Kasei Electronics Co Ltd Variable gain inverting amplifier circuit

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