JPS6118364B2 - - Google Patents

Info

Publication number
JPS6118364B2
JPS6118364B2 JP15318177A JP15318177A JPS6118364B2 JP S6118364 B2 JPS6118364 B2 JP S6118364B2 JP 15318177 A JP15318177 A JP 15318177A JP 15318177 A JP15318177 A JP 15318177A JP S6118364 B2 JPS6118364 B2 JP S6118364B2
Authority
JP
Japan
Prior art keywords
circuit
oscillation
output
schmitt
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15318177A
Other languages
Japanese (ja)
Other versions
JPS5484959A (en
Inventor
Toshio Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP15318177A priority Critical patent/JPS5484959A/en
Publication of JPS5484959A publication Critical patent/JPS5484959A/en
Publication of JPS6118364B2 publication Critical patent/JPS6118364B2/ja
Granted legal-status Critical Current

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  • Oscillators With Electromechanical Resonators (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Description

【発明の詳細な説明】 本発明は信号発生回路、特に水晶等の圧電体を
利用する発振回路を用いた信号発生回路に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal generation circuit, and particularly to a signal generation circuit using an oscillation circuit that utilizes a piezoelectric material such as a crystal.

電子式時計等の装置では時間の基準を得る為に
水晶あるいはセラミツク圧電体を用いた周波数精
度の高い発振器を使用するのが一般的である。第
1図は代表的な水晶発振回路でありn導電型
MOSFET1とP導電型MOSFET2による相補型
MOSインバーターを用いている。インバーター
の動作点を定める為の帰還用抵抗3は通常数+M
Ωの高い値を用いる。水晶振動動子4は発振周波
数を規定するために設けられ、コンデンサ5,6
と共にインバーターの帰還回路を構成する。この
様な構成からなる発振回路では発振周波数は水晶
振動子4の機械的寸法でほとんど決定される為、
非常に精度の高い発振周波数が得られる。しかし
ながらこのような圧電機械振動子(以下圧電振動
体と記す)を用いた発振回路は電源電圧(−V)
印加時における発振波形の立上りが非常に遅いの
が通例である。特に電源電圧が低い場合には電源
電圧を印加してから定常の発振振巾が得られるま
でに1分以上の時間を要することがある。第2図
は発振開始時のインバーター出力点10の波形を
表わしたもので定常状態に安定するには相当の時
間が必要であることがわかる。第2図の波形は非
常に条件の悪い場合であるが好ましい発振条件下
においても所定の発振振巾を得るのに数十ミリ秒
を要する。さらに所定の振巾に達しない期間、つ
まり発振開始直後は水晶振動子固有の周波数の高
調波成分の非常に高い周波数あるいは逆に水晶と
は無関係に非常に抵い周波数で発振を始めている
事がある。このような圧電振動体を用いた発振回
路を装置に組込み、この発振器の出力波形を装置
の基準クロツクパルスとして用いた場合、電源電
圧印加当初は装置全体が非常に不安定な状態で動
作する事になる。分周回路を用いて単に時間表示
をする時計のような装置においては定常発振に至
つてから使用すれば特に問題なならないが、近年
の傾向である各種の計算機や制御装置に圧電振動
体を用いた発振器を用いた場合に大きな問題が発
生する。計算機では電源電圧印加時に装置全体を
自動的に一定の初期状態に設定する、いわゆるオ
ートクリアー機能を有している。これは電源電圧
の印加を検出して後各種のハードウエアの初期設
定を行ないかつ一定のソフトウエア処理を経て装
置全体を一定の初期状態に設定する。この場合ハ
ードウエアを構成する各部の電気的特性が完全に
均一であれば、発振波形が一定の振巾、周波数に
達した時、装置全体が同時に作動し始めるが、そ
れ以外の場合には動作範囲の広い部分から作動し
始め、装置全体が動作可能な状態になつた時には
すでに間違つた手順で初期設定されているという
問題が生ずる。
In devices such as electronic watches, it is common to use an oscillator with high frequency accuracy using a crystal or ceramic piezoelectric material to obtain a time reference. Figure 1 shows a typical crystal oscillator circuit of n-conductivity type.
Complementary type with MOSFET1 and P conductivity type MOSFET2
It uses a MOS inverter. The number of feedback resistors 3 to determine the operating point of the inverter is usually +M
Use a high value of Ω. A crystal oscillator 4 is provided to define the oscillation frequency, and capacitors 5 and 6
Together with this, they form the feedback circuit of the inverter. In an oscillation circuit with such a configuration, the oscillation frequency is mostly determined by the mechanical dimensions of the crystal resonator 4, so
A highly accurate oscillation frequency can be obtained. However, an oscillation circuit using such a piezoelectric mechanical vibrator (hereinafter referred to as a piezoelectric vibrator) has a power supply voltage (-V).
Typically, the rise of the oscillation waveform during application is very slow. Particularly when the power supply voltage is low, it may take one minute or more after the power supply voltage is applied until a steady oscillation width is obtained. FIG. 2 shows the waveform at the inverter output point 10 at the start of oscillation, and it can be seen that it takes a considerable amount of time to stabilize to a steady state. Although the waveform in FIG. 2 is under very poor conditions, it takes several tens of milliseconds to obtain a predetermined oscillation width even under favorable oscillation conditions. Furthermore, during the period when the predetermined amplitude is not reached, that is, immediately after the start of oscillation, oscillation may start at a very high frequency of the harmonic component of the frequency specific to the crystal, or conversely, at a very difficult frequency independent of the crystal. be. If an oscillation circuit using such a piezoelectric vibrator is built into a device and the output waveform of this oscillator is used as the device's reference clock pulse, the entire device will operate in a very unstable state when the power supply voltage is first applied. Become. In devices such as watches that simply display time using a frequency dividing circuit, there is no particular problem if used after steady oscillation has been achieved, but there has been a trend in recent years to use piezoelectric vibrators in various computers and control devices. A major problem arises when using an oscillator that is Computers have a so-called auto-clear function that automatically sets the entire device to a certain initial state when a power supply voltage is applied. After detecting the application of the power supply voltage, various hardware is initialized and the entire device is set to a certain initial state through certain software processing. In this case, if the electrical characteristics of each part of the hardware are completely uniform, the entire device will start operating at the same time when the oscillation waveform reaches a certain amplitude and frequency, but otherwise it will not work. The problem arises that when a wide range is started and the entire device is ready for operation, it has already been initialized in an incorrect manner.

本発明の目的は電源印加時の不安定な発振波形
を禁止し、装置を安定に動作させる信号発生回路
を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a signal generation circuit that prevents unstable oscillation waveforms when power is applied and allows a device to operate stably.

本発明による信号発生回路は圧電振動体を含む
発振回路の出力をシユミツト回路を介して取り出
すように、発振回路に電圧を印加した直後の微小
振巾波形をシユミツト回路の履歴特性によつて取
除き一定の振巾に達した波形のみ演算処理装置等
に供給することを特徴とする。
The signal generation circuit according to the present invention removes the minute amplitude waveform immediately after applying voltage to the oscillation circuit using the history characteristics of the Schmitt circuit so that the output of the oscillation circuit including the piezoelectric vibrator is extracted through the Schmitt circuit. It is characterized in that only waveforms that have reached a certain amplitude are supplied to an arithmetic processing device or the like.

以下本発明の一実施例を第3図乃至第5図を用
いて説明する。
An embodiment of the present invention will be described below with reference to FIGS. 3 to 5.

第3図は本発明の構成をブロツク図で表わした
もので11の発振回路11は第1図と同等の構成
であり、この出力はシユミツト回路12の入力に
接続されている。シユミツト回路12の出力は演
算処理装置13に供給される。第4図aは第3図
のシユミツト回路12の構成例であり2つの抵抗
RIおよびRoの抵抗比により履歴特性が決定でき
る。直列に接続されたインバータ16,17は相
補型MOS構成によるインバーターで抵抗Roを介
して帰還ループが形成される。インバーター16
の入力反転レベルが電源電圧−Vの1/2とする
と、インバーター16,17および抵抗Roから
なるループはインバーター16の入力電圧Viが
−V/2を通過する毎に逆極性に反転する。Viは入
力Vrと出力Voの抵抗分割により得られるレベル
でありインバーター17の出力インピーダンスが
十分小さければvi=(ROI+RiVO)/(RI
O)で与えられる。例えばRI:RO=1:3の
場合には出力VoをOVから−Vに反転させる為に
は入力Viに−2/3Vの入力レベルや必要であり出
力Voを−VからOVに反転させる為には入力Vrを
−1/3Vにする必要がある。この様子は第4図の
bに表わされている。このような構成からなる信
号発生器の動作特性を第5図に示す。第5図t0
電源電圧−Vが印加された場合発振器11の出
力、つまりシユミツト回路12の入力Vrは中間
レベルから微小振巾で発振を開始する。シユミツ
ト回路12の履歴特性上の2つの入力レベルを
Vi1,Vi2とした時、発振入力ViがVr1とVr2の中間
にあるt0〜t1期間にはシユミツト回路12の出力
は反転せず発振出力が十分大きくなり、周波数も
出規の値に近くなるt1の期間から始めてシユミツ
ト回路の出力Voに波形が現われる。このように
電源印加直後の不安定発振期間の出力をシユミツ
ト回路12を用いて禁止する事により確実な発振
波形だけ選択的に演算処理装置等に供給する為演
算処理装置は電源印加直後にも正しく動作させる
事が可能になる。本発明の実施例においては第4
図aの回路でシユミツト回路を代表させた当然履
歴特性を有する他の構成回路を用いても同等の成
果が得られる事は云うまでもない。また発振回路
の圧電振動体は水晶に限らないし、回路構成は何
ら実施例に限定されるものではない。
FIG. 3 is a block diagram showing the configuration of the present invention. Eleven oscillation circuits 11 have the same configuration as in FIG. 1, and the output thereof is connected to the input of the Schmitt circuit 12. The output of the Schmitt circuit 12 is supplied to an arithmetic processing unit 13. Figure 4a shows an example of the configuration of the Schmitts circuit 12 in Figure 3, which includes two resistors.
The history characteristics can be determined by the resistance ratio of RI and Ro. Inverters 16 and 17 connected in series are inverters having a complementary MOS configuration, and a feedback loop is formed via a resistor Ro. Inverter 16
If the input inversion level is 1/2 of the power supply voltage -V, the loop consisting of inverters 16, 17 and the resistor Ro is inverted to the opposite polarity every time the input voltage Vi of the inverter 16 passes -V/2. Vi is a level obtained by resistor division of input Vr and output Vo, and if the output impedance of inverter 17 is sufficiently small, vi = (R O V I + RiV O ) / (R I +
R O ). For example, in the case of R I : R O = 1:3, in order to invert the output Vo from OV to -V, the input level of -2/3V is required for the input Vi, and the output Vo is inverted from -V to OV. In order to do so, it is necessary to set the input Vr to -1/3V. This situation is shown in FIG. 4b. FIG. 5 shows the operating characteristics of a signal generator having such a configuration. When the power supply voltage -V is applied at t0 in FIG. 5, the output of the oscillator 11, that is, the input Vr of the Schmitt circuit 12 starts oscillating from an intermediate level with a minute amplitude. The two input levels on the history characteristics of the Schmitt circuit 12 are
When Vi 1 and Vi 2 are set, during the period t 0 to t 1 when the oscillation input Vi is between Vr 1 and Vr 2 , the output of the Schmitt circuit 12 is not inverted and the oscillation output becomes sufficiently large, and the frequency also becomes normal. A waveform appears at the output Vo of the Schmidt circuit starting from the period t 1 when it approaches the value of . In this way, by inhibiting the output during the unstable oscillation period immediately after power is applied using the Schmitt circuit 12, only reliable oscillation waveforms are selectively supplied to the processing unit, so that the processing unit can operate correctly even immediately after power is applied. It becomes possible to make it work. In the embodiment of the present invention, the fourth
It goes without saying that the same results can be obtained by using other component circuits that naturally have hysteresis characteristics, such as the Schmitt circuit represented by the circuit shown in FIG. Further, the piezoelectric vibrating body of the oscillation circuit is not limited to crystal, and the circuit configuration is not limited to the embodiments.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は水晶発振回路を示す回路図、第2図は
第1図発振回路の電源印加直後の動作波形を示す
図、第3図は本発明の実施例による信号発生回路
を示すブロツク図であり、第4図aはシユミツト
回路の1例を示す回路図であり第4図bはその履
歴特性を示す図である。第5図は本発明の実施例
の信号出力波形を説明する図である。 1,2……MOSFET、4……水晶振動子、1
1……発振回路、12……シユミツト回路、13
……演算処理装置。
FIG. 1 is a circuit diagram showing a crystal oscillation circuit, FIG. 2 is a diagram showing operating waveforms of the oscillation circuit shown in FIG. 1 immediately after power is applied, and FIG. 3 is a block diagram showing a signal generation circuit according to an embodiment of the present invention. FIG. 4a is a circuit diagram showing an example of a Schmitt circuit, and FIG. 4b is a diagram showing its history characteristics. FIG. 5 is a diagram illustrating the signal output waveform of the embodiment of the present invention. 1, 2...MOSFET, 4...Crystal resonator, 1
1...Oscillation circuit, 12...Schmitt circuit, 13
...Arithmetic processing unit.

Claims (1)

【特許請求の範囲】[Claims] 1 圧電体を共振を利用した発信回路と所定の履
歴特性を有するシユミツト回路とを含み、該発信
回路の出力を該シユミツト回路を介して信号出力
として取り出すことにより、前記発信回路の発振
開始時における微小振巾パルスが信号出力に出な
いようにしたことを特徴とする信号発生回路。
1. The piezoelectric body includes an oscillation circuit that utilizes resonance and a Schmitt circuit having predetermined history characteristics, and the output of the oscillation circuit is taken out as a signal output via the Schmitt circuit, so that when the oscillation of the oscillation circuit starts, A signal generation circuit characterized in that minute amplitude pulses are prevented from appearing in the signal output.
JP15318177A 1977-12-19 1977-12-19 Signal generation circuit Granted JPS5484959A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15318177A JPS5484959A (en) 1977-12-19 1977-12-19 Signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15318177A JPS5484959A (en) 1977-12-19 1977-12-19 Signal generation circuit

Publications (2)

Publication Number Publication Date
JPS5484959A JPS5484959A (en) 1979-07-06
JPS6118364B2 true JPS6118364B2 (en) 1986-05-12

Family

ID=15556808

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15318177A Granted JPS5484959A (en) 1977-12-19 1977-12-19 Signal generation circuit

Country Status (1)

Country Link
JP (1) JPS5484959A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6367822A (en) * 1986-09-09 1988-03-26 Nec Corp Oscillator
JPH0821815B2 (en) * 1986-12-22 1996-03-04 松下電子工業株式会社 Signal generator

Also Published As

Publication number Publication date
JPS5484959A (en) 1979-07-06

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