JPS6143274Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to frequency adjustment of a timekeeping unit signal of an electronic timepiece, which can be adjusted by electrical operating means.

2. Description of the Related Art Conventionally, it has been known to use individual parts to construct an electronic circuit of an electronic timepiece, and this has already been widely practiced. In addition, with the recent development of ICs, circuit blocks consisting of individual parts have become integrated into ICs, and although electronic watches are also constructed from ICs and individual parts,
If you try to configure it with only ICs, some of the parts will be
It became impossible to use an IC, and it was difficult to match the frequency.

Conventionally, the crystal oscillation frequency of a crystal clock has been determined to be a frequency whose period is the time unit time measured by the timekeeping device divided by the frequency division number of the cascade-connected binary counter. The oscillation frequency of the crystal is tuned by an oscillation circuit up to f/Q (f: resonance frequency of the focused mode of the crystal, Q: sharpness of resonance), and beyond that it is done by mechanical adjustment of the crystal resonator. It was done.

Against this backdrop, the prevailing basic idea was that the divider took up a large proportion of the inside of a clock, both in terms of volume and power, and that this proportion should be kept as small as possible.

In recent years, with the advent of integrated circuits (ICs), the design policy for clocks has changed dramatically from that of traditional crystal watches. In other words, against the backdrop of lower cost, lower power consumption, and smaller volume of electrical components, we aim to place as much load on electrical circuits as possible in order to realize lower cost, lower power consumption, and smaller volume of watches. It is. From this point of view, it is more advantageous to process the process for frequency tuning of the crystal resonator on the circuit side. In other words, as long as the cycle of a stable clock timekeeping unit is created, there is no need to fine-tune the frequency of the crystal oscillator itself, and as a result, the cost of electrical tuning is lower than the cost of tuning during crystal processing. Therefore, it is better to perform the adjustment electrically. In other words, electrical tuning is extremely easy to automate, and there is no change in crystal characteristics for tuning, and the frequency after tuning is also extremely stable.

The purpose of the present invention is to provide a frequency adjustment circuit that uses integrated circuit technology to enable the frequency of a timekeeping simplex signal to be adjusted by electrical operation means instead of the conventional mechanical operation means. The objective is to obtain an electronic clock.

Embodiments of the present invention will be described below based on the drawings.

1 is a time reference oscillator such as a crystal oscillator, a tuning fork, a tone piece, a Tianfu, etc., 2 is an oscillation circuit for sustaining the vibration of the time reference oscillator, and 3 is a component for dividing the frequency of the time reference signal of the oscillation circuit. 4 is a clock circuit for converting the output from the frequency dividing circuit into a clock signal; 5 is a display logic for applying the signal from the clock circuit to the drive circuit 6 connected to the segment to be lit on the display device 8; 7 is a control circuit for controlling each of the circuits by giving necessary signals to them by means of an external operating mechanism 9; 10 is a power source; and 11 is a circuit section formed into a monolithic IC.

Next, the effect will be explained.

Figure 2 shows an example of the oscillation circuit, frequency divider circuit, and control circuit that are part of the monolithic IC circuit 11 used in the present invention, including the coupling capacitor C _C and high resistance R of the oscillation circuit 2. Since both ends of _N and bias resistor R _B are also TC, they are not exposed to the air, improving moisture resistance and improving frequency stability. In addition, in order to enable frequency matching even after converting the circuit into a monolithic IC, the output signal 21 from the frequency dividing circuit 3 and the operation signal 23 of the external operation section 22 having a switch circuit with a memory function are transferred to the control circuit 7. The frequency control signal 24 controlled by the control circuit is input to a frequency addition gate circuit 25 consisting of an exclusive OR circuit. (or a frequency that is an integer multiple thereof). That is, the control circuit 7 is a circuit that sends a frequency control signal 24 that allows the frequency addition gate circuit 25 to obtain the originally required frequency. The frequency addition gate circuit 25 outputs the exclusive OR of the output signal 20 of the oscillation circuit 2 and the frequency control signal 24. If frequency control signal 24
When the signal level does not change, the output of the frequency addition gate circuit 25 has the same frequency as the output signal 20 of the oscillation circuit. Every time the signal level of the frequency control signal 24 changes from 1 to 0 or from 0 to 1, the signal level of the output of the frequency addition gate circuit 25 is inverted.

Therefore, the number of signal inversions of the output of the frequency addition gate circuit 25 is the sum of the number of inversions of the output signal 20 of the oscillation circuit 2 and the number of inversions of the frequency control signal 24. It is highly unlikely that the two inputs of the frequency addition gate circuit 25 are inverted at the same time, and it is possible to prevent them from being inverted at the same time if the circuit is designed in consideration of the delay time. In this manner, the frequency addition gate circuit 25 adds the output signal 20 of the oscillation circuit 2 and the frequency control signal 24. In addition,
In the drawing, the frequency addition gate circuit 25 is the oscillation circuit 2.
Although it is provided immediately after the frequency dividing circuit, it may also be provided between the frequency dividing circuits.

Therefore, by applying an operation signal to the terminal of the external operation section 22, the frequency can be tuned at a preset frequency division ratio. Even if an inverter is further added to the output of the frequency addition gate to invert the signal, the frequency does not change. Figure 3 shows the switch circuit of the external operation unit 22 using a monolithic IC.
In this embodiment, if the circuit configuration is as shown in FIG. 3b or c, the number of contacts in the contact section 31 can be reduced, and since the resistor r is also integrated circuit, it is not exposed to the outside air, so humidity can be reduced. It is also less affected by A pulse B shown in FIG. 3a is applied to the terminal φ of the D-type flip-flop 33 shown in FIG. 3b, and a pulse A having a pulse width τ and a period T shown in FIG. 3a is applied to the terminal D. , τ/T〓1/n, equivalently, the resistance r becomes nr. That is, in order to reduce the number of switch contacts in a timepiece circuit, the input terminal is connected to the positive or negative side of the power supply via a resistor r.
In this case, the resistor r was made into an IC, but simply using a resistor would consume a lot of power in the resistor r.
If the resistance value is increased, the moisture resistance and noise resistance deteriorate, so as a countermeasure, the time for applying voltage to the resistor r is made very short (A pulse), resulting in low power consumption that is close to 1/1000 of that of continuous voltage application. It is possible to achieve low power and low input impedance. FIG. 3c shows another embodiment of a switch circuit similar to FIG. 3b.

As mentioned above, we have devised the oscillation circuit, frequency divider circuit, input circuit, etc. to create a complementary MOS circuit (C-
Since frequency adjustment is performed by forming a logic circuit using MOS (MOS), there is no need for capacitors or resistors for external operation.

[Brief explanation of drawings]

The drawings show one embodiment of the electronic timepiece of the present invention, and FIG. 1 is a block diagram of the timepiece system, and FIG. 2 is a wiring diagram of the oscillation circuit and frequency division circuit, which is part of a monolithic IC circuit. FIG. 3 is a circuit diagram showing an embodiment in which the external operation section switch circuit is formed into a monolithic IC. 1... Time reference oscillator, 2... Oscillation circuit, 3...
...Frequency dividing circuit, 7... Control circuit, 21... Output signal from the frequency dividing circuit, 8... Display device, 22... External operating section, 23... Operation signal of external operating section, 24...
...Frequency control signal, 25...Frequency addition gate circuit.

Claims (1)

[Scope of utility model registration request] an oscillation circuit for sustaining the vibration of a time reference oscillator, a frequency dividing circuit connected to the output end of the oscillation circuit and generating a time measurement unit signal, a time measurement circuit connected to the frequency division circuit and counting the time measurement unit signal; a display mechanism that displays time information held in the time measurement circuit;
In an electronic timepiece comprising an external operating section and an electrical energy source, an exclusive logic circuit is provided between the frequency dividing circuit and a control circuit that generates a frequency control signal connected to the external operating section, the oscillation circuit and the timekeeping circuit. A frequency addition gate circuit consisting of a sum circuit is provided, and the control circuit is controlled by the operation signal of the external operation unit and the output signal from the frequency dividing circuit to create a frequency control signal, and the frequency control signal is added to the frequency addition gate circuit. An electronic clock characterized by adjusting the frequency by applying voltage to a gate circuit.