JP3288830B2 - Oscillation integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit for oscillation which is used by attaching a piezoelectric vibrator externally.

[0002]

2. Description of the Related Art As shown in FIG. 5, an oscillation circuit used as a reference clock generation source in a clock or the like includes a CMOS inverter 51, a feedback resistor 52 connected in parallel with the CMOS inverter 51, a piezoelectric vibrator, and the like. For example, the crystal oscillator 53 and the input terminal i of the CMOS inverter 51
n and the load capacitance 5 connected to each of the output terminals out
4 Such an oscillator circuit is generally a CMOS
A load capacitance is externally connected to an oscillation integrated circuit in which the inverter 51 and the output buffer are integrated, and a crystal oscillator and a feedback resistor are externally connected to the CMOS inverter 51.

At present, there is an integrated circuit for oscillation in which a load capacity is integrated on one chip together with a CMOS inverter. For example, JP-A-5-191145 discloses that
As shown in FIG. 6, a field insulating layer 62 is formed on a silicon substrate 61, a metal layer 63 serving as a lower electrode of a load capacitor is formed thereon, and a dielectric layer 64 is formed thereon.
A structure in which a second metal layer 65 serving as an upper electrode of a load capacitor is formed thereon to provide a load capacitor is disclosed. In FIG. 6, reference numeral 66 denotes an interlayer insulating layer, and reference numeral 67 denotes an extraction electrode of a lower electrode.

[0004]

In the integrated load capacitance, it is difficult to control the thickness of the dielectric layer 64 accurately in the manufacturing process, and the thickness of the dielectric layer 64 varies. Would. Capacitance measurement is indispensable to obtain a constant oscillation frequency, but an operation test was performed by attaching a piezoelectric vibrator such as a crystal vibrator to the input and output terminals of a CMOS inverter and actually oscillating. . In this case, the integrated circuit cannot be checked until the product is actually manufactured with an externally attached crystal resonator, which is one of the factors that lowers the production efficiency.

Therefore, an object of the present invention is to make it possible to easily measure the load capacitance before externally attaching a piezoelectric vibrator to an oscillation integrated circuit.

[0006]

SUMMARY OF THE INVENTION A CMOS inverter;
The CMOS inverter includes an oscillating unit including a load capacitor connected to each of an input terminal and an output terminal of the CMOS inverter, and an oscillation device in which a piezoelectric vibrator is externally connected between the input terminal and the output terminal of the CMOS inverter. In the integrated circuit for test, a test terminal set to a desired potential level at the time of testing, a switching element operable by setting the test terminal to a desired potential level, and an oscillating operation at the time of testing, at least the switching element CM above
A ring oscillator constituted by using an OS inverter is provided, an output terminal of the ring oscillator is shared with an output terminal of the oscillation section, and the test terminal is connected to a desired potential level.
And set the above switching element to be operable.
Oscillate the ring oscillator and output from the output terminal.
The above object is achieved by measuring the value of the load capacitance from the input oscillation output .

Further, it is preferable that the switching element comprises a clocked inverter.

[0008]

Next, an embodiment of the present invention will be described. FIG. 1 is an electric circuit diagram showing the configuration of the present example. In FIG. 1, reference numeral 1 denotes a CMOS inverter. Reference numeral 2 denotes a load capacitance connected to each of the input terminal IN and the output terminal OUT of the CMOS inverter 1. The load capacitance 2 may use the one shown in FIG. 6 or may use the gate capacitance of a MOS transistor. The oscillation unit 3 is constituted by the CMOS inverter 1 and the load capacitance 2. Reference numeral 4 denotes a crystal resonator as a piezoelectric resonator, which is externally connected between the input terminal IN and the output terminal OUT of the CMOS inverter 1 so as to connect both ends. Reference numeral 5 denotes a clocked inverter as a switching element, and reference numerals 6, 7, and 8 denote inverters. The clocked inverter 5 is turned on when the state of the test terminal T is “H”, and forms a ring oscillator 9 together with the CMOS inverter 1 and the inverter 6. The inverter 7 receives the oscillation output of the oscillating unit 3 or the oscillation output of the ring oscillator 9 and outputs them from the oscillation output terminal Q. The inverter 8 is used for switching the clocked inverter 9.

The above circuit configuration is the same as that of the first embodiment except for the quartz oscillator 4.
It is integrated on a chip.

Next, the operation of this embodiment will be described with reference to FIG. 1 and a waveform diagram of FIG. 2 showing waveforms at each terminal of FIG. In this example, the load capacitance 2 is measured by causing the ring oscillator 9 to perform CR oscillation in a state where the crystal resonator 4 is not externally attached. First, an operation during a test for measuring the load capacitance 2 is performed. Will be described.

When the state of the test terminal T is set to "H", the clocked inverter 5 is turned on, and a ring oscillator 9 composed of the CMOS inverter 1, the load capacitance 2, the clocked inverter 5, and the inverter 6 is formed. ,
Start CR oscillation. At this time, each terminal VA, VB, V
C has waveforms such as VA, VB, and VC shown in FIG. The level of the pulse at the terminal VA is inverted via the inverter 7 and output from the oscillation output terminal Q. The time constant of CR oscillation is measured from the period of the waveform appearing at the oscillation output terminal Q.

The time constant of CR oscillation is determined by the CR oscillation cycle and CM
The specified inversion potential Vth of the OS inverter 1, the clocked inverter 5, and the inverters 6 and 7 is specified. The inversion potential Vth is measured as follows. The clocked inverter 1 and the inverters 6 and 7 have the same configuration as the CMOS inverter 1 (having the same characteristics because of the same manufacturing process), and as shown in FIG.
This is obtained by short-circuiting the input terminal IN and the output terminal OUT of the inverter 1 and measuring the voltage between the short-circuit point and the VSS terminal of the oscillation integrated circuit IC of this embodiment.

The resistance component related to the CR time constant is:
It is determined by the on-resistance of each CMOS inverter 1, clocked inverter 5, and inverters 6 and 7. This on-resistance short-circuits the input terminal IN of the CMOS inverter 1 to the VDD terminal of the oscillation integrated circuit IC, as shown in FIG. 3B, and sets the voltage between the output terminal OUT and the VSS terminal of the oscillation integrated circuit IC. And by measuring the current.

The oscillation frequency obtained as described above, V
The capacitance of the load capacitance 2 is specified from th and the resistance, and this is set as a measured value.

Next, a case in which a crystal resonator is externally attached and commercialized will be described. First, the crystal unit 4 is externally attached to the oscillation unit 3. Here, when the state of the test terminal is fixed at "L", the clocked inverter 5 is turned off, whereby the ring oscillator 9 is cut off and no CR oscillation is performed. When the oscillating unit 3 starts oscillating, this output is output from the oscillation output terminal Q via the inverters 6 and 7.

As described above, in this embodiment, the CMOS of the oscillation unit 3 is used.
A ring oscillator 3 is constituted by using the inverter 1 and selectively oscillated by a CR to be output from an oscillation output terminal OUT. In order to measure the capacity of the load capacitor 2 based on the oscillation frequency, a crystal oscillator is provided in the oscillation integrated circuit. Before the external component is attached, the load capacitance on the substrate can be measured. For this reason,
The quality of the IC can be determined by itself, and the wasteful determination of the defect after the external attachment of the crystal unit can be eliminated, and the production efficiency can be improved. In this example, it is not necessary to newly provide an output terminal for the ring oscillator 9,
The cost increase can be suppressed.

The configuration of the ring oscillator 9 using the CMOS inverter 1 of the oscillating unit 3 is not limited to the one shown in the above-described embodiment, but can be variously changed. For example, as shown in FIG. 4A, in the configuration of FIG.
A resistor R may be provided on the output terminal side of the OS inverter 1 and the output terminal side of the clocked inverter 9. Such a resistor R can be provided on the substrate with high precision, and the resistor R
Is set to a value that is so large that the on-resistance of each inverter can be neglected, the measurement accuracy of the load capacitance can be improved without measuring the on-resistance of each inverter.

Further, the configuration may be as shown in FIG. 4B. In FIG. 1, reference numeral 10 denotes a clocked inverter 10, and reference numeral 11 denotes a NAND gate. Other signs are
The same components as those shown by the reference numerals in FIG. 1 are shown. Here, a CMOS inverter 1, a clocked inverter 10
Oscillator 1 comprising AND and NAND gate 11
Constituting No. 2. Here, when the state of the test terminal T is set to “H”, the clocked inverter 10 is turned on. At the same time, the NAND gate 11 operates as an inverter since one of its input terminals is connected to the test terminal T, and the ring oscillator 12 starts CR oscillation.
This oscillation output is output from an oscillation output terminal Q via inverters 6 and 7. Therefore, even if the configuration of the ring oscillator is changed as shown in FIG. 4B, the same operation and effect as those of the above-described embodiment can be obtained.

In each of the above embodiments, a quartz oscillator is used as the piezoelectric oscillator. However, the present invention is not limited to this. For example, a ceramic oscillator such as a PZT type or a PbTiO ₃ type may be used. Good.

[0020]

According to the present invention , a test terminal can be used during a test.
Set to the desired potential level and operate the switching element
Enabled, and the switching element and the CMOS
Vibration generated by ring oscillator composed of inverter
And output the oscillation output to the outside from the output terminal.
Before externally attaching the piezoelectric vibrator to the oscillation integrated circuit, it is possible to easily measure the load capacitance in the integrated circuit.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram showing a configuration of one embodiment of the present invention.

FIG. 2 is a waveform chart showing the operation of FIG.

FIG. 3 is an explanatory diagram showing a method for measuring a CR time constant of CR oscillation, a resistance component thereof, and the like.

FIG. 4 is an explanatory diagram showing the configuration of another embodiment.

FIG. 5 is an electric circuit diagram showing a configuration of a conventional oscillation circuit.

FIG. 6 is an explanatory diagram showing a configuration of a load capacitance.

[Explanation of symbols]

 Reference Signs List 1 CMOS inverter IN input terminal OUT output terminal 2 load capacitance 3 oscillator 4 crystal oscillator (piezoelectric oscillator) 5 clocked inverter (switching element) 9 ring oscillator T test terminal Q oscillation output terminal (output terminal)

Claims (2)

(57) [Claims] An oscillator comprising a CMOS inverter and a load capacitor connected to an input terminal and an output terminal of the CMOS inverter, respectively, and a piezoelectric vibrator is provided between the input terminal and the output terminal of the CMOS inverter. A oscillating integrated circuit that is used with an external device, a test terminal that is set to a desired potential level during a test, a switching element that is operable by setting the test terminal to a desired potential level, An oscillation operation is performed during a test, at least a ring oscillator configured using the switching element and the CMOS inverter is provided, an output terminal of the ring oscillator is shared with an output terminal of the oscillation unit, and the test terminal is connected to a desired terminal. Set to the potential level and
Enabling the ring oscillator
Oscillates and rises from the oscillation output output from the above output terminal.
A method for measuring an integrated circuit for oscillation, comprising measuring a value of the load capacitance . Wherein said switching element, the measurement method of the oscillation integrated circuit according to claim 1, comprising the clocked inverter.