JPS6118340B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an interlayer insulating film on an electrode and a gate insulating film on a channel region in a semiconductor device, and more specifically, a method for simultaneously forming insulating films having different thicknesses. It is. In particular, by applying the present invention, it is possible to increase the withstand voltage of a semiconductor device and reduce the capacitance between wirings.

FIG. 1 shows an embodiment of the present invention. For convenience of explanation, silicon is used as the substrate. As shown in FIG. 1a, a field insulating film 2 typified by a thermally oxidized SiO ₂ film is formed over the entire surface of a silicon substrate 1 of a first conductivity type. Thereafter, the field insulating film in the element region 3 where the transistor is to be formed is removed by etching using a well-known photolithography method. At this time, you will need your first photomask. Furthermore, a gate insulating film 2-1, typically made of SiO ₂ , is formed to cover the device region, and a gate electrode 4, typically made of polycrystalline silicon, is deposited to cover the entire device area, and the gate electrode 4 is then deposited using known photolithography. Electrode section 4
Leave the remaining and remove the others. Here, a second photomask is used. At this time, it is possible to leave it not only on the gate portion but also on the field oxide film 2 and use it as another electrode.

After that, using the gate 4 as a mask, the gate insulating film 2 is
-1 is removed by etching and then oxidized in _O2 containing water vapor, an insulating film _2-2 of SiO2 is formed on the silicon substrate 1 as shown in b.
A gate protective film 6 of SiO ₂ is formed on the polycrystalline silicon 4.
is formed. If a high concentration of phosphorus is added to the gate electrode in advance, the gate protective film 6 is formed thicker than the insulating film 2-2. The impurity concentration is 10 ¹⁸ /cm ³ or more, more preferably 10 ²⁰ /cm ³ or more. For example, if the above oxidation is carried out at 700°C for 7 hours, a 2800 Å thick SiO ₂ film 6 will be formed on the gate polycrystalline Si.
However, a 500 Å SiO ₂ film can be grown on the substrate.

After that, heat treatment was performed at 1000℃ for 10 minutes in dry oxygen to improve the Si-SiO ₂ interface.
The SiO ₂ film thickness is 600 Å.

By applying this method, the layer on the electrode and the gate insulating film on the channel region can be formed simultaneously, resulting in a structure with low capacitance between the first and second polycrystalline Si layers and a high breakdown voltage. I can do it. For example, experiments have shown that a breakdown voltage of 40V or more has been achieved.

Thereafter, as shown in c, the second polycrystalline Si8
Then, using photolithography, some parts are left and the others are removed. At this time, a third photomask is required. If polycrystalline silicon is used for the electrode 8 at this time, the second conductivity type region 9 can be formed by adding an impurity to the polycrystalline silicon or by adding an impurity from above the polycrystalline silicon. Further, before depositing the electrode 8, the region 9 can be formed in advance by a known thermal diffusion method or ion implantation method. In the present invention, either is possible.

Further thereafter, as shown in d, contact holes 11 are formed, and finally metal wiring 10 is formed. Here, fourth and fifth photomasks are required.

The structure shown in Figure 1 is polycrystalline.
The inversion layer on the Si surface directly under Si4 is used as a storage electrode, and polycrystalline
The Si surface directly under Si8 is the transfer electrode, and 9 is the data line 1.
Although a memory cell with 0 as a word line is formed, the gist of the present invention is to have two diffusion layers for other elements, such as a source and a drain, between which the memory cell shown in FIGS. 4 and 8 is formed. Two or more types of polycrystalline Si
characterized by the presence of a gate electrode
It can be used for MOS transistors, charge transfer devices (CTD), etc.

FIG. 2 is a diagram in which the horizontal axis represents the oxidation temperature and the vertical axis represents the thickness of the wet oxide film 6 formed on the surface of the polycrystalline silicon 4 doped with a high concentration of phosphorus. As a parameter, 10 Ω·cm and the thickness of the oxide film 2-2 formed on the (100) plane of the P-type silicon substrate are used. That is, the curve labeled 500 Å shows the change in the thickness of the oxide film 6 formed on the polycrystalline silicon 4 when the oxide film 2-2 of 500 Å is formed on the surface of the silicon substrate. Similarly, the curves labeled 1000 Å and 1500 Å indicate the thickness of the oxide film 6 formed on the polycrystalline silicon 4 when the oxide films 2-2 of 1000 Å and 1500 Å are formed on the silicon substrate surface, respectively. It shows change. As is clear from FIG. 2, selective oxidation, in which the oxidation rate varies depending on the impurity concentration, is significant when the oxidation temperature is 900° C. or lower. Further, it is desirable that the impurity concentration to obtain such characteristics is 1×10 ²⁰ cm ⁻³ or more.

In the past, it has not been possible to simultaneously form insulating films having different thicknesses and each having a different role. Therefore, the use of such a selective oxidation method reduces the number of steps in the process steps for realizing a semiconductor device, and has an extremely large economic effect compared to conventional manufacturing methods. Further, conventionally, the use of a wet oxide film as a gate insulating film has not been carried out because the properties of the oxide film are unfavorable in view of the characteristics of the semiconductor device. However, it has now been discovered that by applying a subsequent heat treatment process to the wet thermal oxide film, it is possible to create a gate insulating film with properties that are almost the same as those of conventional dry thermal oxide films.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention. Second
The figure shows the conditions of the selective oxidation method used in the present invention.

Claims (1)

[Claims] 1. A step of forming an insulating film on the main surface of a silicon substrate having one main surface, doping with phosphorus at an impurity concentration of 10 ¹⁸ /cm ³ or more, and increasing the impurity concentration of the silicon substrate. A step of depositing a silicon film having a higher impurity concentration on the insulating film so as to cover a predetermined part thereof, and etching a part of the insulating film to expose a part of the main surface of the substrate. and wet oxidation at an oxidation temperature of 700°C or more and 1000°C or less, so that the film thickness on the silicon film becomes thicker than the film thickness on the exposed part on the exposed part and the silicon film. A method for manufacturing a semiconductor device including two layers of electrodes on the substrate, the method comprising: forming a thermal oxide film as described above; and depositing an electrode film on the thermal oxide film.