JPS6118224B2 - - Google Patents

Info

Publication number
JPS6118224B2
JPS6118224B2 JP12451777A JP12451777A JPS6118224B2 JP S6118224 B2 JPS6118224 B2 JP S6118224B2 JP 12451777 A JP12451777 A JP 12451777A JP 12451777 A JP12451777 A JP 12451777A JP S6118224 B2 JPS6118224 B2 JP S6118224B2
Authority
JP
Japan
Prior art keywords
program
emulated
protection key
memory
control program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP12451777A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5458324A (en
Inventor
Shunsuke Myamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12451777A priority Critical patent/JPS5458324A/ja
Publication of JPS5458324A publication Critical patent/JPS5458324A/ja
Publication of JPS6118224B2 publication Critical patent/JPS6118224B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Storage Device Security (AREA)
JP12451777A 1977-10-19 1977-10-19 Information processor Granted JPS5458324A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12451777A JPS5458324A (en) 1977-10-19 1977-10-19 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12451777A JPS5458324A (en) 1977-10-19 1977-10-19 Information processor

Publications (2)

Publication Number Publication Date
JPS5458324A JPS5458324A (en) 1979-05-11
JPS6118224B2 true JPS6118224B2 (fr) 1986-05-12

Family

ID=14887427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12451777A Granted JPS5458324A (en) 1977-10-19 1977-10-19 Information processor

Country Status (1)

Country Link
JP (1) JPS5458324A (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6273333A (ja) * 1985-09-26 1987-04-04 Nec Corp エミュレーション制御装置

Also Published As

Publication number Publication date
JPS5458324A (en) 1979-05-11

Similar Documents

Publication Publication Date Title
US4347565A (en) Address control system for software simulation
JP2650675B2 (ja) マルチモードマイクロプロセッサにおいてプログラムを実行する方法及びオペレーティングシステム
US4825358A (en) Method and operating system for executing programs in a multi-mode microprocessor
US4084235A (en) Emulation apparatus
US5561788A (en) Method and system for executing programs using memory wrap in a multi-mode microprocessor
US5701493A (en) Exception handling method and apparatus in data processing systems
US4414627A (en) Main memory control system
JPS58191046A (ja) Ｃｐｕ制御方法
JPH0769844B2 (ja) データ空間への共通アクセス装置及び方法
JPS5960652A (ja) デ−タ処理装置
US5745676A (en) Authority reduction and restoration method providing system integrity for subspace groups and single address spaces during program linkage
US5003468A (en) Guest machine execution control system for virutal machine system
KR20010078371A (ko) 컴퓨터 시스템 프로세서의 현재 특권 레벨 승격 방법 및컴퓨터 시스템의 인스트럭션 실행 방법
JPS6049352B2 (ja) デ−タ処理装置
US11216280B2 (en) Exception interception
JPS6118224B2 (fr)
JPH0552535B2 (fr)
JPS61184643A (ja) 仮想計算機の起動制御方式
JPH1153249A (ja) メモリ管理方法
JPS6212555B2 (fr)
JPS6139135A (ja) 仮想計算機システムにおけるインタバル・タイマ割り込み制御装置
JPH0193831A (ja) 仮想計算機のオペランドアクセス制御方式
JPS63120336A (ja) メモリアクセスモ−ド切替え方式
JPS5848150A (ja) 障害波及防止方式
JPH0412861B2 (fr)