JPS61182239A - Bonding device for semiconductor substrate - Google Patents

Bonding device for semiconductor substrate

Info

Publication number
JPS61182239A
JPS61182239A JP2188085A JP2188085A JPS61182239A JP S61182239 A JPS61182239 A JP S61182239A JP 2188085 A JP2188085 A JP 2188085A JP 2188085 A JP2188085 A JP 2188085A JP S61182239 A JPS61182239 A JP S61182239A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
semiconductor
support stand
holder
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2188085A
Other languages
Japanese (ja)
Other versions
JPH061790B2 (en
Inventor
Takashi Yotsudo
孝 四戸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2188085A priority Critical patent/JPH061790B2/en
Publication of JPS61182239A publication Critical patent/JPS61182239A/en
Publication of JPH061790B2 publication Critical patent/JPH061790B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To allow two semiconductor wafers to be bonded without leaving bubbles on the adhesive surface between the wafers by, while bending one semiconductor water so as to make its center portion a recess, contacting the semiconductor wafer with the other semiconductor wafer and bonding the former to the latter. CONSTITUTION:A rubber chuck 15 for loading a semiconductor wafer is provided with a plurality of vents 18. An exhausting pipe 19 is provided just under a pedestal 16. The outer periphery of the semiconductor wafer is pulled by vacuum-sucking via the exhausting pipe 19 and the chuck 15 is bent according to the shape of the surface of the pedestal 16. Consequently, the semiconductor wafer is held with its center portion made convex. The semiconductor wafer held in this way is contacted with another semiconductor wafer held by a holder 13 and air or the like is introduced into the chuck 15, thereby to recover the bending in the semiconductor wafer gradually. This makes the adhesive surface spread from its center portion to its peripheral portion, thereby allowing the two semiconductor wafers to be bonded without taking in bubbles therein.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、シリコンなどの半導体ウェハ同士を直接接着
させるための装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an apparatus for directly bonding semiconductor wafers, such as silicon, to each other.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

鏡面研磨されたシリコンなどの2枚の半導体ウェハを、
その研磨面同士を清浄な条件下で接触させると強固な接
合体ウェハが得られる。この方法は、ウェハ間に接着剤
等の異種物質を介在させる必要゛がないため、その後の
高温処理や各種化学処理を1枚の半導体ウェハと全く同
様に行うことができる。゛また、この方法によれば、糧
々の不純物濃度、厚さ、拡散層等を有する2枚の半導体
ウェハを比較的低温(200C以上)で直接接着し、1
枚の半導体ウェハとすることができるので、エピタキシ
ャル成長法などの従来方法では製造困難1、もしくは製
造不可能であった素子構造をも実現することが可能とな
った。
Two mirror-polished semiconductor wafers, such as silicon,
When the polished surfaces are brought into contact under clean conditions, a strong bonded wafer is obtained. In this method, there is no need to interpose a different substance such as an adhesive between the wafers, so that the subsequent high-temperature treatment and various chemical treatments can be performed in exactly the same way as for a single semiconductor wafer.゛According to this method, two semiconductor wafers having sufficient impurity concentration, thickness, diffusion layer, etc. are directly bonded at a relatively low temperature (200C or higher), and 1
Since it can be made into a single semiconductor wafer, it has become possible to realize element structures that are difficult to manufacture or impossible to manufacture using conventional methods such as epitaxial growth.

しかしながら、この方法で半導体ウェハを接着させる場
合、ウェハの反り等のため周辺部が先に接着し、接着部
に気泡が取り残されるという問題があり、リソグラフィ
ーに使用するマスクアライナ−のような装置で接着を行
うと均一な接着ができなかった。従って、従来はたかだ
か1枚の半導体ウェハにバターニングされた場合C;の
み限られ、各々バターニングされた2枚の半導体クエへ
を接着することは不可能であった。
However, when bonding semiconductor wafers using this method, there is a problem in that the peripheral area adheres first due to wafer warping, and air bubbles are left behind in the bonded area. When gluing was performed, uniform adhesion could not be achieved. Therefore, in the past, only one semiconductor wafer was patterned, and it was impossible to bond two patterned semiconductor wafers.

〔発明の目的〕[Purpose of the invention]

本発明は、各々バターニングされた2枚の半導体ウェハ
を、相互の位置関係を合わせ、接着面に気泡を残すこと
なぐ接着する装置を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide an apparatus for aligning two patterned semiconductor wafers and bonding them together without leaving any air bubbles on the bonding surfaces.

〔発明の概要〕[Summary of the invention]

本発明の装置は、各々バターニングされた2枚の半導体
ウェハを、その相互の位置関係を合せ接着するにあたっ
て、一方の半導体ウェハなその中央部が凸型となるよう
にたわませた状態でその凸型面を他方の半導体ウェハに
接触させて、両ウェハあ接着を行うことを特徴としてい
る。
In the apparatus of the present invention, when aligning and bonding two patterned semiconductor wafers to each other, one semiconductor wafer is bent so that its central portion is convex. The convex surface is brought into contact with the other semiconductor wafer, and both wafers are bonded together.

本発明の装置を#成する部品である支持台は、1紀のよ
うに一方に半導体ウェハ中央部を凸型にたわませて保持
するためのものであり、表面中央部が凸型となるように
テーパrjAtたは曲向成戯されその表面に開口する排
気孔を有する基台と、この基台に重ねられ、半導体ウェ
ハが載置される曲の外周部に溝が形成されかつその溝に
沿って前記基台の排気孔と連通する複数個の排気孔が形
成された弾性体からなるチャックを備える。そしてチャ
ック上に載せられた半導体ウェハを、チャックの排気孔
および基台の排気孔を介して真空吸引することにより、
チャックと共に半導体ウェハな基台の表面形状を反映し
て中央部が凸型となる状態で保持するようにしたもので
ある。
The support stand, which is a component of the device of the present invention, is used to hold the semiconductor wafer by bending the central part of the semiconductor wafer in a convex shape on one side, as in the first generation, and the central part of the surface is convex. A base is formed with a taper rjAt or curved direction and has an exhaust hole opening on its surface, and a groove is formed on the outer periphery of the curve which is stacked on the base and on which a semiconductor wafer is placed. The chuck is made of an elastic body and has a plurality of exhaust holes formed therein that communicate with the exhaust holes of the base. By vacuum suctioning the semiconductor wafer placed on the chuck through the chuck's exhaust hole and the base's exhaust hole,
Together with the chuck, the wafer is held in a state in which the central portion is convex, reflecting the surface shape of the base, which is a semiconductor wafer.

このような支持台に凸盤状にたわませた状態で保持され
た一方の半導体ウェハと、ホルダーにたわみのない状態
で保持された他方の半導体ウェハとの相対位置を調整す
る操作では、たわみのない半導体ウェハ同士の場合には
ないいくつかの解決すべき問題が生じる。まず、第1の
問題点は、半導体ウェハな凸型状にたわませると上方か
ら見た場合に合わせマークの位置が内側に移動すること
である。従って、各々の半導体ウェハ上の同じ位置に合
わせマークをつけただけではこのずれのために相互の合
わせができなくなる。第2の問題点は、一方の半導体ウ
ニ・・が支持台に保持される時に半導体ウェハの中心が
支持台の凸部の頂点からずれると、上方から見た合わせ
マークの形状が歪み、正確な合わせができなくなること
である。これらの問題を解決するために本発明の装置で
はいくつかの対策を考えである。以下、順を追って説明
する。
In such an operation to adjust the relative position of one semiconductor wafer held in a convexly bent state on a support base and the other semiconductor wafer held in a non-deformed state in a holder, it is necessary to Several problems arise that need to be solved that are not present in the case of semiconductor wafers that do not have a semiconductor wafer. The first problem is that when a semiconductor wafer is bent into a convex shape, the position of the alignment mark moves inward when viewed from above. Therefore, if alignment marks are simply placed at the same position on each semiconductor wafer, mutual alignment will not be possible due to this deviation. The second problem is that when one semiconductor wafer is held on the support stand, if the center of the semiconductor wafer deviates from the apex of the convex part of the support stand, the shape of the alignment mark seen from above will be distorted, making it difficult to accurately This means that it will not be possible to match. In order to solve these problems, the apparatus of the present invention takes several measures. The following is a step-by-step explanation.

まず$1に、たわみによる合わせマークの移動に対して
は、接着すべき2枚の半導体ウェハの対応する合わせマ
ークの少なくとも一方を半導体ウェハの半径方向に長い
形状とするなどの方法で合わせマークが移動しても対応
する合わせマークの少なくとも一部は重なりを持つよう
にすることで対拠できる。第2に、たわみによる合わせ
マークの歪みは、接着すべき2枚の半導体ウェハ同士の
合わせの前に支持台の中心と支持台に保持される半導体
ウェハの中心とを合わせる操作を導入することによって
解消する。この操作を具体的に説明すると、まず最終的
に支持台に保持されるべき一方の半導体ウェハな接着面
側どホルダーに保持し、ホルダーと支持台を近接させた
状態にて半導体ウェハの合わせマークと、支持台上に設
けられたマークとの位置合わせを行い、次に半導体ウェ
ハと支持台を接触させ、ホルダー側の真空吸着を解除し
支持台側の真空吸着を開始して、凸型にたわませた状態
で支持台上に保持する。上記のように、半導体ウェハな
接着面側で保持する場合には、接着面の汚染を防ぐため
に半導体ウェハの中央部はホルダーに接触させず、半導
体ウェハの周辺部だけで真空吸着し保持することが望ま
しい。あるいは、支持台よりも大きな内径を持つ円筒状
のり動機構を備えた支持柱を別に設けて、半導体ウェハ
な非接着面で保持するようにしてもよい。
First, in order to prevent alignment marks from shifting due to deflection, the alignment marks can be fixed by a method such as making at least one of the corresponding alignment marks on two semiconductor wafers to be bonded into a long shape in the radial direction of the semiconductor wafers. This can be countered by making at least a portion of the corresponding alignment marks overlap even if the alignment marks are moved. Second, distortion of alignment marks due to deflection can be avoided by introducing an operation that aligns the center of the support stand with the center of the semiconductor wafer held on the support stand before the two semiconductor wafers to be bonded together. Eliminate. To explain this operation in detail, first, hold one semiconductor wafer in a holder on the adhesive side of the semiconductor wafer that will ultimately be held on the support stand, and place the alignment mark on the semiconductor wafer with the holder and support stand close together. The semiconductor wafer is aligned with the marks provided on the support base, and then the semiconductor wafer and the support base are brought into contact, and the vacuum suction on the holder side is released and the vacuum suction on the support base side is started. Hold it on a support stand in a flexed state. As mentioned above, when holding a semiconductor wafer on the adhesive side, in order to prevent contamination of the adhesive surface, the central part of the semiconductor wafer should not come into contact with the holder, and only the peripheral part of the semiconductor wafer should be held by vacuum suction. is desirable. Alternatively, a support column having a cylindrical sliding mechanism having an inner diameter larger than that of the support base may be provided separately, and the support column may be held on a non-adhesive surface such as a semiconductor wafer.

第8に、凸型にたわんだ状態での合わせ精度を改善する
ために、少なくとも8箇所で位置合わせな行う。たわみ
による合わせマークの移動量は支持台の形状によって決
まるので、この大きさを考慮して合わせマークを形成す
れば、2箇所だけでも位置あわせなすることは可能であ
るが、この移動量は半導体ウェハの厚さなどによって微
妙に変化するので合わせ精度を規定熱囲内におさめるこ
とは困難である。位置合わせな8箇所で行うようにすれ
ば、たわみによる合わせマークの半径方向への移動を考
慮せずに合わせマークを設計しても円周方間の合わせマ
ークのずれを調整するだけで正確に相対位置を合わせる
ことができる。
Eighth, in order to improve alignment accuracy in a convexly bent state, alignment is performed at at least eight locations. The amount of movement of the alignment mark due to deflection is determined by the shape of the support base, so if the alignment mark is formed taking this size into account, it is possible to align with just two locations, but this amount of movement is It is difficult to keep the alignment accuracy within a specified thermal range because it varies slightly depending on the thickness of the wafer and other factors. If alignment is performed at 8 points, even if alignment marks are designed without taking into consideration radial movement of alignment marks due to deflection, it will be possible to accurately adjust the alignment marks in the circumferential direction. Relative positions can be adjusted.

更に、本発明ではこれら凸型にたわんだ状態で合わせを
行うために生じる問題を解決する別個の方法として、支
持台に半導体ウェハが凸型にたわむ状態とたわまない状
態の2つの状態で保持できる機構を持たせ、たわまない
状態で2枚の半導体ウェハの位置合わせな行い、然る後
に支持台に保持されている半導体ウェハを凸型にたわま
せ、ホルダーに保持されている半導体ウェハな接触させ
、支持台の真空吸着を解除して2枚の半導体ウェハな接
着させる方法を提供する。この方法によれば、2枚の半
導体クエへともたわまない状態で位置合わせな行えるの
で、従来のマスクアライナ−と全く同様にして接着面に
気泡を残すことなく接着することができる。従って、位
置合わせが1回で済むので、大幅な時間短縮が可能とな
る。但し、位置合わせなした後に支持台上に保持された
半導体ウェハな一度凸盤にたわませて、また戻すという
操作が入いるために、凸型にたわませた状態で位置合わ
せな行い、すぐに接着させる前述の方法に比べると位置
合わせの精度は低い。
Furthermore, in the present invention, as a separate method for solving the problems that arise when alignment is performed in a convexly warped state, the semiconductor wafer is placed on a support stand in two states: a state in which the semiconductor wafer is warped in a convex shape and a state in which it is not warped. A holding mechanism is provided to align two semiconductor wafers without bending, and then the semiconductor wafer held on the support is bent into a convex shape and held in the holder. To provide a method for bonding two semiconductor wafers by bringing them into contact with each other and releasing vacuum suction on a support stand. According to this method, it is possible to align the two semiconductor chips without bending them, so that they can be bonded together without leaving any air bubbles on the bonding surface in exactly the same way as a conventional mask aligner. Therefore, since alignment only needs to be done once, it is possible to significantly shorten the time. However, after alignment, the semiconductor wafer held on the support stage must be bent into a convex shape and then returned to its original position. The alignment accuracy is lower than the above-mentioned method of immediate adhesion.

〔発明の効果〕〔Effect of the invention〕

本発明の装置を用いることにより、各々バターニングさ
れた2枚の半導体ウェハを、相互の位置関係を合わせ、
接着面に気泡を残すことなく接着することが初めて可能
となる。
By using the apparatus of the present invention, two patterned semiconductor wafers are aligned with each other, and
For the first time, it is possible to bond without leaving any air bubbles on the adhesive surface.

〔発明の実施例〕[Embodiments of the invention]

以下本発明の詳細な説明する。 The present invention will be explained in detail below.

第1図は本発明の一実施例の装置を示す図であ  ・る
。図において、14は接着すべき第1の半導体ウェハを
凸型にたわませて保持するための支持台、13は接着す
べき第2の半導体ウェハを保持するためのホルダーであ
り、22のホルダー駆動機構によって上下に移動し、支
持台13との間隔を任意に設定できる。23は支持台1
4の位置をX方向、y方向。
FIG. 1 is a diagram showing an apparatus according to an embodiment of the present invention. In the figure, reference numeral 14 denotes a support base for bending and holding the first semiconductor wafer to be bonded, 13 is a holder for holding the second semiconductor wafer to be bonded, and 22 is a holder. It is moved up and down by a drive mechanism, and the distance from the support base 13 can be set arbitrarily. 23 is support stand 1
Position 4 in the X and Y directions.

0方向に微v4整するためのステージで、20は半導体
クエハを透過する波長の光を発生する光源であり、21
は半導体ウェハを透過してきた光を検出するだめの光学
系である。光源2oから発生した光は排気孔18内を通
過し、支持台14もしくはホルダー13に保持された半
導体ウェハを透過して光学系21で検出されるので、半
導体ウェハ上に形成された位置合わせマークを見ながら
ステージ23を微調整して位置合わせな行うことができ
る。
A stage for finely adjusting v4 in the 0 direction, 20 is a light source that generates light with a wavelength that passes through the semiconductor wafer, 21
is an optical system that detects the light that has passed through the semiconductor wafer. The light generated from the light source 2o passes through the exhaust hole 18, passes through the semiconductor wafer held on the support stand 14 or the holder 13, and is detected by the optical system 21, so that the alignment mark formed on the semiconductor wafer is detected by the optical system 21. The position can be adjusted by finely adjusting the stage 23 while looking at the image.

支持台14は、基台16とラバー・チャック15とから
構成されている。基台16は金属等でつくられ、表面中
央部が凸型となるように曲面加工されており、表面に開
口する排気孔18が形成されている。
The support stand 14 is composed of a base 16 and a rubber chuck 15. The base 16 is made of metal or the like, has a curved surface in a convex central portion, and has an exhaust hole 18 opening in the surface.

15は基台16上に徴せられる、半導体ウェハを載置す
るためのラバー9チヤツクである。このラバー・チャッ
ク15には複数の排気孔18が形成されている。基台1
6の下に排気管19が設けられており、この排気管19
を介して真空吸引することにより、排気孔■8を介して
半導体ウェハの外周部が引っ張られてラバー−fキック
15が基台16の表面形状に従ってたわみ、この結果、
半導体ウェハは中央部が凸型になった状態で保持される
。このようにして保持した半導体ウェハなもう一方の半
導体ウェハに接触させ、ラバー・チャック15内に空気
等を少しずつ導入して半導体ウェハのたわみを徐々に回
復させる。これにより、接着面は中央部から周辺部に向
かって広がり、気泡を取り込むことなく2枚の半導体ウ
ェハを接着することができる。特許請求の範囲第6項記
載の装置の場合には、例えばウェハの周辺を支持台14
上に機械的に保持し、中央部を押すことによってウェハ
をたわませる方法を使えば、たわまない状態で保持する
ことも可能である。あるいは、ラバー・チャック15の
代りに形状記憶合金を用い、ヒーターで熱することによ
りウェハをたわんだ状態とたわまない状態の2つの状態
で保持する等の方法をとってもよい。
Reference numeral 15 denotes a rubber chuck 9 placed on the base 16 for placing a semiconductor wafer thereon. This rubber chuck 15 has a plurality of exhaust holes 18 formed therein. Base 1
An exhaust pipe 19 is provided below 6, and this exhaust pipe 19
By vacuum suction through the exhaust hole 8, the outer circumference of the semiconductor wafer is pulled and the rubber f kick 15 is bent according to the surface shape of the base 16, and as a result,
The semiconductor wafer is held with its center portion convex. The semiconductor wafer thus held is brought into contact with the other semiconductor wafer, and air or the like is introduced little by little into the rubber chuck 15 to gradually recover the deflection of the semiconductor wafer. As a result, the bonding surface spreads from the center toward the periphery, making it possible to bond two semiconductor wafers without introducing air bubbles. In the case of the apparatus described in claim 6, for example, the periphery of the wafer is supported by the support table 14.
It is also possible to hold the wafer in an undeflected state by mechanically holding it above the wafer and bending the wafer by pressing the center. Alternatively, a shape memory alloy may be used in place of the rubber chuck 15, and the wafer may be held in two states, a bent state and an undeflected state, by heating with a heater.

第2図は、本発明の装置を用いて接着を行う第1の方法
を説明するための図である。これらの図において、11
.12は接着すべき2枚の半導体ウェハであり、13は
上下する駆動機構を備えたボルダ−であり、14は半導
体ウェハを凸型にたわませて保持する支持台である。ホ
ルダー13は支持する軸のまわりに回転して、ウェハ1
1を接着面を上向きにした状態で保持し、その後に再び
回転してウニ・・を下向きに保持する等の機構を持つこ
とが実用上望ましい。このようにしてウェハ11を接着
面を下向きにしてホルダー13に保持しく(a)図)、
ホルダー13を下方に移動してウェハ11と支持台14
の表面を近づけた状態でウェハ11と支持台14の中心
を合わせる位置合わせな行い((b)図)、然る後にウ
ェハ11と支持台14を接触させ((C)図)、ホルダ
ー13の真空吸引を止めて支持台14の真空吸引を開始
し、ウェハ11を凸型にたわませた状態で支持台14に
保持しホルダー13を上方に移動する((d)図)。
FIG. 2 is a diagram for explaining a first method of bonding using the apparatus of the present invention. In these figures, 11
.. 12 is two semiconductor wafers to be bonded; 13 is a boulder equipped with a driving mechanism for moving up and down; and 14 is a support base for holding the semiconductor wafer in a convex shape. The holder 13 rotates around the supporting axis and holds the wafer 1.
Practically speaking, it is desirable to have a mechanism for holding the sea urchin 1 with the adhesive surface facing upward, and then rotating it again to hold the sea urchin downward. In this way, the wafer 11 is held in the holder 13 with the adhesive surface facing downward (Figure (a)),
Move the holder 13 downward to hold the wafer 11 and the support stand 14.
Align the centers of the wafer 11 and the support stand 14 with their surfaces brought close to each other (Figure (B)), then bring the wafer 11 and the support stand 14 into contact (Figure (C)), and align the holder 13. The vacuum suction is stopped and the vacuum suction of the support table 14 is started, the wafer 11 is held on the support table 14 in a convexly bent state, and the holder 13 is moved upward (FIG. (d)).

次ニウェハ12を接着面を下向きにしてボルダ−13に
保持しく(e)図)、ホルダー13を下方に移動してウ
ェハ11とウェハ12の表面を近づけた状態で位置合わ
せな行い((f)図)、然る後にウェハ11とウェハ1
2を接触させ((g)図)、支持台14にょるウェハ1
1の保持を解除することにより、ウェハ11.12を接
着させる。この方法によれば、各々バターニングされた
半導体ウェハ11,12を残留ガスなしに全曲確実に接
着させて強固な接合体ウェハを得ることができる。
Next, hold the second wafer 12 on the boulder 13 with the adhesive side facing downward (Figure (e)), and move the holder 13 downward to bring the surfaces of the wafers 11 and 12 closer together and align them (Figure (f)). ), then wafer 11 and wafer 1
2 (Figure (g)), and place the wafer 1 on the support stand 14.
By releasing the hold on wafers 11 and 12, the wafers 11 and 12 are bonded. According to this method, the semiconductor wafers 11 and 12 that have been patterned can be reliably bonded all over without residual gas, and a strong bonded wafer can be obtained.

第8図(a)、(b)は、以上述べてきた方法で接着を
行う半導体ウェハに形成する位置合わせマークの例を示
す図である。これらの図において、凸型形状のウェハを
位置合わせする精度を上げるため位置合わせマーク24
.25は8箇所に形成されている。
FIGS. 8(a) and 8(b) are diagrams showing examples of alignment marks formed on semiconductor wafers bonded by the method described above. In these figures, alignment marks 24 are used to increase the accuracy of aligning the convex-shaped wafer.
.. 25 are formed at eight locations.

第8図(c)は、2枚のウェハを重ねて位置合わせをし
た時の位置合わせマークの重なっている様子を示す図で
ある。前述したように一方のウェハが凸型にたわまされ
ると位置合わせマークは半径方向に移動するので第8図
に示したような形状の位置合わせマークで十分である。
FIG. 8(c) is a diagram showing how the alignment marks overlap when two wafers are stacked and aligned. As described above, when one wafer is bent into a convex shape, the alignment mark moves in the radial direction, so an alignment mark having the shape shown in FIG. 8 is sufficient.

第4図は、本発明の装置を用いて接着を行う第2の方法
を説明するための図である。前述した方法では、一方の
半導体ウェハを凸型にたわませた状態でウェハ同士の位
置合わせな行ったのに対し、これから述べる方法では接
着すべき半導体ウェハな2枚ともたわませずに位置合わ
せなするので操作は極めて簡単である。まず、ウェハ1
1を接着面を上向きにして支持台14にたわまない状態
で保持しく(a)図)、ホルダー13にウェハ12を接
@曲を下回きにして保持しく(b)図)、ホルダー13
を下方に移動してウェハ11と12の表囲を近づけた状
態で位置合わせな行い((1)、然る後に支持台14を
凸型形状にしてウェハ11を反らせ((d)図)、ウェ
ハ11とウェハ12を接触させ((e)図)、支持台1
4を平らにしてウェハ11.12を接着させる。この方
法によれば極めて簡便に通常のマスクアライナと同様の
操作で接着をするご、とができる。
FIG. 4 is a diagram for explaining a second method of bonding using the apparatus of the present invention. In the method described above, the wafers were aligned with one semiconductor wafer bent in a convex shape, whereas in the method described below, the two semiconductor wafers to be bonded are aligned without bending. The operation is extremely simple since there is no need to align the two. First, wafer 1
Hold the wafer 12 on the support stand 14 without bending with the adhesive side facing upward (Figure a)), and hold the wafer 12 on the holder 13 with the wafer facing downward (Figure b)). 13
is moved downward to bring the surface areas of the wafers 11 and 12 close together and align them ((1). Then, the support base 14 is made into a convex shape and the wafer 11 is warped (FIG. (d)). The wafer 11 and the wafer 12 are brought into contact with each other (Figure (e)), and the support table 1 is
4 is flattened and wafers 11 and 12 are bonded. According to this method, it is possible to bond the mask aligner very easily in the same manner as with a normal mask aligner.

本発明は上記実施例に限られない。例えば第2図の方法
では、半導体ウェハ12は平坦に支持したが、これも半
導体ウェハ11と同様に中央部が凸型となるようにたわ
ませて保持してもよい。また第1図の支持台14におい
て、ラバm−チャック15は他の弾性材料を用いて構成
することができる。また基台16の表面は必ずしも曲面
でなくてもよく、例えば中央部が凸型となるテーバ而で
あってもよい。
The present invention is not limited to the above embodiments. For example, in the method shown in FIG. 2, the semiconductor wafer 12 is supported flatly, but like the semiconductor wafer 11, it may also be held in a bent manner so that the central portion is convex. Furthermore, in the support base 14 of FIG. 1, the rubber m-chuck 15 can be constructed using other elastic materials. Further, the surface of the base 16 does not necessarily have to be a curved surface, and may be a tapered surface with a convex central portion, for example.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の装置を示す因、第2図、第
4図は本発明の装置を用いて接着を行う方法を説明する
ための図、第8図は本発明の装置を用いて接着を行う半
導体ウェハに形成する位置合わせマークの例を示す図で
ある。 11.12・・・半導体ウェハ 13・・・ホルダー 14・・・支持台 ■5・・・ラバー・チャック 16・・・基台 17.18・・・排気孔 19・・・排気管 20・・・光源 21・・・光学系 22・・・ホルダー駆@機構 23・・・”+ Yr θステージ 討・・・半導体ウェハ11上の位置合わせマーク25・
・・半導体ウェハ12上の位置合わせマーク代理人 弁
理士 則 近 憲 佑 (ほか1名)第4図 (α) (C) (b) (d) (e) (f)
FIG. 1 shows an apparatus according to an embodiment of the present invention, FIGS. 2 and 4 are diagrams for explaining a method of bonding using the apparatus of the present invention, and FIG. 8 shows an apparatus according to the present invention. FIG. 3 is a diagram illustrating an example of alignment marks formed on a semiconductor wafer to which bonding is performed using. 11.12... Semiconductor wafer 13... Holder 14... Support stand ■5... Rubber chuck 16... Base 17.18... Exhaust hole 19... Exhaust pipe 20...・Light source 21...Optical system 22...Holder drive@mechanism 23..."+ Yr θ stage control...Positioning mark 25 on semiconductor wafer 11.
...Alignment mark agent on semiconductor wafer 12 Patent attorney Noriyuki Chika (and one other person) Figure 4 (α) (C) (b) (d) (e) (f)

Claims (6)

【特許請求の範囲】[Claims] (1)一方の半導体ウェハを、中央部が凸型となるよう
にたわませて保持する支持台と、他方の半導体ウェハを
前記支持台に対向して保持するホルダーと、支持台とホ
ルダーとの間隔を変化する機構と、支持台とホルダーの
うち少なくとも一方の位置を微調整する機構と、前記半
導体ウェハに光が照射された時前記半導体ウェハにおけ
る光吸収係数を極めて小さくし得る長波長の光ビームを
発生する光源と、前記光源から発せられた光を検出する
手段とを有してなることを特徴とする半導体基板の接着
装置。
(1) A support stand that holds one semiconductor wafer by bending it so that its central portion is convex, a holder that holds the other semiconductor wafer facing the support stand, and a support stand and a holder. a mechanism for finely adjusting the position of at least one of the support stand and the holder; and a mechanism for finely adjusting the position of at least one of the support stand and the holder; and a mechanism for finely adjusting the position of at least one of the support stand and the holder; 1. A semiconductor substrate bonding apparatus comprising: a light source that generates a light beam; and means for detecting the light emitted from the light source.
(2)前記支持台は、基台、チャックおよび光源からな
り、基台は表面中央部が凸型となるようにテーパ面また
は曲面成型され、その表面に開口する排気孔を有し、チ
ャックは前記基台に重ねられ、前記一方の半導体ウェハ
が保持される面の外周部に前記基台の排気孔と連通する
複数個の排気口が形成された弾性体からなり、光源は半
導体ウェハを透過する波長の光を発生し、前記チャック
上に載せられた前記一方の半導体ウェハを、チャックの
排気孔および基台の排気孔を介して真空吸引してその中
央部が凸型となる状態で保持するようにしたことを特徴
とする特許請求の範囲第1項記載の半導体基板の接着装
置。
(2) The support table consists of a base, a chuck, and a light source, and the base has a tapered or curved surface so that the central part of the surface is convex, and has an exhaust hole that opens on the surface. The elastic body is stacked on the base and has a plurality of exhaust ports formed on the outer periphery of the surface on which the one semiconductor wafer is held, communicating with the exhaust holes of the base, and the light source passes through the semiconductor wafer. The semiconductor wafer placed on the chuck is vacuum-suctioned through the chuck's exhaust hole and the base's exhaust hole to hold the semiconductor wafer in a convex shape at its center. 2. A semiconductor substrate bonding apparatus according to claim 1, wherein the semiconductor substrate bonding apparatus is characterized in that:
(3)前記一方の半導体ウェハを支持台に保持するにあ
たり、前記一方の半導体ウェハと支持台との相対位置を
調整する手段を有することを特徴とする特許請求の範囲
第2項記載の半導体基板の接着装置。
(3) The semiconductor substrate according to claim 2, further comprising means for adjusting the relative position between the one semiconductor wafer and the support stand when holding the one semiconductor wafer on the support stand. gluing device.
(4)各々の半導体ウェハ上には、少なくとも1個の合
わせマークがあり、一方の半導体ウェハが凸型となる状
態で支持台に保持される時に、前記一方の半導体ウェハ
の合わせマークを、ホルダーに保持された他方の半導体
ウェハ上に、前記他方の半導体ウェハ表面に垂直な方向
から投影して得られる図形と、前記他方の半導体ウェハ
の合わせマークとが重なりを持つように合わせマークを
形成し、特許請求の範囲第1項記載の装置を用いて接着
を行うことを特徴とする半導体基板の接着方法。
(4) There is at least one alignment mark on each semiconductor wafer, and when one semiconductor wafer is held in a convex state on the support stand, the alignment mark of the one semiconductor wafer is placed on the holder. an alignment mark is formed on the other semiconductor wafer held by the semiconductor wafer, such that a figure obtained by projecting from a direction perpendicular to the surface of the other semiconductor wafer and an alignment mark on the other semiconductor wafer overlap. A method for bonding semiconductor substrates, characterized in that bonding is performed using the apparatus according to claim 1.
(5)前記一方の半導体ウェハと前記他方の半導体ウェ
ハとの位置合せを少なくとも8箇所で行うことを特徴と
する特許請求の範囲第2項記載の半導体基板の接着装置
(5) The semiconductor substrate bonding apparatus according to claim 2, wherein the one semiconductor wafer and the other semiconductor wafer are aligned at at least eight locations.
(6)前記支持台は、半導体ウエハの中央部が凸型とな
る状態と、半導体ウェハがたわまない状態の2つの状態
で半導体ウェハを保持するようにしたことを特徴とする
特許請求の範囲第1項記載の半導体基板の接着装置。
(6) The support stand is configured to hold the semiconductor wafer in two states: a state in which the central portion of the semiconductor wafer is convex, and a state in which the semiconductor wafer does not bend. The semiconductor substrate bonding device according to scope 1.
JP2188085A 1985-02-08 1985-02-08 Bonding device for semiconductor substrates Expired - Lifetime JPH061790B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2188085A JPH061790B2 (en) 1985-02-08 1985-02-08 Bonding device for semiconductor substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2188085A JPH061790B2 (en) 1985-02-08 1985-02-08 Bonding device for semiconductor substrates

Publications (2)

Publication Number Publication Date
JPS61182239A true JPS61182239A (en) 1986-08-14
JPH061790B2 JPH061790B2 (en) 1994-01-05

Family

ID=12067435

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2188085A Expired - Lifetime JPH061790B2 (en) 1985-02-08 1985-02-08 Bonding device for semiconductor substrates

Country Status (1)

Country Link
JP (1) JPH061790B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02106052A (en) * 1988-10-14 1990-04-18 Shin Etsu Handotai Co Ltd Inspection method for junction wafer
JPH02119237A (en) * 1988-10-28 1990-05-07 Nec Corp Hot plate for pasting semiconductor substrate on glass plate
WO2002056352A1 (en) * 2001-01-15 2002-07-18 Lintec Corporation Bonding apparatus, and bonding method
WO2019188310A1 (en) * 2018-03-29 2019-10-03 株式会社ジャパンディスプレイ Pressure-bonding device and method for manufacturing display device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02106052A (en) * 1988-10-14 1990-04-18 Shin Etsu Handotai Co Ltd Inspection method for junction wafer
JPH02119237A (en) * 1988-10-28 1990-05-07 Nec Corp Hot plate for pasting semiconductor substrate on glass plate
WO2002056352A1 (en) * 2001-01-15 2002-07-18 Lintec Corporation Bonding apparatus, and bonding method
GB2375733A (en) * 2001-01-15 2002-11-27 Lintec Corp Bonding apparatus, and bonding method
GB2375733B (en) * 2001-01-15 2004-11-03 Lintec Corp Laminating apparatus and laminating method
US6951593B2 (en) 2001-01-15 2005-10-04 Lintec Corporation Laminating device and laminating method
WO2019188310A1 (en) * 2018-03-29 2019-10-03 株式会社ジャパンディスプレイ Pressure-bonding device and method for manufacturing display device
JP2019174764A (en) * 2018-03-29 2019-10-10 株式会社ジャパンディスプレイ Crimping device and method for manufacturing display
US11731414B2 (en) 2018-03-29 2023-08-22 Japan Display Inc. Pressure bonding device and method for manufacturing display device

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Publication number Publication date
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