JPH061790B2 - Bonding device for semiconductor substrates - Google Patents

Bonding device for semiconductor substrates

Info

Publication number
JPH061790B2
JPH061790B2 JP2188085A JP2188085A JPH061790B2 JP H061790 B2 JPH061790 B2 JP H061790B2 JP 2188085 A JP2188085 A JP 2188085A JP 2188085 A JP2188085 A JP 2188085A JP H061790 B2 JPH061790 B2 JP H061790B2
Authority
JP
Japan
Prior art keywords
semiconductor wafer
base
semiconductor
wafer
holder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2188085A
Other languages
Japanese (ja)
Other versions
JPS61182239A (en
Inventor
孝 四戸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP2188085A priority Critical patent/JPH061790B2/en
Publication of JPS61182239A publication Critical patent/JPS61182239A/en
Publication of JPH061790B2 publication Critical patent/JPH061790B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、シリコンなどの半導体ウエハ同士を直接接着
させるための装置に関する。
Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to an apparatus for directly bonding semiconductor wafers such as silicon to each other.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

鏡面研磨されたシリコンなどの2枚の半導体ウエハを、
その研磨面同士を清浄な条件下で接触させると強固な接
合体ウエハが得られる。この方法は、ウエハ間に接着剤
等の異種物質を介在させる必要がないため、その後の高
温処理や各種化学処理を1枚の半導体ウエハと全く同様
に行うことができる。また、この方法によれば、種々の
不純物濃度,厚さ,拡散層等を有する2枚の半導体ウエ
ハを比較的低温(200℃以上)で直接接着し、1枚の半
導体ウエハとすることができるので、エピタキシヤル成
長法などの従来方法では製造困難、もしくは製造不可能
であつた素子構造をも実現することが可能となつた。
Two semiconductor wafers, such as mirror-polished silicon,
A strong bonded wafer can be obtained by bringing the polished surfaces into contact with each other under clean conditions. In this method, since it is not necessary to interpose a different substance such as an adhesive between the wafers, the subsequent high temperature treatment and various chemical treatments can be performed in exactly the same manner as one semiconductor wafer. Further, according to this method, two semiconductor wafers having various impurity concentrations, thicknesses, diffusion layers, etc. can be directly bonded at a relatively low temperature (200 ° C. or higher) to form one semiconductor wafer. Therefore, it is possible to realize a device structure which is difficult or impossible to manufacture by the conventional method such as the epitaxial growth method.

しかしながら、この方法で半導体ウエハを接着させる場
合、ウエハの反り等のため周辺部が先に接着し、接着部
に気泡が取り残されるという問題があり、リソグラフイ
ーに使用するマスクアライナーのような装置で接着を行
うと均一な接着ができなかつた。従つて、従来はたかだ
か1枚の半導体ウエハにパターニングされた場合にのみ
限られ、各々パターニングされた2枚の半導体ウエハを
接着することは不可能であつた。
However, when a semiconductor wafer is bonded by this method, there is a problem that the peripheral part is bonded first due to the warp of the wafer and air bubbles are left in the bonded part, and it is not possible to use a device such as a mask aligner used for lithography. When adhesion was performed, uniform adhesion could not be achieved. Therefore, conventionally, it was limited to the case where only one semiconductor wafer was patterned, and it was impossible to bond two patterned semiconductor wafers.

〔発明の目的〕[Object of the Invention]

本発明は、各々パターニングされた2枚の半導体ウエハ
を、相互の位置関係を合わせ、接着面に気泡を残すこと
なく接着する装置を提供することを目的とする。
It is an object of the present invention to provide a device that bonds two semiconductor wafers, which are each patterned, to each other by aligning the positional relationship with each other and without leaving bubbles on the bonding surface.

〔発明の概要〕[Outline of Invention]

本発明の装置は、各々パターニングされた2枚の半導体
ウエハを、その相互の位置関係を合せ接着するにあたつ
て、一方の半導体ウエハをその中央部が凸型となるよう
にたわませた状態でその凸型面を他方の半導体ウエハに
接触させて、両ウエハの接着を行うことを特徴としてい
る。
In the apparatus of the present invention, when two patterned semiconductor wafers are aligned and bonded to each other, one of the semiconductor wafers is bent so that its central portion has a convex shape. In this state, the convex surface is brought into contact with the other semiconductor wafer to bond both wafers.

本発明の装置を構成する部品である支持台は、上記のよ
うに一方に半導体ウエハ中央部を凸型にたわませて保持
するためのものであり、表面中央部が凸型となるように
テーパ面または曲面成型されその表面に開口する排気孔
を有する基台と、この基台に重ねられ、半導体ウエハが
載置される面の外周部に溝が形成されかつその溝に沿つ
て前記基台の排気孔と連通する複数個の排気孔が形成さ
れた弾性体からなるチヤツクを備える。そしてチヤツク
上に載せられた半導体ウエハを、チヤツクの排気孔およ
び基台の排気孔を介して真空吸引することにより、チヤ
ツクと共に半導体ウエハを基台の表面形状を反映して中
央部が凸型となる状態で保持するようにしたものであ
る。
The support base, which is a component of the device of the present invention, is for holding the semiconductor wafer central portion by bending it convexly on one side as described above, so that the surface central portion is convex. A base having a tapered surface or a curved surface and having an exhaust hole opened on the surface thereof, and a groove formed in the outer peripheral portion of the surface on which the semiconductor wafer is placed and which is stacked on the base, and the base is formed along the groove. A chuck made of an elastic body having a plurality of exhaust holes communicating with the exhaust holes of the table is provided. Then, the semiconductor wafer placed on the chuck is vacuum-sucked through the exhaust hole of the chuck and the exhaust hole of the base, so that the semiconductor wafer together with the chuck has a convex central part reflecting the surface shape of the base. It is designed to be held in the state of.

このような支持台に凸型状にたわませた状態で保持され
た一方の半導体ウエハと、ホルダーにたわみのない状態
で保持された他方の半導体ウエハとの相対位置を調整す
る操作では、たわみのない半導体ウエハ同士の場合には
ないいくつかの解決すべき問題が生じる。まず、第1の
問題点は、半導体ウエハを凸型状にたわませると上方か
ら見た場合に合わせマークの位置が内側に移動すること
である。従つて、各々の半導体ウエハ上の同じ位置に合
わせマークをつけただけではこのずれのために相互の合
わせができなくなる。第2の問題点は、一方の半導体ウ
エハが支持台に保持される時に半導体ウエハの中心が支
持台の凸部の頂点からずれると、上方から見た合わせマ
ークの形状が歪み、正確な合わせができなくなることで
ある。これらの問題を解決するために本発明の装置では
いくつかの対策を考えてある。以下、順を追つて説明す
る。
In the operation of adjusting the relative position of one semiconductor wafer held in such a state that it is bent in a convex shape on the support table and the other semiconductor wafer held in the holder without bending, There are several problems to be solved that are not the case for semiconductor wafers without. First, the first problem is that when the semiconductor wafer is bent in a convex shape, the position of the alignment mark moves inward when viewed from above. Therefore, even if the alignment marks are provided at the same positions on the respective semiconductor wafers, they cannot be aligned with each other due to the displacement. The second problem is that when one of the semiconductor wafers is held on the support base and the center of the semiconductor wafer deviates from the apex of the convex portion of the support base, the shape of the alignment mark seen from above is distorted, and accurate alignment becomes difficult. It is not possible. In order to solve these problems, some measures are considered in the device of the present invention. Hereinafter, description will be made step by step.

まず第1に、たわみによる合わせマークの移動に対して
は、接着すべき2枚の半導体ウエハの対応する合わせマ
ークの少なくとも一方を半導体ウエハの半径方向に長い
形状とするなどの方法で合わせマークが移動しても対応
する合わせマークの少なくとも一部は重なりを持つよう
にすることで対拠できる。第2に、たわみによる合わせ
マーク歪みは、接触すべき2枚の半導体ウエハ同士の合
わせの前に支持台の中心と支持台に保持される半導体ウ
エハの中心とを合わせる操作を導入することによつて解
消する。この操作を具体的に説明すると、まず最終的に
支持台に保持されるべき一方の半導体ウエハを接着面側
どホルダーに保持し、ホルダーと支持台を近接させた状
態にて半導体ウエハの合わせマークと、支持台上に設け
られたマークとの位置合わせを行い、次に半導体ウエハ
と支持台を接触させ、ホルダー側の真空吸着を解除し支
持台側の真空吸着を開始して、凸型にたわませた状態で
支持台上に保持する。上記のように、半導体ウエハを接
着面側で保持する場合には、接着面の汚染を防ぐために
半導体ウエハの中央部はホルダーに接触させず、半導体
ウエハの周辺部だけで真空吸着し保持することが望まし
い。あるいは、支持台よりも大きな内径を持つ円筒状の
可動機構を備えた支持柱を別に設けて、半導体ウエハを
非接着面で保持するようにしてもよい。
First of all, with respect to the movement of the alignment mark due to the bending, at least one of the corresponding alignment marks of the two semiconductor wafers to be bonded is made to have a shape long in the radial direction of the semiconductor wafer. Even if they move, at least a part of the corresponding alignment marks can be overlapped so that they can be matched. Secondly, the alignment mark distortion due to the deflection is caused by introducing an operation of aligning the center of the supporting table with the center of the semiconductor wafer held by the supporting table before the two semiconductor wafers to be brought into contact with each other. Will be resolved. This operation will be described in detail. First, one semiconductor wafer to be finally held on the supporting table is held on the holder on the adhesive surface side, and the alignment mark of the semiconductor wafer is set in the state where the holder and the supporting table are in close proximity. And the marks provided on the support base are aligned, then the semiconductor wafer and the support base are brought into contact with each other, the vacuum suction on the holder side is released, the vacuum suction on the support base side is started, and the convex shape is obtained. Hold it in a bent state on a support. As described above, when holding the semiconductor wafer on the adhesive surface side, in order to prevent contamination of the adhesive surface, the central portion of the semiconductor wafer should not be in contact with the holder, and should be held by vacuum suction only on the peripheral portion of the semiconductor wafer. Is desirable. Alternatively, a supporting column having a cylindrical movable mechanism having an inner diameter larger than that of the supporting base may be separately provided to hold the semiconductor wafer on the non-bonding surface.

第3に、凸型にたわんだ状態での合わせ精度を改善する
ために、少なくとも3箇所で位置合わせを行う。たわみ
による合わせマークの移動量は支持台の形状によつて決
まるので、この大きさを考慮して合わせマークを形成す
れば、2箇所だけでも位置あわせをすることは可能であ
るが、この移動量は半導体ウエハの厚さなどによつて微
妙に変化するので合わせ精度を規定熱囲内におさめるこ
とは困難である。位置合わせを3箇所で行うようにすれ
ば、たわみによる合わせマークの半径方向への移動を考
慮せずに合わせマークを設計しても円周方向の合わせマ
ークのずれを調整するだけで正確に相対位置を合わせる
ことができる。
Thirdly, in order to improve the alignment accuracy in the state of being bent in a convex shape, alignment is performed at at least three places. The amount of movement of the alignment mark due to flexure is determined by the shape of the support base. Therefore, if the alignment mark is formed in consideration of this size, it is possible to perform alignment at only two locations. Is slightly changed depending on the thickness of the semiconductor wafer, etc., so that it is difficult to keep the alignment accuracy within the specified heat range. If the alignment is performed at three points, even if the alignment mark is designed without considering the radial movement of the alignment mark due to bending, it is possible to accurately adjust the alignment mark by adjusting the deviation of the alignment mark in the circumferential direction. The position can be adjusted.

更に、本発明ではこれら凸型にたわんだ状態で合わせを
行うために生じる問題を解決する別個の方法として、支
持台に半導体ウエハが凸型にたわむ状態とたわまない状
態の2つの状態で保持できる機構を持たせ、たわまない
状態で2枚の半導体ウエハの位置合わせを行い、然る後
に支持台に保持されている半導体ウエハを凸型にたわま
せ、ホルダーに保持されている半導体ウエハを接触さ
せ、支持台の真空吸着を解除して2枚の半導体ウエハを
接着させる方法を提供する。この方法によれば、2枚の
半導体ウエハともたわまない状態で位置合わせを行える
ので、従来のマスクアライナーと全く同様にして接着面
に気泡を残すことなく接着することができる。従つて、
位置合わせが1回で済むので、大幅な時間短縮が可能と
なる。但し、位置合わせをした後に支持台上に保持され
た半導体ウエハを一度凸型にたわませて、また戻すとい
う操作が入いるために、凸型にたわませた状態で位置合
わせを行い、すぐに接着させる前述の方法に比べると位
置合わせの精度は低い。
Further, according to the present invention, as a separate method for solving the problems caused by performing the alignment in the state of being bent in the convex shape, there are two states, that is, a state in which the semiconductor wafer is bent in the convex shape on the support base and a state in which the semiconductor wafer is not bent. With a mechanism that can hold the two semiconductor wafers, the two semiconductor wafers are aligned in a non-deflected state, and then the semiconductor wafers held by the support are flexed in a convex shape and held by the holder. Provided is a method of bringing semiconductor wafers into contact with each other, releasing vacuum suction of a support base, and adhering two semiconductor wafers. According to this method, since the two semiconductor wafers can be aligned without bending, the bonding can be performed without leaving bubbles on the bonding surface in the same manner as the conventional mask aligner. Therefore,
Since the positioning is done only once, it is possible to significantly reduce the time. However, since the operation of bending the semiconductor wafer held on the support base once after convex alignment and then returning it again, the alignment is performed in the convex flexure state. The alignment accuracy is lower than that of the above-mentioned method of immediately bonding.

〔発明の効果〕〔The invention's effect〕

本発明の装置を用いることにより、各々パターニングさ
れた2枚の半導体ウエハを、相互の位置関係を合わせ、
接着面に気泡を残すことなく接着することが初めて可能
となる。
By using the apparatus of the present invention, two patterned semiconductor wafers are aligned with each other,
It is possible for the first time to bond without leaving bubbles on the bonding surface.

〔発明の実施例〕Example of Invention

以下本発明の実施例を説明する。 Examples of the present invention will be described below.

第1図は本発明の一実施例の装置を示す図である。図に
おいて、14は接着すべき第1の半導体ウエハを凸型にた
わませて保持するための支持台、13は接着すべき第2の
半導体ウエハを保持するためのホルダーであり、22のホ
ルダー駆動機構によつて上下に移動し、支持台13との間
隔を任意に設定できる。23は支持台14の位置をx方向,
y方向,θ方向に微調整するためのステージで、20は半
導体ウエハを透過する波長の光を発生する光源であり、
21は半導体ウエハを透過してきた光を検出するための光
学系である。光源20から発生した光は排気孔18内を通過
し、支持台14もしくはホルダー13に保持された半導体ウ
エハを透過して光学系21で検出されるので、半導体ウエ
ハ上に形成された位置合わせマークを見ながらステージ
23を微調整して位置合わせを行うことができる。
FIG. 1 is a diagram showing an apparatus according to an embodiment of the present invention. In the figure, 14 is a support for bending and holding the first semiconductor wafer to be bonded in a convex shape, 13 is a holder for holding the second semiconductor wafer to be bonded, and 22 is a holder. It can be moved up and down by the drive mechanism, and the interval with the support base 13 can be set arbitrarily. 23 is the position of the support base 14 in the x direction,
A stage for fine adjustment in the y direction and the θ direction, and 20 is a light source that generates light having a wavelength that passes through the semiconductor wafer,
Reference numeral 21 is an optical system for detecting the light transmitted through the semiconductor wafer. The light generated from the light source 20 passes through the exhaust hole 18, passes through the semiconductor wafer held by the support base 14 or the holder 13, and is detected by the optical system 21, so that the alignment mark formed on the semiconductor wafer is detected. Watching the stage
23 can be finely adjusted for alignment.

支持台14は、基台16とラバー・チヤツク15とから構成さ
れている。基台16は金属等でつくられ、表面中央部が凸
型となるように曲面加工されており、表面に開口する排
気孔18が形成されている。15は基台16上に被せられる、
半導体ウエハを載置するためのラバー・チヤツクであ
る。このラバー・チヤツク15には複数の排気孔18が形成
されている。基台16の下に排気管19が設けられており、
この排気管19を介して真空吸引することにより、排気孔
18を介して半導体ウエハの外周部が引つ張られてラバー
・チヤツク15が基台16の表面形状に従つてたわみ、この
結果、半導体ウエハは中央部が凸型になつた状態で保持
される。このようにして保持した半導体ウエハをもう一
方の半導体ウエハに接触させ、ラバー・チヤツク15内に
空気等を少しずつ導入して半導体ウエハのたわみを徐々
に回復させる。これにより、接着面は中央部から周辺部
に向かつて広がり、気泡を取り込むことなく2枚の半導
体ウエハを接着することができる。特許請求の範囲第6
項記載の装置の場合には、例えばウエハの周辺を支持台
14上に機械的に保持し、中央部を押すことによつてウエ
ハをたわませる方法を使えば、たわまない状態で保持す
ることも可能である。あるいは、ラバー・チヤツク15の
代りに形状記憶合金を用い、ヒーターで熱することによ
りウエハをたわんだ状態とたわまない状態の2つの状態
で保持する等の方法をとつてもよい。
The support base 14 is composed of a base 16 and a rubber chuck 15. The base 16 is made of metal or the like, and is curved so that the central portion of the surface is convex, and an exhaust hole 18 that opens to the surface is formed. 15 is put on the base 16,
A rubber chuck for mounting semiconductor wafers. The rubber chuck 15 has a plurality of exhaust holes 18 formed therein. An exhaust pipe 19 is provided under the base 16,
By vacuum suction through this exhaust pipe 19, the exhaust hole
The outer periphery of the semiconductor wafer is stretched via 18 and the rubber chuck 15 bends according to the surface shape of the base 16, and as a result, the semiconductor wafer is held with the central portion being convex. . The semiconductor wafer held in this way is brought into contact with the other semiconductor wafer, and air or the like is gradually introduced into the rubber chuck 15 to gradually recover the deflection of the semiconductor wafer. As a result, the bonding surface spreads from the central part toward the peripheral part, and the two semiconductor wafers can be bonded together without taking in air bubbles. Claim 6
In the case of the apparatus described in the item 1, for example, the periphery of the wafer is supported by
It is also possible to hold it in a non-deflected state by using a method of mechanically holding it on 14 and bending the wafer by pushing the center part. Alternatively, a shape memory alloy may be used instead of the rubber chuck 15, and a method of holding the wafer in two states, that is, a state where the wafer is warped and a state where the wafer is not warped, by heating with a heater may be adopted.

第2図は、本発明の装置を用いて接着を行う第1の方法
を説明するための図である。これらの図において、11,
12は接着すべき2枚の半導体ウエハであり、13は上下す
る駆動機構を備えたホルダーであり、14は半導体ウエハ
を凸型にたわませて保持する支持台である。ホルダー13
は支持する軸のまわりに回転して、ウエハ11を接着面を
上向きにした状態で保持し、その後に再び回転してウエ
ハを下向きに保持する等の機構を持つことが実用上望ま
しい。このようにしてウエハ11を接着面を下向きにして
ホルダー13に保持し((a)図)、ホルダー13を下方に移
動してウエハ11と支持台14の表面を近づけた状態でウエ
ハ11と支持台14の中心を合わせる位置合わせを行い
((b)図)、然る後にウエハ11と支持台14を接触させ
((c)図)、ホルダー13の真空吸引を止めて支持台14の
真空吸引を開始し、ウエハ11を凸型にたわませた状態で
支持台14に保持しホルダー13を上方に移動する((d)
図)。次にウエハ12を接着面を下向きにしてホルダー13
に保持し((e)図)、ホルダー13を下方に移動してウエ
ハ11とウエハ12の表面を近づけた状態で位置合わせを行
い((f)図)、然る後にウエハ11とウエハ12を接触させ
((g)図)、支持台14によるウエハ11の保持を解除する
ことにより、ウエハ11,12を接着させる。この方法によ
れば、各々パターニングされた半導体ウエハ11,12を残
留ガスなしに全面確実に接着させて強固な接合体ウエハ
を得ることができる。
FIG. 2 is a diagram for explaining a first method of performing bonding using the device of the present invention. In these figures, 11,
Reference numeral 12 is two semiconductor wafers to be bonded, 13 is a holder equipped with an up-and-down driving mechanism, and 14 is a support base that holds the semiconductor wafer in a convex shape. Holder 13
It is practically desirable to have a mechanism such as rotating around a supporting axis to hold the wafer 11 with the adhesive surface facing upward, and then rotating again to hold the wafer downward. In this way, the wafer 11 is held on the holder 13 with the adhesive surface facing downward ((a) figure), and the holder 13 is moved downward to support the wafer 11 and the support base 14 in a state where the surfaces of the wafer 11 and the support base 14 are close to each other. The center of the base 14 is aligned (Fig. (B)), and then the wafer 11 and the support 14 are brought into contact with each other (Fig. (C)), the vacuum suction of the holder 13 is stopped, and the vacuum suction of the support 14 is stopped. Then, the wafer 11 is held in a convex shape on the support base 14 and the holder 13 is moved upward ((d)).
Figure). Next, hold the wafer 12 with the adhesive side facing down in the holder 13
(Fig. (E)), the holder 13 is moved downward to align the surfaces of the wafer 11 and the wafer 12 (Fig. (F)), and then the wafer 11 and the wafer 12 are aligned. The wafers 11 and 12 are adhered by bringing them into contact with each other (Fig. (G)) and releasing the holding of the wafer 11 by the support base 14. According to this method, the patterned semiconductor wafers 11 and 12 can be reliably bonded over the entire surface without residual gas to obtain a strong bonded wafer.

第3図(a),(b)は、以上述べてきた方法で接着を行う半
導体ウエハに形成する位置合わせマークの例を示す図で
ある。これらの図において、凸型形状のウエハを位置合
わせする精度を上げるため位置合わせマーク24,25は3
箇所に形成されている。第3図(c)は、2枚のウエハを
重ねて位置合わせをした時の位置合わせマークの重なつ
ている様子を示す図である。前述したように一方のウエ
ハが凸型にたわまされると位置合わせマークは半径方向
に移動するので第3図に示したような形状の位置合わせ
マークで十分である。
FIGS. 3 (a) and 3 (b) are views showing examples of alignment marks formed on a semiconductor wafer to be bonded by the method described above. In these figures, the alignment marks 24 and 25 are 3 in order to improve the precision of aligning the convex wafer.
It is formed in the place. FIG. 3 (c) is a diagram showing a state in which the alignment marks are overlapped when the two wafers are superposed and aligned with each other. As described above, when one of the wafers is bent in a convex shape, the alignment mark moves in the radial direction. Therefore, the alignment mark having the shape shown in FIG. 3 is sufficient.

第4図は、本発明の装置を用いて接着を行う第2の方法
を説明するための図である。前述した方法では、一方の
半導体ウエハを凸型にたわませた状態でウエハ同士の位
置合わせを行つたのに対し、これから述べる方法では接
着すべき半導体ウエハを2枚ともたわませずに位置合わ
せをするので操作は極めて簡単である。まず、ウエハ11
を接着面を上向きにして支持台14にたわまない状態で保
持し((a)図)、ホルダー13にウエハ12を接着面を下向
きにして保持し((b)図)、ホルダー13を下方に移動し
てウエハ11と12の表面を近づけた状態で位置合わせを行
い((c)図)、然る後に支持台14を凸型形状にしてウエ
ハ11を反らせ((d)図)、ウエハ11とウエハ12を接触さ
せ((e)図)、支持台14を平らにしてウエハ11,12を接
着させる。この方法によれば極めて簡便に通常のマスク
アライナと同様の操作で接着をすることができる。
FIG. 4 is a diagram for explaining a second method of performing bonding using the device of the present invention. In the method described above, the wafers are aligned in a state where one semiconductor wafer is bent in a convex shape, whereas in the method described below, the two semiconductor wafers to be bonded are aligned without bending. It is extremely easy to operate. First, the wafer 11
Is held on the support base 14 with the adhesive surface facing upward (FIG. (A)), and the wafer 12 is held in the holder 13 with the adhesive surface facing downward (FIG. (B)). When the wafers 11 and 12 are moved downward and the surfaces of the wafers 11 and 12 are brought close to each other to perform alignment (FIG. (C)), the support base 14 is then formed in a convex shape to bend the wafer 11 (FIG. (D)), The wafer 11 and the wafer 12 are brought into contact with each other (Fig. (E)), the support base 14 is flattened, and the wafers 11 and 12 are bonded. According to this method, the bonding can be performed very easily by the same operation as that of a normal mask aligner.

本発明は上記実施例に限られない。例えば第2図の方法
では、半導体ウエハ12は平坦に支持したが、これも半導
体ウエハ11と同様に中央部が凸型となるようにたわませ
て保持してもよい。また第1図の支持台14において、ラ
バー・チヤツク15は他の弾性材料を用いて構成すること
ができる。また基台16の表面は必ずしも曲面でなくても
よく、例えば中央部が凸型となるテーパ面であつてもよ
い。
The present invention is not limited to the above embodiment. For example, in the method shown in FIG. 2, the semiconductor wafer 12 is supported flat, but like the semiconductor wafer 11, this may also be held by being bent so that the central portion has a convex shape. Further, in the support base 14 of FIG. 1, the rubber chuck 15 can be constructed by using another elastic material. The surface of the base 16 does not necessarily have to be a curved surface, and may be, for example, a tapered surface having a convex central portion.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の装置を示す図、第2図,第
4図は本発明の装置を用いて装着を行う方法を説明する
ための図、第3図は本発明の装置を用いて接着を行う半
導体ウエハに形成する位置合わせマークの例を示す図で
ある。 11,12…半導体ウエハ 13…ホルダー 14…支持台 15…ラバー・チヤツク 16…基台 17,18…排気孔 19…排気管 20…光源 21…光学系 22…ホルダー駆動機構 23…x,y,θステージ 24…半導体ウエハ11上の位置合わせマーク 25…半導体ウエハ12上の位置合わせマーク
FIG. 1 is a diagram showing an apparatus according to an embodiment of the present invention, FIGS. 2 and 4 are diagrams for explaining a method of mounting using the apparatus of the present invention, and FIG. 3 is an apparatus of the present invention. It is a figure which shows the example of the alignment mark formed in the semiconductor wafer which adhere | attaches using. 11, 12 ... Semiconductor wafer 13 ... Holder 14 ... Support 15 ... Rubber chuck 16 ... Base 17,18 ... Exhaust hole 19 ... Exhaust pipe 20 ... Light source 21 ... Optical system 22 ... Holder drive mechanism 23 ... x, y, θ stage 24 ... Alignment mark on semiconductor wafer 11 ... Alignment mark on semiconductor wafer 12 ...

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】一方の半導体ウエハを、中央部が凸型とな
るようにたわませて保持する支持台と、他方の半導体ウ
エハを前記支持台に対向して保持するホルダーと、支持
台とホルダーとの間隔を変化する機構と、支持台とホル
ダーのうち少なくとも一方の位置を微調整する機構と、
前記半導体ウエハに光が照射された時前記半導体ウエハ
における光吸収係数を極めて小さくし得る長波長の光ビ
ームを発生する光源と、前記光源から発せられ前記半導
体ウエハを透過した光を検出する手段とを有してなるこ
とを特徴とする半導体基板の接着装置。
1. A support base for holding one semiconductor wafer by bending it so that its central portion is convex, a holder for holding the other semiconductor wafer facing the support base, and a support base. A mechanism for changing the distance to the holder, a mechanism for finely adjusting the position of at least one of the support and the holder,
A light source for generating a long-wavelength light beam capable of extremely reducing the light absorption coefficient of the semiconductor wafer when the semiconductor wafer is irradiated with light; and a means for detecting light emitted from the light source and transmitted through the semiconductor wafer. An apparatus for bonding a semiconductor substrate, comprising:
【請求項2】前記支持台は、基台、チャックおよび光源
からなり、基台は表面中央部が凸型となるようにテーパ
面または曲面成型され、その表面に開口する排気孔を有
し、チャックは前記基台に重ねられ、前記一方の半導体
ウエハが保持される面の外周部に前記基台の排気孔と連
通する複数個の排気口が形成された弾性体からなり、光
源は半導体ウエハを透過する波長の光を発生し、前記チ
ャック上に載せられた前記一方の半導体ウエハを、チャ
ックの排気孔および基台の排気孔を介して真空吸引して
その中央部が凸部となる状態で保持するようにしたこと
を特徴とする特許請求の範囲第1項記載の半導体基板の
接着装置。
2. The support base comprises a base, a chuck, and a light source, and the base is formed into a tapered surface or a curved surface so that the central portion of the surface is convex, and has an exhaust hole opening on the surface thereof. The chuck is formed of an elastic body that is stacked on the base and has a plurality of exhaust ports communicating with the exhaust holes of the base on the outer periphery of the surface on which the one semiconductor wafer is held. A state in which a light having a wavelength that passes through the chuck is generated, and the one semiconductor wafer placed on the chuck is vacuum-sucked through the exhaust hole of the chuck and the exhaust hole of the base to form a convex portion at the center thereof. The semiconductor substrate adhering device according to claim 1, wherein the device is adhered to the semiconductor substrate.
【請求項3】前記一方の半導体ウエハを支持台に保持す
るにあたり、前記一方の半導体ウエハと支持台との相対
位置を調整する手段を有することを特徴とする特許請求
の範囲第2項記載の半導体基板の接着装置。
3. The method according to claim 2, further comprising means for adjusting a relative position between the one semiconductor wafer and the supporting base when holding the one semiconductor wafer on the supporting base. Bonding device for semiconductor substrates.
【請求項4】各々の半導体ウエハ上には、少なくとも1
個の合わせマークがあり、一方の半導体ウエハが凸型と
なる状態で支持台に保持される時に、前記一方の半導体
ウエハの合わせマークを、ホルダーに保持された他方の
半導体ウエハ上に、前記他方の半導体ウエハ表面に垂直
な方向から投影して得られる図形と、前記他方の半導体
ウエハの合わせマークとが重なりを持つように合わせマ
ークを形成し、特許請求の範囲第1項記載の装置を用い
て接着を行うことを特徴とする半導体基板の接着方法。
4. At least one on each semiconductor wafer.
When there is one alignment mark, and one semiconductor wafer is held on the support in a convex state, the alignment mark of the one semiconductor wafer is placed on the other semiconductor wafer held by the holder and the other The alignment mark is formed so that the figure obtained by projecting from the direction perpendicular to the surface of the semiconductor wafer and the alignment mark of the other semiconductor wafer are overlapped with each other, and the apparatus according to claim 1 is used. A method for adhering a semiconductor substrate, the method comprising: adhering the semiconductor substrate.
【請求項5】前記一方の半導体ウエハと前記他方の半導
体ウエハとの位置合わせを少なくとも3箇所で行うこと
を特徴とする特許請求の範囲第2項記載の半導体基板の
接着装置。
5. The semiconductor substrate bonding apparatus according to claim 2, wherein the one semiconductor wafer and the other semiconductor wafer are aligned in at least three positions.
【請求項6】前記支持台は、半導体ウエハの中央部が凸
型となる状態と、半導体ウエハがたわまない状態の2つ
の状態で半導体ウエハを保持するようにしたことを特徴
とする特許請求の範囲第1項記載の半導体基板の接着装
置。
6. The support base holds the semiconductor wafer in two states, that is, the central portion of the semiconductor wafer is convex and the semiconductor wafer is not warped. The semiconductor substrate bonding apparatus according to claim 1.
JP2188085A 1985-02-08 1985-02-08 Bonding device for semiconductor substrates Expired - Lifetime JPH061790B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2188085A JPH061790B2 (en) 1985-02-08 1985-02-08 Bonding device for semiconductor substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2188085A JPH061790B2 (en) 1985-02-08 1985-02-08 Bonding device for semiconductor substrates

Publications (2)

Publication Number Publication Date
JPS61182239A JPS61182239A (en) 1986-08-14
JPH061790B2 true JPH061790B2 (en) 1994-01-05

Family

ID=12067435

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2188085A Expired - Lifetime JPH061790B2 (en) 1985-02-08 1985-02-08 Bonding device for semiconductor substrates

Country Status (1)

Country Link
JP (1) JPH061790B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0691147B2 (en) * 1988-10-14 1994-11-14 信越半導体株式会社 Bonding wafer inspection method
JPH02119237A (en) * 1988-10-28 1990-05-07 Nec Corp Hot plate for pasting semiconductor substrate on glass plate
WO2002056352A1 (en) * 2001-01-15 2002-07-18 Lintec Corporation Bonding apparatus, and bonding method
JP7079639B2 (en) * 2018-03-29 2022-06-02 株式会社ジャパンディスプレイ Manufacturing method of crimping device and display device

Also Published As

Publication number Publication date
JPS61182239A (en) 1986-08-14

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