JPS61181740U - - Google Patents

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Publication number
JPS61181740U
JPS61181740U JP6678185U JP6678185U JPS61181740U JP S61181740 U JPS61181740 U JP S61181740U JP 6678185 U JP6678185 U JP 6678185U JP 6678185 U JP6678185 U JP 6678185U JP S61181740 U JPS61181740 U JP S61181740U
Authority
JP
Japan
Prior art keywords
layer
conductive layer
low
antibody
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6678185U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6678185U priority Critical patent/JPS61181740U/ja
Publication of JPS61181740U publication Critical patent/JPS61181740U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第3図は本実施例の製造工程の説明図
であり、第1図のイはAlの蒸着工程で、ロ〜ニ
は導体上にAlの製造工程図で、ホは前記
薄膜の外観斜視図であり、第2図のイ〜ハは抵抗
体の製造工程で、ニは外観斜視図であり、第3図
は本実施例によるサーマルヘツドの断面図を示す
。第4図は従来例のサーマルヘツドの断面図であ
る。 1…基板、2…アルミニウム、5…絶縁層、8
a,8b…抵抗体層、10…保護層。
Figures 1 to 3 are explanatory diagrams of the manufacturing process of this example, where A in Figure 1 is the Al vapor deposition process, B to N are the manufacturing process diagrams of Al 2 O 3 on the conductor, and Hole. 2 is a perspective view of the external appearance of the thin film, A to C of FIG. 2 show the manufacturing process of the resistor, D is a perspective view of the external appearance, and FIG. 3 is a sectional view of the thermal head according to this embodiment. FIG. 4 is a sectional view of a conventional thermal head. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Aluminum, 5... Insulating layer, 8
a, 8b...Resistor layer, 10...Protective layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板の表面に薄膜技術を利用して、アルミニウ
ムを蒸着して導体層を形成し、導体層を部分的に
酸化して絶縁層を形成し、前記絶縁層の上部及び
導体層の一部を共に被覆するように、低抗体層を
形成し、更に前記導体層と低抗体層を覆うように
保護層を備えたサーマルヘツド。
Using thin film technology on the surface of the substrate, deposit aluminum to form a conductive layer, partially oxidize the conductive layer to form an insulating layer, and combine the upper part of the insulating layer and a part of the conductive layer. A thermal head having a low-antibody layer formed thereon so as to cover the conductor layer and a protective layer covering the conductor layer and the low-antibody layer.
JP6678185U 1985-05-03 1985-05-03 Pending JPS61181740U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6678185U JPS61181740U (en) 1985-05-03 1985-05-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6678185U JPS61181740U (en) 1985-05-03 1985-05-03

Publications (1)

Publication Number Publication Date
JPS61181740U true JPS61181740U (en) 1986-11-13

Family

ID=30599997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6678185U Pending JPS61181740U (en) 1985-05-03 1985-05-03

Country Status (1)

Country Link
JP (1) JPS61181740U (en)

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