JPS6329958U - - Google Patents
Info
- Publication number
- JPS6329958U JPS6329958U JP12367386U JP12367386U JPS6329958U JP S6329958 U JPS6329958 U JP S6329958U JP 12367386 U JP12367386 U JP 12367386U JP 12367386 U JP12367386 U JP 12367386U JP S6329958 U JPS6329958 U JP S6329958U
- Authority
- JP
- Japan
- Prior art keywords
- sputtering
- deposited
- layers
- base layer
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 229910001120 nichrome Inorganic materials 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 238000004544 sputter deposition Methods 0.000 claims 3
- 238000000151 deposition Methods 0.000 claims 1
- 239000003990 capacitor Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Description
第1図は本考案の一実施例による混成集積回路
の一部分を拡大した断面図、第2図イ〜ホは本考
案の上部電極を具えたコンデンサと従来の上部電
極を具えた薄膜コンデンサの特性図、第3図は従
来の混成集積回路の一部分を拡大した断面図、で
ある。
図中において、2は絶縁基板、7,8は回路素
子、11は混成集積回路、71,81はチタン層
、72,82はニクロム層、73,83は金の導
電層、を示す。
Figure 1 is an enlarged cross-sectional view of a part of a hybrid integrated circuit according to an embodiment of the present invention, and Figures 2A to 2E show characteristics of a capacitor equipped with the upper electrode of the present invention and a thin film capacitor equipped with a conventional upper electrode. 3 are enlarged cross-sectional views of a portion of a conventional hybrid integrated circuit. In the figure, 2 is an insulating substrate, 7 and 8 are circuit elements, 11 is a hybrid integrated circuit, 71 and 81 are titanium layers, 72 and 82 are nichrome layers, and 73 and 83 are gold conductive layers.
Claims (1)
8の上部電極が、スパツタリングで被着したチタ
ン層71,81を第1の下地層とし、その上にス
パツタリングで被着したニクロム層72,82を
第2の下地層とし、その上にスパツタリングで金
の導電層73,83を被着してなることを特徴と
する混成集積回路。 A circuit element 7 having a film structure formed on an insulating substrate 2,
The upper electrode of No. 8 has titanium layers 71 and 81 deposited by sputtering as a first base layer, nichrome layers 72 and 82 deposited by sputtering thereon as a second base layer, and titanium layers 71 and 81 deposited by sputtering on top of that as a second base layer. A hybrid integrated circuit characterized in that it is formed by depositing conductive layers 73 and 83 of gold.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12367386U JPS6329958U (en) | 1986-08-12 | 1986-08-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12367386U JPS6329958U (en) | 1986-08-12 | 1986-08-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6329958U true JPS6329958U (en) | 1988-02-27 |
Family
ID=31014986
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12367386U Pending JPS6329958U (en) | 1986-08-12 | 1986-08-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6329958U (en) |
-
1986
- 1986-08-12 JP JP12367386U patent/JPS6329958U/ja active Pending